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1; REQUIRES: asserts2; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -debug-only=branch-relaxation < %s 2>&1 | FileCheck --check-prefix=GFX10 %s3 4; GFX10: Basic blocks after relaxation5; GFX10: %bb.0 offset=00000000 size=0x1c6 7; Each instruction in the following kernel is 4 bytes in size,8; except s_load_b32 which is 8 bytes in size. Hence, 0x1c bytes in total.9define amdgpu_kernel void @test_sopk_size(i32 %var.mode) {10; GFX10-LABEL: test_sopk_size:11; GFX10: ; %bb.0:12; GFX10: s_load_b32 s0, s[4:5], 0x013; GFX10: s_mov_b32 s1, 314; GFX10: s_setreg_b32 hwreg(HW_REG_MODE, 0, 2), s115; GFX10: s_waitcnt lgkmcnt(0)16; GFX10: s_setreg_b32 hwreg(HW_REG_MODE, 0, 3), s017; GFX10: s_endpgm18 call void @llvm.amdgcn.s.setreg(i32 2049, i32 3)19 call void @llvm.amdgcn.s.setreg(i32 4097, i32 %var.mode)20 call void asm sideeffect "", ""()21 ret void22}23 24declare void @llvm.amdgcn.s.setreg(i32 immarg, i32)25 26