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1; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck --check-prefix=TONGA %s2 3; On Tonga and Iceland, limited SGPR availability means care must be taken to4; allocate scratch registers correctly. Check that this test compiles without5; error.6; TONGA-LABEL: test7define amdgpu_kernel void @test(ptr addrspace(1) %out, ptr addrspace(1) %in) {8entry:9 %mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)10 %tid = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %mbcnt.lo)11 %aptr = getelementptr <256 x i32>, ptr addrspace(1) %in, i32 %tid12 %a = load <256 x i32>, ptr addrspace(1) %aptr13 call void asm sideeffect "", "~{memory}" ()14 %outptr = getelementptr <256 x i32>, ptr addrspace(1) %in, i32 %tid15 store <256 x i32> %a, ptr addrspace(1) %outptr16 17; mark 128-bit SGPR registers as used so they are unavailable for the18; scratch resource descriptor19 call void asm sideeffect "", "~{s4},~{s8},~{s12},~{s16},~{s20},~{s24},~{s28}" ()20 call void asm sideeffect "", "~{s32},~{s36},~{s40},~{s44},~{s48},~{s52},~{s56}" ()21 call void asm sideeffect "", "~{s60},~{s64},~{s68}" ()22 ret void23}24 25declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #026declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #027 28attributes #0 = { nounwind readnone }29