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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefix=GFX10 %s3 4; The test was originally written to spill an SGPR to scratch without5; having spare SGPRs available to save exec. This scenario won't be6; true anymore as we reserve SGPR(s) upfront for saving exec.7 8define amdgpu_kernel void @test() #1 {9; GFX10-LABEL: test:10; GFX10: ; %bb.0:11; GFX10-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD012; GFX10-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD113; GFX10-NEXT: s_mov_b32 s10, -114; GFX10-NEXT: s_mov_b32 s11, 0x31e1600015; GFX10-NEXT: s_add_u32 s8, s8, s716; GFX10-NEXT: s_addc_u32 s9, s9, 017; GFX10-NEXT: ;;#ASMSTART18; GFX10-NEXT: ; def s[0:7]19; GFX10-NEXT: ;;#ASMEND20; GFX10-NEXT: ;;#ASMSTART21; GFX10-NEXT: ; def s[8:12]22; GFX10-NEXT: ;;#ASMEND23; GFX10-NEXT: ;;#ASMSTART24; GFX10-NEXT: ;;#ASMEND25; GFX10-NEXT: ;;#ASMSTART26; GFX10-NEXT: ; use s[0:7]27; GFX10-NEXT: ;;#ASMEND28; GFX10-NEXT: ;;#ASMSTART29; GFX10-NEXT: ; use s[8:12]30; GFX10-NEXT: ;;#ASMEND31; GFX10-NEXT: s_endpgm32 %wide.sgpr0 = call <8 x i32> asm sideeffect "; def $0", "={s[0:7]}" () #033 %wide.sgpr2 = call <5 x i32> asm sideeffect "; def $0", "={s[8:12]}" () #034 call void asm sideeffect "", "~{v[0:7]}" () #035 call void asm sideeffect "; use $0", "s"(<8 x i32> %wide.sgpr0) #036 call void asm sideeffect "; use $0", "s"(<5 x i32> %wide.sgpr2) #037 ret void38}39 40; FIXME: amdgpu-no attributese are a workaround for cases where the41; number of incoming arguments is larger than the number of permitted42; registers.43attributes #0 = { nounwind }44attributes #1 = { nounwind "amdgpu-num-sgpr"="16" "amdgpu-num-vgpr"="8" "amdgpu-no-queue-ptr" "amdgpu-no-dispatch-id" }45