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1; RUN: llc -mtriple=amdgcn -mcpu=gfx908 < %s | FileCheck -check-prefixes=GFX908 %s2 3; GFX908-LABEL: {{^}}max_11_vgprs_used_9a:4; GFX908-NOT: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD05; GFX908-NOT: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD16; GFX908-DAG: v_accvgpr_write_b32 [[A_REG:a[0-9]+]], v{{[0-9]}}7; GFX908-NOT: buffer_store_dword v{{[0-9]}},8; GFX908-NOT: buffer_9; GFX908: v_mov_b32_e32 v{{[0-9]}}, [[V_REG:v[0-9]+]]10; GFX908: v_accvgpr_read_b32 [[V_REG]], [[A_REG]]11; GFX908-NOT: buffer_12 13; GFX908: NumVgprs: 1014; GFX908: ScratchSize: 015; GFX908: VGPRBlocks: 216; GFX908: NumVGPRsForWavesPerEU: 1017define amdgpu_kernel void @max_11_vgprs_used_9a(ptr addrspace(1) %p) #0 {18 %tid = load volatile i32, ptr addrspace(1) poison19 call void asm sideeffect "", "a,a,a,a,a,a,a,a,a"(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9)20 %p1 = getelementptr inbounds i32, ptr addrspace(1) %p, i32 %tid21 %p2 = getelementptr inbounds i32, ptr addrspace(1) %p1, i32 422 %p3 = getelementptr inbounds i32, ptr addrspace(1) %p2, i32 823 %p4 = getelementptr inbounds i32, ptr addrspace(1) %p3, i32 1224 %p5 = getelementptr inbounds i32, ptr addrspace(1) %p4, i32 1625 %p6 = getelementptr inbounds i32, ptr addrspace(1) %p5, i32 2026 %p7 = getelementptr inbounds i32, ptr addrspace(1) %p6, i32 2427 %p8 = getelementptr inbounds i32, ptr addrspace(1) %p7, i32 2828 %p9 = getelementptr inbounds i32, ptr addrspace(1) %p8, i32 3229 %p10 = getelementptr inbounds i32, ptr addrspace(1) %p9, i32 3630 %v1 = load volatile i32, ptr addrspace(1) %p131 %v2 = load volatile i32, ptr addrspace(1) %p232 %v3 = load volatile i32, ptr addrspace(1) %p333 %v4 = load volatile i32, ptr addrspace(1) %p434 %v5 = load volatile i32, ptr addrspace(1) %p535 %v6 = load volatile i32, ptr addrspace(1) %p636 %v7 = load volatile i32, ptr addrspace(1) %p737 %v8 = load volatile i32, ptr addrspace(1) %p838 %v9 = load volatile i32, ptr addrspace(1) %p939 %v10 = load volatile i32, ptr addrspace(1) %p1040 call void asm sideeffect "", "v,v,v,v,v,v,v,v,v,v"(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, i32 %v6, i32 %v7, i32 %v8, i32 %v9, i32 %v10)41 store volatile i32 %v1, ptr addrspace(1) poison42 store volatile i32 %v2, ptr addrspace(1) poison43 store volatile i32 %v3, ptr addrspace(1) poison44 store volatile i32 %v4, ptr addrspace(1) poison45 store volatile i32 %v5, ptr addrspace(1) poison46 store volatile i32 %v6, ptr addrspace(1) poison47 store volatile i32 %v7, ptr addrspace(1) poison48 store volatile i32 %v8, ptr addrspace(1) poison49 store volatile i32 %v9, ptr addrspace(1) poison50 store volatile i32 %v10, ptr addrspace(1) poison51 ret void52}53 54; GFX908-LABEL: {{^}}max_11_vgprs_used_1a_partial_spill:55; GFX908-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD056; GFX908-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD157; GFX908-DAG: v_accvgpr_write_b32 a0, 158; GFX908-DAG: buffer_store_dword v{{[0-9]}},59; GFX908-DAG: v_accvgpr_write_b32 a1, v{{[0-9]}}60; GFX908-DAG: v_accvgpr_write_b32 a2, v{{[0-9]}}61; GFX908-DAG: v_accvgpr_write_b32 a3, v{{[0-9]}}62; GFX908-DAG: v_accvgpr_write_b32 a4, v{{[0-9]}}63; GFX908-DAG: v_accvgpr_write_b32 a5, v{{[0-9]}}64; GFX908-DAG: v_accvgpr_write_b32 a6, v{{[0-9]}}65; GFX908-DAG: v_accvgpr_write_b32 a7, v{{[0-9]}}66; GFX908-DAG: v_accvgpr_write_b32 a8, v{{[0-9]}}67; GFX908-DAG: v_accvgpr_write_b32 a9, v{{[0-9]}}68; GFX908-DAG: v_accvgpr_write_b32 a10, v{{[0-9]}}69; GFX908-DAG: buffer_load_dword v{{[0-9]}},70; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a071; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a172; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a273; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a374; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a475; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a576; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a677; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a778; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a879; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a980; GFX908-DAG: v_accvgpr_read_b32 v{{[0-9]}}, a1081 82; GFX908: NumVgprs: 1083; GFX908: ScratchSize: 1284; GFX908: VGPRBlocks: 285; GFX908: NumVGPRsForWavesPerEU: 1186define amdgpu_kernel void @max_11_vgprs_used_1a_partial_spill(ptr addrspace(1) %p) #0 {87 %tid = load volatile i32, ptr addrspace(1) poison88 call void asm sideeffect "", "a"(i32 1)89 %p1 = getelementptr inbounds i64, ptr addrspace(1) %p, i32 %tid90 %p2 = getelementptr inbounds i64, ptr addrspace(1) %p1, i32 891 %p3 = getelementptr inbounds i64, ptr addrspace(1) %p2, i32 1692 %p4 = getelementptr inbounds i64, ptr addrspace(1) %p3, i32 2493 %p5 = getelementptr inbounds i64, ptr addrspace(1) %p4, i32 3294 %v1 = load volatile i64, ptr addrspace(1) %p195 %v2 = load volatile i64, ptr addrspace(1) %p296 %v3 = load volatile i64, ptr addrspace(1) %p397 %v4 = load volatile i64, ptr addrspace(1) %p498 %v5 = load volatile i64, ptr addrspace(1) %p599 call void asm sideeffect "", "v,v,v,v,v"(i64 %v1, i64 %v2, i64 %v3, i64 %v4, i64 %v5)100 store volatile i64 %v1, ptr addrspace(1) %p2101 store volatile i64 %v2, ptr addrspace(1) %p3102 store volatile i64 %v3, ptr addrspace(1) %p4103 store volatile i64 %v4, ptr addrspace(1) %p5104 store volatile i64 %v5, ptr addrspace(1) %p1105 ret void106}107 108attributes #0 = { nounwind "amdgpu-num-vgpr"="11" }109