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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s3# RUN: llc -mtriple=amdgcn -mcpu=tahiti -passes=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s4# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s5 6# Make sure spill/restore of 224 bit registers works.7 8---9name: spill_restore_sgpr22410tracksRegLiveness: true11machineFunctionInfo:12 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr313 stackPtrOffsetReg: $sgpr3214body: |15 ; SPILLED-LABEL: name: spill_restore_sgpr22416 ; SPILLED: bb.0:17 ; SPILLED-NEXT: successors: %bb.1(0x80000000)18 ; SPILLED-NEXT: {{ $}}19 ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1020 ; SPILLED-NEXT: SI_SPILL_S224_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s224) into %stack.0, align 4, addrspace 5)21 ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc22 ; SPILLED-NEXT: {{ $}}23 ; SPILLED-NEXT: bb.1:24 ; SPILLED-NEXT: successors: %bb.2(0x80000000)25 ; SPILLED-NEXT: {{ $}}26 ; SPILLED-NEXT: S_NOP 127 ; SPILLED-NEXT: {{ $}}28 ; SPILLED-NEXT: bb.2:29 ; SPILLED-NEXT: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10 = SI_SPILL_S224_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s224) from %stack.0, align 4, addrspace 5)30 ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1031 ;32 ; EXPANDED-LABEL: name: spill_restore_sgpr22433 ; EXPANDED: bb.0:34 ; EXPANDED-NEXT: successors: %bb.1(0x80000000)35 ; EXPANDED-NEXT: {{ $}}36 ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1037 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF38 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, [[DEF]], implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1039 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, [[DEF]]40 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr6, 2, [[DEF]]41 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr7, 3, [[DEF]]42 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr8, 4, [[DEF]]43 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr9, 5, [[DEF]]44 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR killed $sgpr10, 6, [[DEF]], implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1045 ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc46 ; EXPANDED-NEXT: {{ $}}47 ; EXPANDED-NEXT: bb.1:48 ; EXPANDED-NEXT: successors: %bb.2(0x80000000)49 ; EXPANDED-NEXT: {{ $}}50 ; EXPANDED-NEXT: S_NOP 151 ; EXPANDED-NEXT: {{ $}}52 ; EXPANDED-NEXT: bb.2:53 ; EXPANDED-NEXT: $sgpr4 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1054 ; EXPANDED-NEXT: $sgpr5 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 155 ; EXPANDED-NEXT: $sgpr6 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 256 ; EXPANDED-NEXT: $sgpr7 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 357 ; EXPANDED-NEXT: $sgpr8 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 458 ; EXPANDED-NEXT: $sgpr9 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 559 ; EXPANDED-NEXT: $sgpr10 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 660 ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr1061 bb.0:62 S_NOP 0, implicit-def %0:sgpr_22463 S_CBRANCH_SCC1 implicit undef $scc, %bb.164 65 bb.1:66 S_NOP 167 68 bb.2:69 S_NOP 0, implicit %070...71 72---73name: spill_restore_vgpr22474tracksRegLiveness: true75machineFunctionInfo:76 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr377 stackPtrOffsetReg: $sgpr3278body: |79 ; SPILLED-LABEL: name: spill_restore_vgpr22480 ; SPILLED: bb.0:81 ; SPILLED-NEXT: successors: %bb.1(0x80000000)82 ; SPILLED-NEXT: {{ $}}83 ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr684 ; SPILLED-NEXT: SI_SPILL_V224_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, %stack.0, $sgpr32, 0, implicit $exec :: (store (s224) into %stack.0, align 4, addrspace 5)85 ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc86 ; SPILLED-NEXT: {{ $}}87 ; SPILLED-NEXT: bb.1:88 ; SPILLED-NEXT: successors: %bb.2(0x80000000)89 ; SPILLED-NEXT: {{ $}}90 ; SPILLED-NEXT: S_NOP 191 ; SPILLED-NEXT: {{ $}}92 ; SPILLED-NEXT: bb.2:93 ; SPILLED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = SI_SPILL_V224_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s224) from %stack.0, align 4, addrspace 5)94 ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr695 ;96 ; EXPANDED-LABEL: name: spill_restore_vgpr22497 ; EXPANDED: bb.0:98 ; EXPANDED-NEXT: successors: %bb.1(0x80000000)99 ; EXPANDED-NEXT: {{ $}}100 ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6101 ; EXPANDED-NEXT: SI_SPILL_V224_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, %stack.0, $sgpr32, 0, implicit $exec :: (store (s224) into %stack.0, align 4, addrspace 5)102 ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc103 ; EXPANDED-NEXT: {{ $}}104 ; EXPANDED-NEXT: bb.1:105 ; EXPANDED-NEXT: successors: %bb.2(0x80000000)106 ; EXPANDED-NEXT: {{ $}}107 ; EXPANDED-NEXT: S_NOP 1108 ; EXPANDED-NEXT: {{ $}}109 ; EXPANDED-NEXT: bb.2:110 ; EXPANDED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = SI_SPILL_V224_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s224) from %stack.0, align 4, addrspace 5)111 ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6112 bb.0:113 S_NOP 0, implicit-def %0:vreg_224114 S_CBRANCH_SCC1 implicit undef $scc, %bb.1115 116 bb.1:117 S_NOP 1118 119 bb.2:120 S_NOP 0, implicit %0121...122