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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s3# RUN: llc -mtriple=amdgcn -mcpu=tahiti -passes=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s4# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s5 6# Make sure spill/restore of 320 bit registers works.7 8---9name: spill_restore_sgpr32010tracksRegLiveness: true11machineFunctionInfo:12 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr313 stackPtrOffsetReg: $sgpr3214body: |15 ; SPILLED-LABEL: name: spill_restore_sgpr32016 ; SPILLED: bb.0:17 ; SPILLED-NEXT: successors: %bb.1(0x80000000)18 ; SPILLED-NEXT: {{ $}}19 ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1320 ; SPILLED-NEXT: SI_SPILL_S320_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s320) into %stack.0, align 4, addrspace 5)21 ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc22 ; SPILLED-NEXT: {{ $}}23 ; SPILLED-NEXT: bb.1:24 ; SPILLED-NEXT: successors: %bb.2(0x80000000)25 ; SPILLED-NEXT: {{ $}}26 ; SPILLED-NEXT: S_NOP 127 ; SPILLED-NEXT: {{ $}}28 ; SPILLED-NEXT: bb.2:29 ; SPILLED-NEXT: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 = SI_SPILL_S320_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s320) from %stack.0, align 4, addrspace 5)30 ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1331 ;32 ; EXPANDED-LABEL: name: spill_restore_sgpr32033 ; EXPANDED: bb.0:34 ; EXPANDED-NEXT: successors: %bb.1(0x80000000)35 ; EXPANDED-NEXT: {{ $}}36 ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1337 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF38 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, [[DEF]], implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1339 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, [[DEF]]40 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr6, 2, [[DEF]]41 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr7, 3, [[DEF]]42 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr8, 4, [[DEF]]43 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr9, 5, [[DEF]]44 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr10, 6, [[DEF]]45 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr11, 7, [[DEF]]46 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr12, 8, [[DEF]]47 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR killed $sgpr13, 9, [[DEF]], implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1348 ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc49 ; EXPANDED-NEXT: {{ $}}50 ; EXPANDED-NEXT: bb.1:51 ; EXPANDED-NEXT: successors: %bb.2(0x80000000)52 ; EXPANDED-NEXT: {{ $}}53 ; EXPANDED-NEXT: S_NOP 154 ; EXPANDED-NEXT: {{ $}}55 ; EXPANDED-NEXT: bb.2:56 ; EXPANDED-NEXT: $sgpr4 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1357 ; EXPANDED-NEXT: $sgpr5 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 158 ; EXPANDED-NEXT: $sgpr6 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 259 ; EXPANDED-NEXT: $sgpr7 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 360 ; EXPANDED-NEXT: $sgpr8 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 461 ; EXPANDED-NEXT: $sgpr9 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 562 ; EXPANDED-NEXT: $sgpr10 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 663 ; EXPANDED-NEXT: $sgpr11 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 764 ; EXPANDED-NEXT: $sgpr12 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 865 ; EXPANDED-NEXT: $sgpr13 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 966 ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr1367 bb.0:68 S_NOP 0, implicit-def %0:sgpr_32069 S_CBRANCH_SCC1 implicit undef $scc, %bb.170 71 bb.1:72 S_NOP 173 74 bb.2:75 S_NOP 0, implicit %076...77 78---79name: spill_restore_vgpr32080tracksRegLiveness: true81machineFunctionInfo:82 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr383 stackPtrOffsetReg: $sgpr3284body: |85 ; SPILLED-LABEL: name: spill_restore_vgpr32086 ; SPILLED: bb.0:87 ; SPILLED-NEXT: successors: %bb.1(0x80000000)88 ; SPILLED-NEXT: {{ $}}89 ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr990 ; SPILLED-NEXT: SI_SPILL_V320_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9, %stack.0, $sgpr32, 0, implicit $exec :: (store (s320) into %stack.0, align 4, addrspace 5)91 ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc92 ; SPILLED-NEXT: {{ $}}93 ; SPILLED-NEXT: bb.1:94 ; SPILLED-NEXT: successors: %bb.2(0x80000000)95 ; SPILLED-NEXT: {{ $}}96 ; SPILLED-NEXT: S_NOP 197 ; SPILLED-NEXT: {{ $}}98 ; SPILLED-NEXT: bb.2:99 ; SPILLED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9 = SI_SPILL_V320_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s320) from %stack.0, align 4, addrspace 5)100 ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9101 ;102 ; EXPANDED-LABEL: name: spill_restore_vgpr320103 ; EXPANDED: bb.0:104 ; EXPANDED-NEXT: successors: %bb.1(0x80000000)105 ; EXPANDED-NEXT: {{ $}}106 ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9107 ; EXPANDED-NEXT: SI_SPILL_V320_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9, %stack.0, $sgpr32, 0, implicit $exec :: (store (s320) into %stack.0, align 4, addrspace 5)108 ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc109 ; EXPANDED-NEXT: {{ $}}110 ; EXPANDED-NEXT: bb.1:111 ; EXPANDED-NEXT: successors: %bb.2(0x80000000)112 ; EXPANDED-NEXT: {{ $}}113 ; EXPANDED-NEXT: S_NOP 1114 ; EXPANDED-NEXT: {{ $}}115 ; EXPANDED-NEXT: bb.2:116 ; EXPANDED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9 = SI_SPILL_V320_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s320) from %stack.0, align 4, addrspace 5)117 ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9118 bb.0:119 S_NOP 0, implicit-def %0:vreg_320120 S_CBRANCH_SCC1 implicit undef $scc, %bb.1121 122 bb.1:123 S_NOP 1124 125 bb.2:126 S_NOP 0, implicit %0127...128