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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s3# RUN: llc -mtriple=amdgcn -mcpu=tahiti -passes=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s4# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s5 6# Make sure spill/restore of 384 bit registers works.7 8---9name: spill_restore_sgpr38410tracksRegLiveness: true11machineFunctionInfo:12 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr313 stackPtrOffsetReg: $sgpr3214body: |15 ; SPILLED-LABEL: name: spill_restore_sgpr38416 ; SPILLED: bb.0:17 ; SPILLED-NEXT: successors: %bb.1(0x80000000)18 ; SPILLED-NEXT: {{ $}}19 ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1520 ; SPILLED-NEXT: SI_SPILL_S384_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s384) into %stack.0, align 4, addrspace 5)21 ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc22 ; SPILLED-NEXT: {{ $}}23 ; SPILLED-NEXT: bb.1:24 ; SPILLED-NEXT: successors: %bb.2(0x80000000)25 ; SPILLED-NEXT: {{ $}}26 ; SPILLED-NEXT: S_NOP 127 ; SPILLED-NEXT: {{ $}}28 ; SPILLED-NEXT: bb.2:29 ; SPILLED-NEXT: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = SI_SPILL_S384_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s384) from %stack.0, align 4, addrspace 5)30 ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1531 ;32 ; EXPANDED-LABEL: name: spill_restore_sgpr38433 ; EXPANDED: bb.0:34 ; EXPANDED-NEXT: successors: %bb.1(0x80000000)35 ; EXPANDED-NEXT: {{ $}}36 ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1537 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF38 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, [[DEF]], implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1539 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, [[DEF]]40 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr6, 2, [[DEF]]41 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr7, 3, [[DEF]]42 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr8, 4, [[DEF]]43 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr9, 5, [[DEF]]44 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr10, 6, [[DEF]]45 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr11, 7, [[DEF]]46 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr12, 8, [[DEF]]47 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr13, 9, [[DEF]]48 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr14, 10, [[DEF]]49 ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR killed $sgpr15, 11, [[DEF]], implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1550 ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc51 ; EXPANDED-NEXT: {{ $}}52 ; EXPANDED-NEXT: bb.1:53 ; EXPANDED-NEXT: successors: %bb.2(0x80000000)54 ; EXPANDED-NEXT: {{ $}}55 ; EXPANDED-NEXT: S_NOP 156 ; EXPANDED-NEXT: {{ $}}57 ; EXPANDED-NEXT: bb.2:58 ; EXPANDED-NEXT: $sgpr4 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1559 ; EXPANDED-NEXT: $sgpr5 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 160 ; EXPANDED-NEXT: $sgpr6 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 261 ; EXPANDED-NEXT: $sgpr7 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 362 ; EXPANDED-NEXT: $sgpr8 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 463 ; EXPANDED-NEXT: $sgpr9 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 564 ; EXPANDED-NEXT: $sgpr10 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 665 ; EXPANDED-NEXT: $sgpr11 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 766 ; EXPANDED-NEXT: $sgpr12 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 867 ; EXPANDED-NEXT: $sgpr13 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 968 ; EXPANDED-NEXT: $sgpr14 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 1069 ; EXPANDED-NEXT: $sgpr15 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 1170 ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr1571 bb.0:72 S_NOP 0, implicit-def %0:sgpr_38473 S_CBRANCH_SCC1 implicit undef $scc, %bb.174 75 bb.1:76 S_NOP 177 78 bb.2:79 S_NOP 0, implicit %080...81 82---83name: spill_restore_vgpr38484tracksRegLiveness: true85machineFunctionInfo:86 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr387 stackPtrOffsetReg: $sgpr3288body: |89 ; SPILLED-LABEL: name: spill_restore_vgpr38490 ; SPILLED: bb.0:91 ; SPILLED-NEXT: successors: %bb.1(0x80000000)92 ; SPILLED-NEXT: {{ $}}93 ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr1194 ; SPILLED-NEXT: SI_SPILL_V384_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11, %stack.0, $sgpr32, 0, implicit $exec :: (store (s384) into %stack.0, align 4, addrspace 5)95 ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc96 ; SPILLED-NEXT: {{ $}}97 ; SPILLED-NEXT: bb.1:98 ; SPILLED-NEXT: successors: %bb.2(0x80000000)99 ; SPILLED-NEXT: {{ $}}100 ; SPILLED-NEXT: S_NOP 1101 ; SPILLED-NEXT: {{ $}}102 ; SPILLED-NEXT: bb.2:103 ; SPILLED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11 = SI_SPILL_V384_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s384) from %stack.0, align 4, addrspace 5)104 ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11105 ;106 ; EXPANDED-LABEL: name: spill_restore_vgpr384107 ; EXPANDED: bb.0:108 ; EXPANDED-NEXT: successors: %bb.1(0x80000000)109 ; EXPANDED-NEXT: {{ $}}110 ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11111 ; EXPANDED-NEXT: SI_SPILL_V384_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11, %stack.0, $sgpr32, 0, implicit $exec :: (store (s384) into %stack.0, align 4, addrspace 5)112 ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc113 ; EXPANDED-NEXT: {{ $}}114 ; EXPANDED-NEXT: bb.1:115 ; EXPANDED-NEXT: successors: %bb.2(0x80000000)116 ; EXPANDED-NEXT: {{ $}}117 ; EXPANDED-NEXT: S_NOP 1118 ; EXPANDED-NEXT: {{ $}}119 ; EXPANDED-NEXT: bb.2:120 ; EXPANDED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11 = SI_SPILL_V384_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s384) from %stack.0, align 4, addrspace 5)121 ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11122 bb.0:123 S_NOP 0, implicit-def %0:vreg_384124 S_CBRANCH_SCC1 implicit undef $scc, %bb.1125 126 bb.1:127 S_NOP 1128 129 bb.2:130 S_NOP 0, implicit %0131...132