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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti | FileCheck %s --check-prefix=SI3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=VI4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 | FileCheck %s --check-prefix=GFX95; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s --check-prefix=GFX106; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 | FileCheck %s --check-prefix=GFX117 8declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone9declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone10declare { <2 x i32>, <2 x i1> } @llvm.ssub.with.overflow.v2i32(<2 x i32>, <2 x i32>) nounwind readnone11 12define amdgpu_kernel void @ssubo_i64_zext(ptr addrspace(1) %out, i64 %a, i64 %b) nounwind {13; SI-LABEL: ssubo_i64_zext:14; SI: ; %bb.0:15; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x916; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd17; SI-NEXT: s_mov_b32 s7, 0xf00018; SI-NEXT: s_mov_b32 s6, -119; SI-NEXT: s_waitcnt lgkmcnt(0)20; SI-NEXT: v_mov_b32_e32 v0, s221; SI-NEXT: s_sub_u32 s10, s2, s822; SI-NEXT: s_subb_u32 s11, s3, s923; SI-NEXT: v_mov_b32_e32 v1, s324; SI-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1]25; SI-NEXT: v_cmp_gt_i64_e64 s[2:3], s[8:9], 026; SI-NEXT: s_mov_b32 s4, s027; SI-NEXT: s_mov_b32 s5, s128; SI-NEXT: s_xor_b64 s[0:1], s[2:3], vcc29; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]30; SI-NEXT: v_mov_b32_e32 v1, s1131; SI-NEXT: v_add_i32_e32 v0, vcc, s10, v032; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc33; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 034; SI-NEXT: s_endpgm35;36; VI-LABEL: ssubo_i64_zext:37; VI: ; %bb.0:38; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2439; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3440; VI-NEXT: s_waitcnt lgkmcnt(0)41; VI-NEXT: v_mov_b32_e32 v1, s242; VI-NEXT: s_sub_u32 s6, s2, s443; VI-NEXT: v_mov_b32_e32 v2, s344; VI-NEXT: s_subb_u32 s7, s3, s545; VI-NEXT: v_cmp_gt_i64_e64 s[8:9], s[4:5], 046; VI-NEXT: v_cmp_lt_i64_e32 vcc, s[6:7], v[1:2]47; VI-NEXT: v_mov_b32_e32 v0, s048; VI-NEXT: v_mov_b32_e32 v1, s149; VI-NEXT: s_xor_b64 s[0:1], s[8:9], vcc50; VI-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]51; VI-NEXT: v_mov_b32_e32 v3, s752; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v253; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc54; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]55; VI-NEXT: s_endpgm56;57; GFX9-LABEL: ssubo_i64_zext:58; GFX9: ; %bb.0:59; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2460; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3461; GFX9-NEXT: v_mov_b32_e32 v2, 062; GFX9-NEXT: s_waitcnt lgkmcnt(0)63; GFX9-NEXT: v_mov_b32_e32 v0, s264; GFX9-NEXT: s_sub_u32 s4, s2, s665; GFX9-NEXT: v_mov_b32_e32 v1, s366; GFX9-NEXT: s_subb_u32 s5, s3, s767; GFX9-NEXT: v_cmp_gt_i64_e64 s[8:9], s[6:7], 068; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]69; GFX9-NEXT: v_mov_b32_e32 v1, s570; GFX9-NEXT: s_xor_b64 s[2:3], s[8:9], vcc71; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[2:3]72; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v073; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc74; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]75; GFX9-NEXT: s_endpgm76;77; GFX10-LABEL: ssubo_i64_zext:78; GFX10: ; %bb.0:79; GFX10-NEXT: s_clause 0x180; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2481; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3482; GFX10-NEXT: v_mov_b32_e32 v2, 083; GFX10-NEXT: s_waitcnt lgkmcnt(0)84; GFX10-NEXT: s_sub_u32 s4, s2, s685; GFX10-NEXT: s_subb_u32 s5, s3, s786; GFX10-NEXT: v_cmp_gt_i64_e64 s6, s[6:7], 087; GFX10-NEXT: v_cmp_lt_i64_e64 s2, s[4:5], s[2:3]88; GFX10-NEXT: s_xor_b32 s2, s6, s289; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s290; GFX10-NEXT: v_add_co_u32 v0, s2, s4, v091; GFX10-NEXT: v_add_co_ci_u32_e64 v1, s2, s5, 0, s292; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]93; GFX10-NEXT: s_endpgm94;95; GFX11-LABEL: ssubo_i64_zext:96; GFX11: ; %bb.0:97; GFX11-NEXT: s_clause 0x198; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2499; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34100; GFX11-NEXT: v_mov_b32_e32 v2, 0101; GFX11-NEXT: s_waitcnt lgkmcnt(0)102; GFX11-NEXT: s_sub_u32 s6, s2, s4103; GFX11-NEXT: s_subb_u32 s7, s3, s5104; GFX11-NEXT: v_cmp_gt_i64_e64 s4, s[4:5], 0105; GFX11-NEXT: v_cmp_lt_i64_e64 s2, s[6:7], s[2:3]106; GFX11-NEXT: s_xor_b32 s2, s4, s2107; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)108; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, s2109; GFX11-NEXT: v_add_co_u32 v0, s2, s6, v0110; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)111; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, s7, 0, s2112; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]113; GFX11-NEXT: s_endpgm114 %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind115 %val = extractvalue { i64, i1 } %ssub, 0116 %carry = extractvalue { i64, i1 } %ssub, 1117 %ext = zext i1 %carry to i64118 %add2 = add i64 %val, %ext119 store i64 %add2, ptr addrspace(1) %out, align 8120 ret void121}122 123define amdgpu_kernel void @s_ssubo_i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) nounwind {124; SI-LABEL: s_ssubo_i32:125; SI: ; %bb.0:126; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9127; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd128; SI-NEXT: s_mov_b32 s7, 0xf000129; SI-NEXT: s_mov_b32 s6, -1130; SI-NEXT: s_waitcnt lgkmcnt(0)131; SI-NEXT: s_mov_b32 s4, s0132; SI-NEXT: s_sub_i32 s12, s8, s9133; SI-NEXT: s_cmp_gt_i32 s9, 0134; SI-NEXT: s_cselect_b64 s[10:11], -1, 0135; SI-NEXT: s_cmp_lt_i32 s12, s8136; SI-NEXT: s_mov_b32 s5, s1137; SI-NEXT: s_cselect_b64 s[8:9], -1, 0138; SI-NEXT: v_mov_b32_e32 v0, s12139; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0140; SI-NEXT: s_xor_b64 s[4:5], s[10:11], s[8:9]141; SI-NEXT: s_mov_b32 s0, s2142; SI-NEXT: s_mov_b32 s1, s3143; SI-NEXT: s_mov_b32 s2, s6144; SI-NEXT: s_mov_b32 s3, s7145; SI-NEXT: s_waitcnt expcnt(0)146; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]147; SI-NEXT: buffer_store_byte v0, off, s[0:3], 0148; SI-NEXT: s_endpgm149;150; VI-LABEL: s_ssubo_i32:151; VI: ; %bb.0:152; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24153; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34154; VI-NEXT: s_waitcnt lgkmcnt(0)155; VI-NEXT: v_mov_b32_e32 v0, s0156; VI-NEXT: s_sub_i32 s6, s4, s5157; VI-NEXT: s_cmp_gt_i32 s5, 0158; VI-NEXT: v_mov_b32_e32 v1, s1159; VI-NEXT: s_cselect_b64 s[0:1], -1, 0160; VI-NEXT: s_cmp_lt_i32 s6, s4161; VI-NEXT: v_mov_b32_e32 v2, s2162; VI-NEXT: v_mov_b32_e32 v3, s3163; VI-NEXT: s_cselect_b64 s[2:3], -1, 0164; VI-NEXT: v_mov_b32_e32 v4, s6165; VI-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3]166; VI-NEXT: flat_store_dword v[0:1], v4167; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]168; VI-NEXT: flat_store_byte v[2:3], v0169; VI-NEXT: s_endpgm170;171; GFX9-LABEL: s_ssubo_i32:172; GFX9: ; %bb.0:173; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34174; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24175; GFX9-NEXT: v_mov_b32_e32 v0, 0176; GFX9-NEXT: s_waitcnt lgkmcnt(0)177; GFX9-NEXT: v_mov_b32_e32 v1, s7178; GFX9-NEXT: s_sub_i32 s4, s6, s7179; GFX9-NEXT: v_sub_i32 v1, s6, v1 clamp180; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, s4, v1181; GFX9-NEXT: v_mov_b32_e32 v2, s4182; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc183; GFX9-NEXT: global_store_dword v0, v2, s[0:1]184; GFX9-NEXT: global_store_byte v0, v1, s[2:3]185; GFX9-NEXT: s_endpgm186;187; GFX10-LABEL: s_ssubo_i32:188; GFX10: ; %bb.0:189; GFX10-NEXT: s_clause 0x1190; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34191; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24192; GFX10-NEXT: v_mov_b32_e32 v1, 0193; GFX10-NEXT: s_waitcnt lgkmcnt(0)194; GFX10-NEXT: v_sub_nc_i32 v0, s6, s7 clamp195; GFX10-NEXT: s_sub_i32 s4, s6, s7196; GFX10-NEXT: v_mov_b32_e32 v2, s4197; GFX10-NEXT: v_cmp_ne_u32_e32 vcc_lo, s4, v0198; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo199; GFX10-NEXT: global_store_dword v1, v2, s[0:1]200; GFX10-NEXT: global_store_byte v1, v0, s[2:3]201; GFX10-NEXT: s_endpgm202;203; GFX11-LABEL: s_ssubo_i32:204; GFX11: ; %bb.0:205; GFX11-NEXT: s_clause 0x1206; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x34207; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24208; GFX11-NEXT: s_waitcnt lgkmcnt(0)209; GFX11-NEXT: v_sub_nc_i32 v0, s6, s7 clamp210; GFX11-NEXT: s_sub_i32 s4, s6, s7211; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)212; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s4213; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, s4, v0214; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo215; GFX11-NEXT: s_clause 0x1216; GFX11-NEXT: global_store_b32 v1, v2, s[0:1]217; GFX11-NEXT: global_store_b8 v1, v0, s[2:3]218; GFX11-NEXT: s_endpgm219 %ssub = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) nounwind220 %val = extractvalue { i32, i1 } %ssub, 0221 %carry = extractvalue { i32, i1 } %ssub, 1222 store i32 %val, ptr addrspace(1) %out, align 4223 store i1 %carry, ptr addrspace(1) %carryout224 ret void225}226 227define amdgpu_kernel void @v_ssubo_i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {228; SI-LABEL: v_ssubo_i32:229; SI: ; %bb.0:230; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9231; SI-NEXT: s_mov_b32 s11, 0xf000232; SI-NEXT: s_mov_b32 s10, -1233; SI-NEXT: s_mov_b32 s14, s10234; SI-NEXT: s_mov_b32 s15, s11235; SI-NEXT: s_waitcnt lgkmcnt(0)236; SI-NEXT: s_mov_b32 s12, s4237; SI-NEXT: s_mov_b32 s13, s5238; SI-NEXT: s_mov_b32 s4, s6239; SI-NEXT: s_mov_b32 s5, s7240; SI-NEXT: s_mov_b32 s6, s10241; SI-NEXT: s_mov_b32 s7, s11242; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0243; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0244; SI-NEXT: s_mov_b32 s8, s0245; SI-NEXT: s_mov_b32 s9, s1246; SI-NEXT: s_mov_b32 s4, s2247; SI-NEXT: s_mov_b32 s5, s3248; SI-NEXT: s_waitcnt vmcnt(0)249; SI-NEXT: v_sub_i32_e32 v2, vcc, v0, v1250; SI-NEXT: v_cmp_lt_i32_e32 vcc, 0, v1251; SI-NEXT: v_cmp_lt_i32_e64 s[0:1], v2, v0252; SI-NEXT: s_xor_b64 s[0:1], vcc, s[0:1]253; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]254; SI-NEXT: buffer_store_dword v2, off, s[8:11], 0255; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0256; SI-NEXT: s_endpgm257;258; VI-LABEL: v_ssubo_i32:259; VI: ; %bb.0:260; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24261; VI-NEXT: s_waitcnt lgkmcnt(0)262; VI-NEXT: v_mov_b32_e32 v0, s4263; VI-NEXT: v_mov_b32_e32 v1, s5264; VI-NEXT: v_mov_b32_e32 v2, s6265; VI-NEXT: v_mov_b32_e32 v3, s7266; VI-NEXT: flat_load_dword v4, v[0:1]267; VI-NEXT: flat_load_dword v5, v[2:3]268; VI-NEXT: v_mov_b32_e32 v0, s0269; VI-NEXT: v_mov_b32_e32 v1, s1270; VI-NEXT: v_mov_b32_e32 v2, s2271; VI-NEXT: v_mov_b32_e32 v3, s3272; VI-NEXT: s_waitcnt vmcnt(0)273; VI-NEXT: v_sub_u32_e32 v6, vcc, v4, v5274; VI-NEXT: v_cmp_lt_i32_e32 vcc, 0, v5275; VI-NEXT: v_cmp_lt_i32_e64 s[0:1], v6, v4276; VI-NEXT: s_xor_b64 s[0:1], vcc, s[0:1]277; VI-NEXT: flat_store_dword v[0:1], v6278; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]279; VI-NEXT: flat_store_byte v[2:3], v0280; VI-NEXT: s_endpgm281;282; GFX9-LABEL: v_ssubo_i32:283; GFX9: ; %bb.0:284; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24285; GFX9-NEXT: v_mov_b32_e32 v0, 0286; GFX9-NEXT: s_waitcnt lgkmcnt(0)287; GFX9-NEXT: global_load_dword v1, v0, s[12:13]288; GFX9-NEXT: global_load_dword v2, v0, s[14:15]289; GFX9-NEXT: s_waitcnt vmcnt(0)290; GFX9-NEXT: v_sub_i32 v3, v1, v2 clamp291; GFX9-NEXT: v_sub_u32_e32 v1, v1, v2292; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, v1, v3293; GFX9-NEXT: global_store_dword v0, v1, s[8:9]294; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc295; GFX9-NEXT: global_store_byte v0, v1, s[10:11]296; GFX9-NEXT: s_endpgm297;298; GFX10-LABEL: v_ssubo_i32:299; GFX10: ; %bb.0:300; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24301; GFX10-NEXT: v_mov_b32_e32 v0, 0302; GFX10-NEXT: s_waitcnt lgkmcnt(0)303; GFX10-NEXT: s_clause 0x1304; GFX10-NEXT: global_load_dword v1, v0, s[12:13]305; GFX10-NEXT: global_load_dword v2, v0, s[14:15]306; GFX10-NEXT: s_waitcnt vmcnt(0)307; GFX10-NEXT: v_sub_nc_i32 v3, v1, v2 clamp308; GFX10-NEXT: v_sub_nc_u32_e32 v1, v1, v2309; GFX10-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v3310; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo311; GFX10-NEXT: global_store_dword v0, v1, s[8:9]312; GFX10-NEXT: global_store_byte v0, v2, s[10:11]313; GFX10-NEXT: s_endpgm314;315; GFX11-LABEL: v_ssubo_i32:316; GFX11: ; %bb.0:317; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24318; GFX11-NEXT: v_mov_b32_e32 v0, 0319; GFX11-NEXT: s_waitcnt lgkmcnt(0)320; GFX11-NEXT: s_clause 0x1321; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]322; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]323; GFX11-NEXT: s_waitcnt vmcnt(0)324; GFX11-NEXT: v_sub_nc_i32 v3, v1, v2 clamp325; GFX11-NEXT: v_sub_nc_u32_e32 v1, v1, v2326; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)327; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v1, v3328; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo329; GFX11-NEXT: s_clause 0x1330; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]331; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]332; GFX11-NEXT: s_endpgm333 %a = load i32, ptr addrspace(1) %aptr, align 4334 %b = load i32, ptr addrspace(1) %bptr, align 4335 %ssub = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 %a, i32 %b) nounwind336 %val = extractvalue { i32, i1 } %ssub, 0337 %carry = extractvalue { i32, i1 } %ssub, 1338 store i32 %val, ptr addrspace(1) %out, align 4339 store i1 %carry, ptr addrspace(1) %carryout340 ret void341}342 343define amdgpu_kernel void @s_ssubo_i64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a, i64 %b) nounwind {344; SI-LABEL: s_ssubo_i64:345; SI: ; %bb.0:346; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9347; SI-NEXT: s_mov_b32 s11, 0xf000348; SI-NEXT: s_mov_b32 s10, -1349; SI-NEXT: s_waitcnt lgkmcnt(0)350; SI-NEXT: s_sub_u32 s12, s4, s6351; SI-NEXT: v_mov_b32_e32 v0, s4352; SI-NEXT: s_subb_u32 s13, s5, s7353; SI-NEXT: v_mov_b32_e32 v1, s5354; SI-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[0:1]355; SI-NEXT: v_cmp_gt_i64_e64 s[4:5], s[6:7], 0356; SI-NEXT: v_mov_b32_e32 v0, s12357; SI-NEXT: s_mov_b32 s8, s0358; SI-NEXT: s_mov_b32 s9, s1359; SI-NEXT: v_mov_b32_e32 v1, s13360; SI-NEXT: s_xor_b64 s[4:5], s[4:5], vcc361; SI-NEXT: s_mov_b32 s0, s2362; SI-NEXT: s_mov_b32 s1, s3363; SI-NEXT: s_mov_b32 s2, s10364; SI-NEXT: s_mov_b32 s3, s11365; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0366; SI-NEXT: s_waitcnt expcnt(0)367; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]368; SI-NEXT: buffer_store_byte v0, off, s[0:3], 0369; SI-NEXT: s_endpgm370;371; VI-LABEL: s_ssubo_i64:372; VI: ; %bb.0:373; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24374; VI-NEXT: s_waitcnt lgkmcnt(0)375; VI-NEXT: v_mov_b32_e32 v0, s0376; VI-NEXT: s_sub_u32 s0, s4, s6377; VI-NEXT: v_mov_b32_e32 v4, s4378; VI-NEXT: v_mov_b32_e32 v1, s1379; VI-NEXT: s_subb_u32 s1, s5, s7380; VI-NEXT: v_mov_b32_e32 v5, s5381; VI-NEXT: v_mov_b32_e32 v2, s2382; VI-NEXT: v_mov_b32_e32 v3, s3383; VI-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[4:5]384; VI-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0385; VI-NEXT: v_mov_b32_e32 v5, s1386; VI-NEXT: v_mov_b32_e32 v4, s0387; VI-NEXT: s_xor_b64 s[0:1], s[2:3], vcc388; VI-NEXT: flat_store_dwordx2 v[0:1], v[4:5]389; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]390; VI-NEXT: flat_store_byte v[2:3], v0391; VI-NEXT: s_endpgm392;393; GFX9-LABEL: s_ssubo_i64:394; GFX9: ; %bb.0:395; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24396; GFX9-NEXT: v_mov_b32_e32 v2, 0397; GFX9-NEXT: s_waitcnt lgkmcnt(0)398; GFX9-NEXT: s_sub_u32 s0, s12, s14399; GFX9-NEXT: v_mov_b32_e32 v0, s12400; GFX9-NEXT: v_mov_b32_e32 v1, s13401; GFX9-NEXT: s_subb_u32 s1, s13, s15402; GFX9-NEXT: v_cmp_gt_i64_e64 s[2:3], s[14:15], 0403; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]404; GFX9-NEXT: v_mov_b32_e32 v0, s0405; GFX9-NEXT: v_mov_b32_e32 v1, s1406; GFX9-NEXT: s_xor_b64 s[0:1], s[2:3], vcc407; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]408; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]409; GFX9-NEXT: global_store_byte v2, v0, s[10:11]410; GFX9-NEXT: s_endpgm411;412; GFX10-LABEL: s_ssubo_i64:413; GFX10: ; %bb.0:414; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24415; GFX10-NEXT: v_mov_b32_e32 v2, 0416; GFX10-NEXT: s_waitcnt lgkmcnt(0)417; GFX10-NEXT: s_sub_u32 s0, s12, s14418; GFX10-NEXT: s_subb_u32 s1, s13, s15419; GFX10-NEXT: v_cmp_gt_i64_e64 s2, s[14:15], 0420; GFX10-NEXT: v_cmp_lt_i64_e64 s3, s[0:1], s[12:13]421; GFX10-NEXT: v_mov_b32_e32 v0, s0422; GFX10-NEXT: v_mov_b32_e32 v1, s1423; GFX10-NEXT: s_xor_b32 s0, s2, s3424; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0425; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]426; GFX10-NEXT: global_store_byte v2, v3, s[10:11]427; GFX10-NEXT: s_endpgm428;429; GFX11-LABEL: s_ssubo_i64:430; GFX11: ; %bb.0:431; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24432; GFX11-NEXT: s_waitcnt lgkmcnt(0)433; GFX11-NEXT: s_sub_u32 s8, s4, s6434; GFX11-NEXT: s_subb_u32 s9, s5, s7435; GFX11-NEXT: v_cmp_gt_i64_e64 s6, s[6:7], 0436; GFX11-NEXT: v_cmp_lt_i64_e64 s4, s[8:9], s[4:5]437; GFX11-NEXT: v_mov_b32_e32 v0, s8438; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s9439; GFX11-NEXT: s_xor_b32 s4, s6, s4440; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)441; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4442; GFX11-NEXT: s_clause 0x1443; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]444; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]445; GFX11-NEXT: s_endpgm446 %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind447 %val = extractvalue { i64, i1 } %ssub, 0448 %carry = extractvalue { i64, i1 } %ssub, 1449 store i64 %val, ptr addrspace(1) %out, align 8450 store i1 %carry, ptr addrspace(1) %carryout451 ret void452}453 454define amdgpu_kernel void @v_ssubo_i64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {455; SI-LABEL: v_ssubo_i64:456; SI: ; %bb.0:457; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9458; SI-NEXT: s_mov_b32 s11, 0xf000459; SI-NEXT: s_mov_b32 s10, -1460; SI-NEXT: s_mov_b32 s14, s10461; SI-NEXT: s_mov_b32 s15, s11462; SI-NEXT: s_waitcnt lgkmcnt(0)463; SI-NEXT: s_mov_b32 s12, s4464; SI-NEXT: s_mov_b32 s13, s5465; SI-NEXT: s_mov_b32 s4, s6466; SI-NEXT: s_mov_b32 s5, s7467; SI-NEXT: s_mov_b32 s6, s10468; SI-NEXT: s_mov_b32 s7, s11469; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[12:15], 0470; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[4:7], 0471; SI-NEXT: s_mov_b32 s8, s0472; SI-NEXT: s_mov_b32 s9, s1473; SI-NEXT: s_mov_b32 s4, s2474; SI-NEXT: s_mov_b32 s5, s3475; SI-NEXT: s_waitcnt vmcnt(0)476; SI-NEXT: v_sub_i32_e32 v4, vcc, v0, v2477; SI-NEXT: v_subb_u32_e32 v5, vcc, v1, v3, vcc478; SI-NEXT: v_cmp_lt_i64_e32 vcc, 0, v[2:3]479; SI-NEXT: v_cmp_lt_i64_e64 s[0:1], v[4:5], v[0:1]480; SI-NEXT: buffer_store_dwordx2 v[4:5], off, s[8:11], 0481; SI-NEXT: s_xor_b64 s[0:1], vcc, s[0:1]482; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]483; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0484; SI-NEXT: s_endpgm485;486; VI-LABEL: v_ssubo_i64:487; VI: ; %bb.0:488; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24489; VI-NEXT: s_waitcnt lgkmcnt(0)490; VI-NEXT: v_mov_b32_e32 v0, s4491; VI-NEXT: v_mov_b32_e32 v1, s5492; VI-NEXT: v_mov_b32_e32 v2, s6493; VI-NEXT: v_mov_b32_e32 v3, s7494; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]495; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]496; VI-NEXT: v_mov_b32_e32 v4, s0497; VI-NEXT: v_mov_b32_e32 v5, s1498; VI-NEXT: v_mov_b32_e32 v6, s2499; VI-NEXT: v_mov_b32_e32 v7, s3500; VI-NEXT: s_waitcnt vmcnt(0)501; VI-NEXT: v_sub_u32_e32 v8, vcc, v0, v2502; VI-NEXT: v_subb_u32_e32 v9, vcc, v1, v3, vcc503; VI-NEXT: v_cmp_lt_i64_e32 vcc, 0, v[2:3]504; VI-NEXT: v_cmp_lt_i64_e64 s[0:1], v[8:9], v[0:1]505; VI-NEXT: flat_store_dwordx2 v[4:5], v[8:9]506; VI-NEXT: s_xor_b64 s[0:1], vcc, s[0:1]507; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]508; VI-NEXT: flat_store_byte v[6:7], v0509; VI-NEXT: s_endpgm510;511; GFX9-LABEL: v_ssubo_i64:512; GFX9: ; %bb.0:513; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24514; GFX9-NEXT: v_mov_b32_e32 v6, 0515; GFX9-NEXT: s_waitcnt lgkmcnt(0)516; GFX9-NEXT: global_load_dwordx2 v[0:1], v6, s[12:13]517; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[14:15]518; GFX9-NEXT: s_waitcnt vmcnt(0)519; GFX9-NEXT: v_sub_co_u32_e32 v4, vcc, v0, v2520; GFX9-NEXT: v_subb_co_u32_e32 v5, vcc, v1, v3, vcc521; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, 0, v[2:3]522; GFX9-NEXT: v_cmp_lt_i64_e64 s[0:1], v[4:5], v[0:1]523; GFX9-NEXT: global_store_dwordx2 v6, v[4:5], s[8:9]524; GFX9-NEXT: s_xor_b64 s[0:1], vcc, s[0:1]525; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]526; GFX9-NEXT: global_store_byte v6, v0, s[10:11]527; GFX9-NEXT: s_endpgm528;529; GFX10-LABEL: v_ssubo_i64:530; GFX10: ; %bb.0:531; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24532; GFX10-NEXT: v_mov_b32_e32 v6, 0533; GFX10-NEXT: s_waitcnt lgkmcnt(0)534; GFX10-NEXT: s_clause 0x1535; GFX10-NEXT: global_load_dwordx2 v[0:1], v6, s[12:13]536; GFX10-NEXT: global_load_dwordx2 v[2:3], v6, s[14:15]537; GFX10-NEXT: s_waitcnt vmcnt(0)538; GFX10-NEXT: v_sub_co_u32 v4, vcc_lo, v0, v2539; GFX10-NEXT: v_sub_co_ci_u32_e32 v5, vcc_lo, v1, v3, vcc_lo540; GFX10-NEXT: v_cmp_lt_i64_e32 vcc_lo, 0, v[2:3]541; GFX10-NEXT: v_cmp_lt_i64_e64 s0, v[4:5], v[0:1]542; GFX10-NEXT: s_xor_b32 s0, vcc_lo, s0543; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0544; GFX10-NEXT: global_store_dwordx2 v6, v[4:5], s[8:9]545; GFX10-NEXT: global_store_byte v6, v0, s[10:11]546; GFX10-NEXT: s_endpgm547;548; GFX11-LABEL: v_ssubo_i64:549; GFX11: ; %bb.0:550; GFX11-NEXT: s_load_b256 s[4:11], s[4:5], 0x24551; GFX11-NEXT: v_mov_b32_e32 v6, 0552; GFX11-NEXT: s_waitcnt lgkmcnt(0)553; GFX11-NEXT: s_clause 0x1554; GFX11-NEXT: global_load_b64 v[0:1], v6, s[8:9]555; GFX11-NEXT: global_load_b64 v[2:3], v6, s[10:11]556; GFX11-NEXT: s_waitcnt vmcnt(0)557; GFX11-NEXT: v_sub_co_u32 v4, vcc_lo, v0, v2558; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)559; GFX11-NEXT: v_sub_co_ci_u32_e64 v5, null, v1, v3, vcc_lo560; GFX11-NEXT: v_cmp_lt_i64_e32 vcc_lo, 0, v[2:3]561; GFX11-NEXT: v_cmp_lt_i64_e64 s0, v[4:5], v[0:1]562; GFX11-NEXT: s_xor_b32 s0, vcc_lo, s0563; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)564; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0565; GFX11-NEXT: s_clause 0x1566; GFX11-NEXT: global_store_b64 v6, v[4:5], s[4:5]567; GFX11-NEXT: global_store_b8 v6, v0, s[6:7]568; GFX11-NEXT: s_endpgm569 %a = load i64, ptr addrspace(1) %aptr, align 4570 %b = load i64, ptr addrspace(1) %bptr, align 4571 %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind572 %val = extractvalue { i64, i1 } %ssub, 0573 %carry = extractvalue { i64, i1 } %ssub, 1574 store i64 %val, ptr addrspace(1) %out, align 8575 store i1 %carry, ptr addrspace(1) %carryout576 ret void577}578 579define amdgpu_kernel void @v_ssubo_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {580; SI-LABEL: v_ssubo_v2i32:581; SI: ; %bb.0:582; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9583; SI-NEXT: s_mov_b32 s11, 0xf000584; SI-NEXT: s_mov_b32 s10, -1585; SI-NEXT: s_mov_b32 s14, s10586; SI-NEXT: s_mov_b32 s15, s11587; SI-NEXT: s_waitcnt lgkmcnt(0)588; SI-NEXT: s_mov_b32 s12, s4589; SI-NEXT: s_mov_b32 s13, s5590; SI-NEXT: s_mov_b32 s4, s6591; SI-NEXT: s_mov_b32 s5, s7592; SI-NEXT: s_mov_b32 s6, s10593; SI-NEXT: s_mov_b32 s7, s11594; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[12:15], 0595; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[4:7], 0596; SI-NEXT: s_mov_b32 s8, s0597; SI-NEXT: s_mov_b32 s9, s1598; SI-NEXT: s_mov_b32 s12, s2599; SI-NEXT: s_mov_b32 s13, s3600; SI-NEXT: s_waitcnt vmcnt(0)601; SI-NEXT: v_sub_i32_e32 v5, vcc, v1, v3602; SI-NEXT: v_sub_i32_e32 v4, vcc, v0, v2603; SI-NEXT: v_cmp_lt_i32_e64 s[0:1], 0, v3604; SI-NEXT: v_cmp_lt_i32_e64 s[4:5], v5, v1605; SI-NEXT: v_cmp_lt_i32_e32 vcc, 0, v2606; SI-NEXT: v_cmp_lt_i32_e64 s[2:3], v4, v0607; SI-NEXT: s_xor_b64 s[0:1], s[0:1], s[4:5]608; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]609; SI-NEXT: s_xor_b64 s[0:1], vcc, s[2:3]610; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]611; SI-NEXT: buffer_store_dwordx2 v[4:5], off, s[8:11], 0612; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[12:15], 0613; SI-NEXT: s_endpgm614;615; VI-LABEL: v_ssubo_v2i32:616; VI: ; %bb.0:617; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24618; VI-NEXT: s_waitcnt lgkmcnt(0)619; VI-NEXT: v_mov_b32_e32 v0, s4620; VI-NEXT: v_mov_b32_e32 v1, s5621; VI-NEXT: v_mov_b32_e32 v2, s6622; VI-NEXT: v_mov_b32_e32 v3, s7623; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]624; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]625; VI-NEXT: v_mov_b32_e32 v4, s0626; VI-NEXT: v_mov_b32_e32 v5, s1627; VI-NEXT: v_mov_b32_e32 v6, s2628; VI-NEXT: v_mov_b32_e32 v7, s3629; VI-NEXT: s_waitcnt vmcnt(0)630; VI-NEXT: v_sub_u32_e32 v9, vcc, v1, v3631; VI-NEXT: v_sub_u32_e32 v8, vcc, v0, v2632; VI-NEXT: v_cmp_lt_i32_e64 s[0:1], 0, v3633; VI-NEXT: v_cmp_lt_i32_e64 s[4:5], v9, v1634; VI-NEXT: v_cmp_lt_i32_e32 vcc, 0, v2635; VI-NEXT: v_cmp_lt_i32_e64 s[2:3], v8, v0636; VI-NEXT: s_xor_b64 s[0:1], s[0:1], s[4:5]637; VI-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]638; VI-NEXT: s_xor_b64 s[0:1], vcc, s[2:3]639; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]640; VI-NEXT: flat_store_dwordx2 v[4:5], v[8:9]641; VI-NEXT: flat_store_dwordx2 v[6:7], v[0:1]642; VI-NEXT: s_endpgm643;644; GFX9-LABEL: v_ssubo_v2i32:645; GFX9: ; %bb.0:646; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24647; GFX9-NEXT: v_mov_b32_e32 v6, 0648; GFX9-NEXT: s_waitcnt lgkmcnt(0)649; GFX9-NEXT: global_load_dwordx2 v[0:1], v6, s[12:13]650; GFX9-NEXT: global_load_dwordx2 v[2:3], v6, s[14:15]651; GFX9-NEXT: s_waitcnt vmcnt(0)652; GFX9-NEXT: v_sub_u32_e32 v5, v1, v3653; GFX9-NEXT: v_sub_i32 v1, v1, v3 clamp654; GFX9-NEXT: v_sub_u32_e32 v4, v0, v2655; GFX9-NEXT: v_sub_i32 v0, v0, v2 clamp656; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, v5, v1657; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc658; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, v4, v0659; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc660; GFX9-NEXT: global_store_dwordx2 v6, v[4:5], s[8:9]661; GFX9-NEXT: global_store_dwordx2 v6, v[0:1], s[10:11]662; GFX9-NEXT: s_endpgm663;664; GFX10-LABEL: v_ssubo_v2i32:665; GFX10: ; %bb.0:666; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24667; GFX10-NEXT: v_mov_b32_e32 v5, 0668; GFX10-NEXT: s_waitcnt lgkmcnt(0)669; GFX10-NEXT: s_clause 0x1670; GFX10-NEXT: global_load_dwordx2 v[0:1], v5, s[12:13]671; GFX10-NEXT: global_load_dwordx2 v[2:3], v5, s[14:15]672; GFX10-NEXT: s_waitcnt vmcnt(0)673; GFX10-NEXT: v_sub_nc_u32_e32 v4, v1, v3674; GFX10-NEXT: v_sub_nc_i32 v1, v1, v3 clamp675; GFX10-NEXT: v_sub_nc_u32_e32 v3, v0, v2676; GFX10-NEXT: v_sub_nc_i32 v0, v0, v2 clamp677; GFX10-NEXT: v_cmp_ne_u32_e32 vcc_lo, v4, v1678; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo679; GFX10-NEXT: v_cmp_ne_u32_e32 vcc_lo, v3, v0680; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo681; GFX10-NEXT: global_store_dwordx2 v5, v[3:4], s[8:9]682; GFX10-NEXT: global_store_dwordx2 v5, v[0:1], s[10:11]683; GFX10-NEXT: s_endpgm684;685; GFX11-LABEL: v_ssubo_v2i32:686; GFX11: ; %bb.0:687; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24688; GFX11-NEXT: v_mov_b32_e32 v5, 0689; GFX11-NEXT: s_waitcnt lgkmcnt(0)690; GFX11-NEXT: s_clause 0x1691; GFX11-NEXT: global_load_b64 v[0:1], v5, s[4:5]692; GFX11-NEXT: global_load_b64 v[2:3], v5, s[6:7]693; GFX11-NEXT: s_waitcnt vmcnt(0)694; GFX11-NEXT: v_sub_nc_u32_e32 v4, v1, v3695; GFX11-NEXT: v_sub_nc_i32 v1, v1, v3 clamp696; GFX11-NEXT: v_sub_nc_u32_e32 v3, v0, v2697; GFX11-NEXT: v_sub_nc_i32 v0, v0, v2 clamp698; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)699; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v4, v1700; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo701; GFX11-NEXT: v_cmp_ne_u32_e32 vcc_lo, v3, v0702; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo703; GFX11-NEXT: s_clause 0x1704; GFX11-NEXT: global_store_b64 v5, v[3:4], s[0:1]705; GFX11-NEXT: global_store_b64 v5, v[0:1], s[2:3]706; GFX11-NEXT: s_endpgm707 %a = load <2 x i32>, ptr addrspace(1) %aptr, align 4708 %b = load <2 x i32>, ptr addrspace(1) %bptr, align 4709 %sadd = call { <2 x i32>, <2 x i1> } @llvm.ssub.with.overflow.v2i32(<2 x i32> %a, <2 x i32> %b) nounwind710 %val = extractvalue { <2 x i32>, <2 x i1> } %sadd, 0711 %carry = extractvalue { <2 x i32>, <2 x i1> } %sadd, 1712 store <2 x i32> %val, ptr addrspace(1) %out, align 4713 %carry.ext = zext <2 x i1> %carry to <2 x i32>714 store <2 x i32> %carry.ext, ptr addrspace(1) %carryout715 ret void716}717