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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck --check-prefix=GFX9 %s3; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=hawaii < %s | FileCheck --check-prefix=GFX7 %s4; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=tahiti < %s | FileCheck --check-prefix=GFX6 %s5; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck --check-prefix=GFX10 %s6; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 < %s | FileCheck --check-prefix=GFX11 %s7 8define amdgpu_kernel void @store_lds_v4i32(ptr addrspace(3) %out, <4 x i32> %x) {9; GFX9-LABEL: store_lds_v4i32:10; GFX9: ; %bb.0:11; GFX9-NEXT: s_load_dword s6, s[4:5], 0x012; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x1013; GFX9-NEXT: s_waitcnt lgkmcnt(0)14; GFX9-NEXT: v_mov_b32_e32 v4, s615; GFX9-NEXT: v_mov_b32_e32 v0, s016; GFX9-NEXT: v_mov_b32_e32 v1, s117; GFX9-NEXT: v_mov_b32_e32 v2, s218; GFX9-NEXT: v_mov_b32_e32 v3, s319; GFX9-NEXT: ds_write_b128 v4, v[0:3]20; GFX9-NEXT: s_endpgm21;22; GFX7-LABEL: store_lds_v4i32:23; GFX7: ; %bb.0:24; GFX7-NEXT: s_load_dword s6, s[4:5], 0x025; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x426; GFX7-NEXT: s_mov_b32 m0, -127; GFX7-NEXT: s_waitcnt lgkmcnt(0)28; GFX7-NEXT: v_mov_b32_e32 v4, s629; GFX7-NEXT: v_mov_b32_e32 v0, s030; GFX7-NEXT: v_mov_b32_e32 v1, s131; GFX7-NEXT: v_mov_b32_e32 v2, s232; GFX7-NEXT: v_mov_b32_e32 v3, s333; GFX7-NEXT: ds_write_b128 v4, v[0:3]34; GFX7-NEXT: s_endpgm35;36; GFX6-LABEL: store_lds_v4i32:37; GFX6: ; %bb.0:38; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x439; GFX6-NEXT: s_load_dword s4, s[4:5], 0x040; GFX6-NEXT: s_mov_b32 m0, -141; GFX6-NEXT: s_waitcnt lgkmcnt(0)42; GFX6-NEXT: v_mov_b32_e32 v0, s243; GFX6-NEXT: v_mov_b32_e32 v1, s344; GFX6-NEXT: v_mov_b32_e32 v4, s445; GFX6-NEXT: v_mov_b32_e32 v2, s046; GFX6-NEXT: v_mov_b32_e32 v3, s147; GFX6-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset1:148; GFX6-NEXT: s_endpgm49;50; GFX10-LABEL: store_lds_v4i32:51; GFX10: ; %bb.0:52; GFX10-NEXT: s_clause 0x153; GFX10-NEXT: s_load_dword s6, s[4:5], 0x054; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x1055; GFX10-NEXT: s_waitcnt lgkmcnt(0)56; GFX10-NEXT: v_mov_b32_e32 v4, s657; GFX10-NEXT: v_mov_b32_e32 v0, s058; GFX10-NEXT: v_mov_b32_e32 v1, s159; GFX10-NEXT: v_mov_b32_e32 v2, s260; GFX10-NEXT: v_mov_b32_e32 v3, s361; GFX10-NEXT: ds_write_b128 v4, v[0:3]62; GFX10-NEXT: s_endpgm63;64; GFX11-LABEL: store_lds_v4i32:65; GFX11: ; %bb.0:66; GFX11-NEXT: s_clause 0x167; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x068; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x1069; GFX11-NEXT: s_waitcnt lgkmcnt(0)70; GFX11-NEXT: v_mov_b32_e32 v4, s671; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s372; GFX11-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s273; GFX11-NEXT: ds_store_b128 v4, v[0:3]74; GFX11-NEXT: s_endpgm75 store <4 x i32> %x, ptr addrspace(3) %out76 ret void77}78 79define amdgpu_kernel void @store_lds_v4i32_align1(ptr addrspace(3) %out, <4 x i32> %x) {80; GFX9-LABEL: store_lds_v4i32_align1:81; GFX9: ; %bb.0:82; GFX9-NEXT: s_load_dword s6, s[4:5], 0x083; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x1084; GFX9-NEXT: s_waitcnt lgkmcnt(0)85; GFX9-NEXT: v_mov_b32_e32 v0, s686; GFX9-NEXT: v_mov_b32_e32 v1, s387; GFX9-NEXT: v_mov_b32_e32 v2, s288; GFX9-NEXT: ds_write_b8 v0, v1 offset:1289; GFX9-NEXT: ds_write_b8_d16_hi v0, v1 offset:1490; GFX9-NEXT: ds_write_b8 v0, v2 offset:891; GFX9-NEXT: ds_write_b8_d16_hi v0, v2 offset:1092; GFX9-NEXT: v_mov_b32_e32 v1, s193; GFX9-NEXT: ds_write_b8 v0, v1 offset:494; GFX9-NEXT: ds_write_b8_d16_hi v0, v1 offset:695; GFX9-NEXT: v_mov_b32_e32 v1, s096; GFX9-NEXT: s_lshr_b32 s4, s3, 897; GFX9-NEXT: ds_write_b8 v0, v198; GFX9-NEXT: ds_write_b8_d16_hi v0, v1 offset:299; GFX9-NEXT: v_mov_b32_e32 v1, s4100; GFX9-NEXT: s_lshr_b32 s3, s3, 24101; GFX9-NEXT: ds_write_b8 v0, v1 offset:13102; GFX9-NEXT: v_mov_b32_e32 v1, s3103; GFX9-NEXT: s_lshr_b32 s3, s2, 8104; GFX9-NEXT: ds_write_b8 v0, v1 offset:15105; GFX9-NEXT: v_mov_b32_e32 v1, s3106; GFX9-NEXT: s_lshr_b32 s2, s2, 24107; GFX9-NEXT: ds_write_b8 v0, v1 offset:9108; GFX9-NEXT: v_mov_b32_e32 v1, s2109; GFX9-NEXT: s_lshr_b32 s2, s1, 8110; GFX9-NEXT: ds_write_b8 v0, v1 offset:11111; GFX9-NEXT: v_mov_b32_e32 v1, s2112; GFX9-NEXT: s_lshr_b32 s1, s1, 24113; GFX9-NEXT: ds_write_b8 v0, v1 offset:5114; GFX9-NEXT: v_mov_b32_e32 v1, s1115; GFX9-NEXT: s_lshr_b32 s1, s0, 8116; GFX9-NEXT: ds_write_b8 v0, v1 offset:7117; GFX9-NEXT: v_mov_b32_e32 v1, s1118; GFX9-NEXT: s_lshr_b32 s0, s0, 24119; GFX9-NEXT: ds_write_b8 v0, v1 offset:1120; GFX9-NEXT: v_mov_b32_e32 v1, s0121; GFX9-NEXT: ds_write_b8 v0, v1 offset:3122; GFX9-NEXT: s_endpgm123;124; GFX7-LABEL: store_lds_v4i32_align1:125; GFX7: ; %bb.0:126; GFX7-NEXT: s_load_dword s6, s[4:5], 0x0127; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4128; GFX7-NEXT: s_mov_b32 m0, -1129; GFX7-NEXT: s_waitcnt lgkmcnt(0)130; GFX7-NEXT: v_mov_b32_e32 v0, s6131; GFX7-NEXT: v_mov_b32_e32 v1, s3132; GFX7-NEXT: v_mov_b32_e32 v2, s2133; GFX7-NEXT: ds_write_b8 v0, v1 offset:12134; GFX7-NEXT: ds_write_b8 v0, v2 offset:8135; GFX7-NEXT: v_mov_b32_e32 v1, s1136; GFX7-NEXT: ds_write_b8 v0, v1 offset:4137; GFX7-NEXT: v_mov_b32_e32 v1, s0138; GFX7-NEXT: s_lshr_b32 s4, s3, 8139; GFX7-NEXT: ds_write_b8 v0, v1140; GFX7-NEXT: v_mov_b32_e32 v1, s4141; GFX7-NEXT: s_lshr_b32 s4, s3, 24142; GFX7-NEXT: ds_write_b8 v0, v1 offset:13143; GFX7-NEXT: v_mov_b32_e32 v1, s4144; GFX7-NEXT: s_lshr_b32 s3, s3, 16145; GFX7-NEXT: ds_write_b8 v0, v1 offset:15146; GFX7-NEXT: v_mov_b32_e32 v1, s3147; GFX7-NEXT: s_lshr_b32 s3, s2, 8148; GFX7-NEXT: ds_write_b8 v0, v1 offset:14149; GFX7-NEXT: v_mov_b32_e32 v1, s3150; GFX7-NEXT: s_lshr_b32 s3, s2, 24151; GFX7-NEXT: ds_write_b8 v0, v1 offset:9152; GFX7-NEXT: v_mov_b32_e32 v1, s3153; GFX7-NEXT: s_lshr_b32 s2, s2, 16154; GFX7-NEXT: ds_write_b8 v0, v1 offset:11155; GFX7-NEXT: v_mov_b32_e32 v1, s2156; GFX7-NEXT: s_lshr_b32 s2, s1, 8157; GFX7-NEXT: ds_write_b8 v0, v1 offset:10158; GFX7-NEXT: v_mov_b32_e32 v1, s2159; GFX7-NEXT: s_lshr_b32 s2, s1, 24160; GFX7-NEXT: ds_write_b8 v0, v1 offset:5161; GFX7-NEXT: v_mov_b32_e32 v1, s2162; GFX7-NEXT: s_lshr_b32 s1, s1, 16163; GFX7-NEXT: ds_write_b8 v0, v1 offset:7164; GFX7-NEXT: v_mov_b32_e32 v1, s1165; GFX7-NEXT: s_lshr_b32 s1, s0, 8166; GFX7-NEXT: ds_write_b8 v0, v1 offset:6167; GFX7-NEXT: v_mov_b32_e32 v1, s1168; GFX7-NEXT: s_lshr_b32 s1, s0, 24169; GFX7-NEXT: ds_write_b8 v0, v1 offset:1170; GFX7-NEXT: v_mov_b32_e32 v1, s1171; GFX7-NEXT: s_lshr_b32 s0, s0, 16172; GFX7-NEXT: ds_write_b8 v0, v1 offset:3173; GFX7-NEXT: v_mov_b32_e32 v1, s0174; GFX7-NEXT: ds_write_b8 v0, v1 offset:2175; GFX7-NEXT: s_endpgm176;177; GFX6-LABEL: store_lds_v4i32_align1:178; GFX6: ; %bb.0:179; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0180; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4181; GFX6-NEXT: s_mov_b32 m0, -1182; GFX6-NEXT: s_waitcnt lgkmcnt(0)183; GFX6-NEXT: v_mov_b32_e32 v0, s6184; GFX6-NEXT: v_mov_b32_e32 v1, s3185; GFX6-NEXT: v_mov_b32_e32 v2, s2186; GFX6-NEXT: ds_write_b8 v0, v1 offset:12187; GFX6-NEXT: ds_write_b8 v0, v2 offset:8188; GFX6-NEXT: v_mov_b32_e32 v1, s1189; GFX6-NEXT: ds_write_b8 v0, v1 offset:4190; GFX6-NEXT: v_mov_b32_e32 v1, s0191; GFX6-NEXT: s_lshr_b32 s4, s3, 8192; GFX6-NEXT: ds_write_b8 v0, v1193; GFX6-NEXT: v_mov_b32_e32 v1, s4194; GFX6-NEXT: s_lshr_b32 s4, s3, 24195; GFX6-NEXT: ds_write_b8 v0, v1 offset:13196; GFX6-NEXT: v_mov_b32_e32 v1, s4197; GFX6-NEXT: s_lshr_b32 s3, s3, 16198; GFX6-NEXT: ds_write_b8 v0, v1 offset:15199; GFX6-NEXT: v_mov_b32_e32 v1, s3200; GFX6-NEXT: s_lshr_b32 s3, s2, 8201; GFX6-NEXT: ds_write_b8 v0, v1 offset:14202; GFX6-NEXT: v_mov_b32_e32 v1, s3203; GFX6-NEXT: s_lshr_b32 s3, s2, 24204; GFX6-NEXT: ds_write_b8 v0, v1 offset:9205; GFX6-NEXT: v_mov_b32_e32 v1, s3206; GFX6-NEXT: s_lshr_b32 s2, s2, 16207; GFX6-NEXT: ds_write_b8 v0, v1 offset:11208; GFX6-NEXT: v_mov_b32_e32 v1, s2209; GFX6-NEXT: s_lshr_b32 s2, s1, 8210; GFX6-NEXT: ds_write_b8 v0, v1 offset:10211; GFX6-NEXT: v_mov_b32_e32 v1, s2212; GFX6-NEXT: s_lshr_b32 s2, s1, 24213; GFX6-NEXT: ds_write_b8 v0, v1 offset:5214; GFX6-NEXT: v_mov_b32_e32 v1, s2215; GFX6-NEXT: s_lshr_b32 s1, s1, 16216; GFX6-NEXT: ds_write_b8 v0, v1 offset:7217; GFX6-NEXT: v_mov_b32_e32 v1, s1218; GFX6-NEXT: s_lshr_b32 s1, s0, 8219; GFX6-NEXT: ds_write_b8 v0, v1 offset:6220; GFX6-NEXT: v_mov_b32_e32 v1, s1221; GFX6-NEXT: s_lshr_b32 s1, s0, 24222; GFX6-NEXT: ds_write_b8 v0, v1 offset:1223; GFX6-NEXT: v_mov_b32_e32 v1, s1224; GFX6-NEXT: s_lshr_b32 s0, s0, 16225; GFX6-NEXT: ds_write_b8 v0, v1 offset:3226; GFX6-NEXT: v_mov_b32_e32 v1, s0227; GFX6-NEXT: ds_write_b8 v0, v1 offset:2228; GFX6-NEXT: s_endpgm229;230; GFX10-LABEL: store_lds_v4i32_align1:231; GFX10: ; %bb.0:232; GFX10-NEXT: s_clause 0x1233; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0234; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10235; GFX10-NEXT: s_waitcnt lgkmcnt(0)236; GFX10-NEXT: v_mov_b32_e32 v0, s6237; GFX10-NEXT: v_mov_b32_e32 v1, s3238; GFX10-NEXT: v_mov_b32_e32 v2, s2239; GFX10-NEXT: s_lshr_b32 s5, s2, 8240; GFX10-NEXT: s_lshr_b32 s2, s2, 24241; GFX10-NEXT: v_mov_b32_e32 v3, s1242; GFX10-NEXT: s_lshr_b32 s4, s3, 8243; GFX10-NEXT: s_lshr_b32 s3, s3, 24244; GFX10-NEXT: s_lshr_b32 s6, s1, 8245; GFX10-NEXT: s_lshr_b32 s1, s1, 24246; GFX10-NEXT: v_mov_b32_e32 v8, s2247; GFX10-NEXT: v_mov_b32_e32 v4, s0248; GFX10-NEXT: v_mov_b32_e32 v5, s4249; GFX10-NEXT: v_mov_b32_e32 v6, s3250; GFX10-NEXT: v_mov_b32_e32 v7, s5251; GFX10-NEXT: v_mov_b32_e32 v9, s6252; GFX10-NEXT: ds_write_b8 v0, v1 offset:12253; GFX10-NEXT: ds_write_b8_d16_hi v0, v1 offset:14254; GFX10-NEXT: ds_write_b8 v0, v2 offset:8255; GFX10-NEXT: ds_write_b8_d16_hi v0, v2 offset:10256; GFX10-NEXT: ds_write_b8 v0, v3 offset:4257; GFX10-NEXT: ds_write_b8_d16_hi v0, v3 offset:6258; GFX10-NEXT: ds_write_b8 v0, v4259; GFX10-NEXT: ds_write_b8_d16_hi v0, v4 offset:2260; GFX10-NEXT: ds_write_b8 v0, v5 offset:13261; GFX10-NEXT: ds_write_b8 v0, v6 offset:15262; GFX10-NEXT: ds_write_b8 v0, v7 offset:9263; GFX10-NEXT: v_mov_b32_e32 v1, s1264; GFX10-NEXT: s_lshr_b32 s1, s0, 8265; GFX10-NEXT: s_lshr_b32 s0, s0, 24266; GFX10-NEXT: v_mov_b32_e32 v2, s1267; GFX10-NEXT: v_mov_b32_e32 v3, s0268; GFX10-NEXT: ds_write_b8 v0, v8 offset:11269; GFX10-NEXT: ds_write_b8 v0, v9 offset:5270; GFX10-NEXT: ds_write_b8 v0, v1 offset:7271; GFX10-NEXT: ds_write_b8 v0, v2 offset:1272; GFX10-NEXT: ds_write_b8 v0, v3 offset:3273; GFX10-NEXT: s_endpgm274;275; GFX11-LABEL: store_lds_v4i32_align1:276; GFX11: ; %bb.0:277; GFX11-NEXT: s_clause 0x1278; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x0279; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10280; GFX11-NEXT: s_waitcnt lgkmcnt(0)281; GFX11-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s3282; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s1283; GFX11-NEXT: s_lshr_b32 s4, s3, 8284; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)285; GFX11-NEXT: v_dual_mov_b32 v4, s0 :: v_dual_mov_b32 v5, s4286; GFX11-NEXT: s_lshr_b32 s5, s2, 8287; GFX11-NEXT: s_lshr_b32 s2, s2, 24288; GFX11-NEXT: s_lshr_b32 s6, s1, 8289; GFX11-NEXT: s_lshr_b32 s3, s3, 24290; GFX11-NEXT: s_lshr_b32 s1, s1, 24291; GFX11-NEXT: s_lshr_b32 s7, s0, 8292; GFX11-NEXT: s_lshr_b32 s0, s0, 24293; GFX11-NEXT: v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s6294; GFX11-NEXT: v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v7, s5295; GFX11-NEXT: v_mov_b32_e32 v10, s1296; GFX11-NEXT: ds_store_b8 v0, v2 offset:8297; GFX11-NEXT: ds_store_b8_d16_hi v0, v2 offset:10298; GFX11-NEXT: ds_store_b8 v0, v1 offset:12299; GFX11-NEXT: ds_store_b8_d16_hi v0, v1 offset:14300; GFX11-NEXT: ds_store_b8 v0, v5 offset:13301; GFX11-NEXT: ds_store_b8 v0, v6 offset:15302; GFX11-NEXT: ds_store_b8 v0, v7 offset:9303; GFX11-NEXT: ds_store_b8 v0, v8 offset:11304; GFX11-NEXT: v_dual_mov_b32 v1, s7 :: v_dual_mov_b32 v2, s0305; GFX11-NEXT: ds_store_b8 v0, v4306; GFX11-NEXT: ds_store_b8_d16_hi v0, v4 offset:2307; GFX11-NEXT: ds_store_b8 v0, v3 offset:4308; GFX11-NEXT: ds_store_b8_d16_hi v0, v3 offset:6309; GFX11-NEXT: ds_store_b8 v0, v9 offset:5310; GFX11-NEXT: ds_store_b8 v0, v10 offset:7311; GFX11-NEXT: ds_store_b8 v0, v1 offset:1312; GFX11-NEXT: ds_store_b8 v0, v2 offset:3313; GFX11-NEXT: s_endpgm314 store <4 x i32> %x, ptr addrspace(3) %out, align 1315 ret void316}317 318define amdgpu_kernel void @store_lds_v4i32_align2(ptr addrspace(3) %out, <4 x i32> %x) {319; GFX9-LABEL: store_lds_v4i32_align2:320; GFX9: ; %bb.0:321; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0322; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10323; GFX9-NEXT: s_waitcnt lgkmcnt(0)324; GFX9-NEXT: v_mov_b32_e32 v0, s6325; GFX9-NEXT: v_mov_b32_e32 v1, s3326; GFX9-NEXT: v_mov_b32_e32 v2, s2327; GFX9-NEXT: ds_write_b16 v0, v1 offset:12328; GFX9-NEXT: ds_write_b16_d16_hi v0, v1 offset:14329; GFX9-NEXT: ds_write_b16 v0, v2 offset:8330; GFX9-NEXT: ds_write_b16_d16_hi v0, v2 offset:10331; GFX9-NEXT: v_mov_b32_e32 v1, s1332; GFX9-NEXT: ds_write_b16 v0, v1 offset:4333; GFX9-NEXT: ds_write_b16_d16_hi v0, v1 offset:6334; GFX9-NEXT: v_mov_b32_e32 v1, s0335; GFX9-NEXT: ds_write_b16 v0, v1336; GFX9-NEXT: ds_write_b16_d16_hi v0, v1 offset:2337; GFX9-NEXT: s_endpgm338;339; GFX7-LABEL: store_lds_v4i32_align2:340; GFX7: ; %bb.0:341; GFX7-NEXT: s_load_dword s6, s[4:5], 0x0342; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4343; GFX7-NEXT: s_mov_b32 m0, -1344; GFX7-NEXT: s_waitcnt lgkmcnt(0)345; GFX7-NEXT: v_mov_b32_e32 v0, s6346; GFX7-NEXT: v_mov_b32_e32 v1, s3347; GFX7-NEXT: v_mov_b32_e32 v2, s2348; GFX7-NEXT: ds_write_b16 v0, v1 offset:12349; GFX7-NEXT: ds_write_b16 v0, v2 offset:8350; GFX7-NEXT: v_mov_b32_e32 v1, s1351; GFX7-NEXT: ds_write_b16 v0, v1 offset:4352; GFX7-NEXT: v_mov_b32_e32 v1, s0353; GFX7-NEXT: s_lshr_b32 s3, s3, 16354; GFX7-NEXT: ds_write_b16 v0, v1355; GFX7-NEXT: v_mov_b32_e32 v1, s3356; GFX7-NEXT: s_lshr_b32 s2, s2, 16357; GFX7-NEXT: ds_write_b16 v0, v1 offset:14358; GFX7-NEXT: v_mov_b32_e32 v1, s2359; GFX7-NEXT: s_lshr_b32 s1, s1, 16360; GFX7-NEXT: ds_write_b16 v0, v1 offset:10361; GFX7-NEXT: v_mov_b32_e32 v1, s1362; GFX7-NEXT: s_lshr_b32 s0, s0, 16363; GFX7-NEXT: ds_write_b16 v0, v1 offset:6364; GFX7-NEXT: v_mov_b32_e32 v1, s0365; GFX7-NEXT: ds_write_b16 v0, v1 offset:2366; GFX7-NEXT: s_endpgm367;368; GFX6-LABEL: store_lds_v4i32_align2:369; GFX6: ; %bb.0:370; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0371; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4372; GFX6-NEXT: s_mov_b32 m0, -1373; GFX6-NEXT: s_waitcnt lgkmcnt(0)374; GFX6-NEXT: v_mov_b32_e32 v0, s6375; GFX6-NEXT: v_mov_b32_e32 v1, s3376; GFX6-NEXT: v_mov_b32_e32 v2, s2377; GFX6-NEXT: ds_write_b16 v0, v1 offset:12378; GFX6-NEXT: ds_write_b16 v0, v2 offset:8379; GFX6-NEXT: v_mov_b32_e32 v1, s1380; GFX6-NEXT: ds_write_b16 v0, v1 offset:4381; GFX6-NEXT: v_mov_b32_e32 v1, s0382; GFX6-NEXT: s_lshr_b32 s3, s3, 16383; GFX6-NEXT: ds_write_b16 v0, v1384; GFX6-NEXT: v_mov_b32_e32 v1, s3385; GFX6-NEXT: s_lshr_b32 s2, s2, 16386; GFX6-NEXT: ds_write_b16 v0, v1 offset:14387; GFX6-NEXT: v_mov_b32_e32 v1, s2388; GFX6-NEXT: s_lshr_b32 s1, s1, 16389; GFX6-NEXT: ds_write_b16 v0, v1 offset:10390; GFX6-NEXT: v_mov_b32_e32 v1, s1391; GFX6-NEXT: s_lshr_b32 s0, s0, 16392; GFX6-NEXT: ds_write_b16 v0, v1 offset:6393; GFX6-NEXT: v_mov_b32_e32 v1, s0394; GFX6-NEXT: ds_write_b16 v0, v1 offset:2395; GFX6-NEXT: s_endpgm396;397; GFX10-LABEL: store_lds_v4i32_align2:398; GFX10: ; %bb.0:399; GFX10-NEXT: s_clause 0x1400; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0401; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10402; GFX10-NEXT: s_waitcnt lgkmcnt(0)403; GFX10-NEXT: v_mov_b32_e32 v0, s6404; GFX10-NEXT: v_mov_b32_e32 v1, s3405; GFX10-NEXT: v_mov_b32_e32 v2, s2406; GFX10-NEXT: v_mov_b32_e32 v3, s1407; GFX10-NEXT: v_mov_b32_e32 v4, s0408; GFX10-NEXT: ds_write_b16 v0, v1 offset:12409; GFX10-NEXT: ds_write_b16_d16_hi v0, v1 offset:14410; GFX10-NEXT: ds_write_b16 v0, v2 offset:8411; GFX10-NEXT: ds_write_b16_d16_hi v0, v2 offset:10412; GFX10-NEXT: ds_write_b16 v0, v3 offset:4413; GFX10-NEXT: ds_write_b16_d16_hi v0, v3 offset:6414; GFX10-NEXT: ds_write_b16 v0, v4415; GFX10-NEXT: ds_write_b16_d16_hi v0, v4 offset:2416; GFX10-NEXT: s_endpgm417;418; GFX11-LABEL: store_lds_v4i32_align2:419; GFX11: ; %bb.0:420; GFX11-NEXT: s_clause 0x1421; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x0422; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10423; GFX11-NEXT: s_waitcnt lgkmcnt(0)424; GFX11-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s0425; GFX11-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v3, s2426; GFX11-NEXT: v_mov_b32_e32 v4, s3427; GFX11-NEXT: ds_store_b16 v0, v1428; GFX11-NEXT: ds_store_b16 v0, v2 offset:4429; GFX11-NEXT: ds_store_b16 v0, v3 offset:8430; GFX11-NEXT: ds_store_b16 v0, v4 offset:12431; GFX11-NEXT: ds_store_b16_d16_hi v0, v4 offset:14432; GFX11-NEXT: ds_store_b16_d16_hi v0, v3 offset:10433; GFX11-NEXT: ds_store_b16_d16_hi v0, v2 offset:6434; GFX11-NEXT: ds_store_b16_d16_hi v0, v1 offset:2435; GFX11-NEXT: s_endpgm436 store <4 x i32> %x, ptr addrspace(3) %out, align 2437 ret void438}439 440define amdgpu_kernel void @store_lds_v4i32_align4(ptr addrspace(3) %out, <4 x i32> %x) {441; GFX9-LABEL: store_lds_v4i32_align4:442; GFX9: ; %bb.0:443; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0444; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10445; GFX9-NEXT: s_waitcnt lgkmcnt(0)446; GFX9-NEXT: v_mov_b32_e32 v0, s6447; GFX9-NEXT: v_mov_b32_e32 v1, s0448; GFX9-NEXT: v_mov_b32_e32 v2, s1449; GFX9-NEXT: v_mov_b32_e32 v3, s2450; GFX9-NEXT: ds_write2_b32 v0, v1, v2 offset1:1451; GFX9-NEXT: v_mov_b32_e32 v1, s3452; GFX9-NEXT: ds_write2_b32 v0, v3, v1 offset0:2 offset1:3453; GFX9-NEXT: s_endpgm454;455; GFX7-LABEL: store_lds_v4i32_align4:456; GFX7: ; %bb.0:457; GFX7-NEXT: s_load_dword s6, s[4:5], 0x0458; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4459; GFX7-NEXT: s_mov_b32 m0, -1460; GFX7-NEXT: s_waitcnt lgkmcnt(0)461; GFX7-NEXT: v_mov_b32_e32 v0, s6462; GFX7-NEXT: v_mov_b32_e32 v1, s0463; GFX7-NEXT: v_mov_b32_e32 v2, s1464; GFX7-NEXT: ds_write2_b32 v0, v1, v2 offset1:1465; GFX7-NEXT: v_mov_b32_e32 v1, s2466; GFX7-NEXT: v_mov_b32_e32 v2, s3467; GFX7-NEXT: ds_write2_b32 v0, v1, v2 offset0:2 offset1:3468; GFX7-NEXT: s_endpgm469;470; GFX6-LABEL: store_lds_v4i32_align4:471; GFX6: ; %bb.0:472; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0473; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4474; GFX6-NEXT: s_mov_b32 m0, -1475; GFX6-NEXT: s_waitcnt lgkmcnt(0)476; GFX6-NEXT: v_mov_b32_e32 v0, s6477; GFX6-NEXT: v_mov_b32_e32 v1, s2478; GFX6-NEXT: v_mov_b32_e32 v2, s3479; GFX6-NEXT: ds_write2_b32 v0, v1, v2 offset0:2 offset1:3480; GFX6-NEXT: v_mov_b32_e32 v1, s0481; GFX6-NEXT: v_mov_b32_e32 v2, s1482; GFX6-NEXT: ds_write2_b32 v0, v1, v2 offset1:1483; GFX6-NEXT: s_endpgm484;485; GFX10-LABEL: store_lds_v4i32_align4:486; GFX10: ; %bb.0:487; GFX10-NEXT: s_clause 0x1488; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0489; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10490; GFX10-NEXT: s_waitcnt lgkmcnt(0)491; GFX10-NEXT: v_mov_b32_e32 v0, s6492; GFX10-NEXT: v_mov_b32_e32 v1, s2493; GFX10-NEXT: v_mov_b32_e32 v2, s3494; GFX10-NEXT: v_mov_b32_e32 v3, s0495; GFX10-NEXT: v_mov_b32_e32 v4, s1496; GFX10-NEXT: ds_write2_b32 v0, v1, v2 offset0:2 offset1:3497; GFX10-NEXT: ds_write2_b32 v0, v3, v4 offset1:1498; GFX10-NEXT: s_endpgm499;500; GFX11-LABEL: store_lds_v4i32_align4:501; GFX11: ; %bb.0:502; GFX11-NEXT: s_clause 0x1503; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x0504; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10505; GFX11-NEXT: s_waitcnt lgkmcnt(0)506; GFX11-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s0507; GFX11-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v3, s2508; GFX11-NEXT: v_mov_b32_e32 v4, s3509; GFX11-NEXT: ds_store_2addr_b32 v0, v1, v2 offset1:1510; GFX11-NEXT: ds_store_2addr_b32 v0, v3, v4 offset0:2 offset1:3511; GFX11-NEXT: s_endpgm512 store <4 x i32> %x, ptr addrspace(3) %out, align 4513 ret void514}515 516define amdgpu_kernel void @store_lds_v4i32_align8(ptr addrspace(3) %out, <4 x i32> %x) {517; GFX9-LABEL: store_lds_v4i32_align8:518; GFX9: ; %bb.0:519; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0520; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10521; GFX9-NEXT: s_waitcnt lgkmcnt(0)522; GFX9-NEXT: v_mov_b32_e32 v4, s6523; GFX9-NEXT: v_mov_b32_e32 v0, s0524; GFX9-NEXT: v_mov_b32_e32 v2, s2525; GFX9-NEXT: v_mov_b32_e32 v1, s1526; GFX9-NEXT: v_mov_b32_e32 v3, s3527; GFX9-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1528; GFX9-NEXT: s_endpgm529;530; GFX7-LABEL: store_lds_v4i32_align8:531; GFX7: ; %bb.0:532; GFX7-NEXT: s_load_dword s6, s[4:5], 0x0533; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4534; GFX7-NEXT: s_mov_b32 m0, -1535; GFX7-NEXT: s_waitcnt lgkmcnt(0)536; GFX7-NEXT: v_mov_b32_e32 v4, s6537; GFX7-NEXT: v_mov_b32_e32 v0, s0538; GFX7-NEXT: v_mov_b32_e32 v2, s2539; GFX7-NEXT: v_mov_b32_e32 v1, s1540; GFX7-NEXT: v_mov_b32_e32 v3, s3541; GFX7-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1542; GFX7-NEXT: s_endpgm543;544; GFX6-LABEL: store_lds_v4i32_align8:545; GFX6: ; %bb.0:546; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4547; GFX6-NEXT: s_load_dword s4, s[4:5], 0x0548; GFX6-NEXT: s_mov_b32 m0, -1549; GFX6-NEXT: s_waitcnt lgkmcnt(0)550; GFX6-NEXT: v_mov_b32_e32 v0, s0551; GFX6-NEXT: v_mov_b32_e32 v1, s1552; GFX6-NEXT: v_mov_b32_e32 v4, s4553; GFX6-NEXT: v_mov_b32_e32 v2, s2554; GFX6-NEXT: v_mov_b32_e32 v3, s3555; GFX6-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1556; GFX6-NEXT: s_endpgm557;558; GFX10-LABEL: store_lds_v4i32_align8:559; GFX10: ; %bb.0:560; GFX10-NEXT: s_clause 0x1561; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10562; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0563; GFX10-NEXT: s_waitcnt lgkmcnt(0)564; GFX10-NEXT: v_mov_b32_e32 v0, s0565; GFX10-NEXT: v_mov_b32_e32 v1, s1566; GFX10-NEXT: v_mov_b32_e32 v4, s6567; GFX10-NEXT: v_mov_b32_e32 v2, s2568; GFX10-NEXT: v_mov_b32_e32 v3, s3569; GFX10-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1570; GFX10-NEXT: s_endpgm571;572; GFX11-LABEL: store_lds_v4i32_align8:573; GFX11: ; %bb.0:574; GFX11-NEXT: s_clause 0x1575; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x0576; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10577; GFX11-NEXT: s_waitcnt lgkmcnt(0)578; GFX11-NEXT: v_mov_b32_e32 v4, s6579; GFX11-NEXT: v_mov_b32_e32 v0, s0580; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v1, s1581; GFX11-NEXT: v_mov_b32_e32 v3, s3582; GFX11-NEXT: ds_store_2addr_b64 v4, v[0:1], v[2:3] offset1:1583; GFX11-NEXT: s_endpgm584 store <4 x i32> %x, ptr addrspace(3) %out, align 8585 ret void586}587 588define amdgpu_kernel void @store_lds_v4i32_align16(ptr addrspace(3) %out, <4 x i32> %x) {589; GFX9-LABEL: store_lds_v4i32_align16:590; GFX9: ; %bb.0:591; GFX9-NEXT: s_load_dword s6, s[4:5], 0x0592; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10593; GFX9-NEXT: s_waitcnt lgkmcnt(0)594; GFX9-NEXT: v_mov_b32_e32 v4, s6595; GFX9-NEXT: v_mov_b32_e32 v0, s0596; GFX9-NEXT: v_mov_b32_e32 v1, s1597; GFX9-NEXT: v_mov_b32_e32 v2, s2598; GFX9-NEXT: v_mov_b32_e32 v3, s3599; GFX9-NEXT: ds_write_b128 v4, v[0:3]600; GFX9-NEXT: s_endpgm601;602; GFX7-LABEL: store_lds_v4i32_align16:603; GFX7: ; %bb.0:604; GFX7-NEXT: s_load_dword s6, s[4:5], 0x0605; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4606; GFX7-NEXT: s_mov_b32 m0, -1607; GFX7-NEXT: s_waitcnt lgkmcnt(0)608; GFX7-NEXT: v_mov_b32_e32 v4, s6609; GFX7-NEXT: v_mov_b32_e32 v0, s0610; GFX7-NEXT: v_mov_b32_e32 v1, s1611; GFX7-NEXT: v_mov_b32_e32 v2, s2612; GFX7-NEXT: v_mov_b32_e32 v3, s3613; GFX7-NEXT: ds_write_b128 v4, v[0:3]614; GFX7-NEXT: s_endpgm615;616; GFX6-LABEL: store_lds_v4i32_align16:617; GFX6: ; %bb.0:618; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4619; GFX6-NEXT: s_load_dword s4, s[4:5], 0x0620; GFX6-NEXT: s_mov_b32 m0, -1621; GFX6-NEXT: s_waitcnt lgkmcnt(0)622; GFX6-NEXT: v_mov_b32_e32 v0, s2623; GFX6-NEXT: v_mov_b32_e32 v1, s3624; GFX6-NEXT: v_mov_b32_e32 v4, s4625; GFX6-NEXT: v_mov_b32_e32 v2, s0626; GFX6-NEXT: v_mov_b32_e32 v3, s1627; GFX6-NEXT: ds_write2_b64 v4, v[2:3], v[0:1] offset1:1628; GFX6-NEXT: s_endpgm629;630; GFX10-LABEL: store_lds_v4i32_align16:631; GFX10: ; %bb.0:632; GFX10-NEXT: s_clause 0x1633; GFX10-NEXT: s_load_dword s6, s[4:5], 0x0634; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10635; GFX10-NEXT: s_waitcnt lgkmcnt(0)636; GFX10-NEXT: v_mov_b32_e32 v4, s6637; GFX10-NEXT: v_mov_b32_e32 v0, s0638; GFX10-NEXT: v_mov_b32_e32 v1, s1639; GFX10-NEXT: v_mov_b32_e32 v2, s2640; GFX10-NEXT: v_mov_b32_e32 v3, s3641; GFX10-NEXT: ds_write_b128 v4, v[0:3]642; GFX10-NEXT: s_endpgm643;644; GFX11-LABEL: store_lds_v4i32_align16:645; GFX11: ; %bb.0:646; GFX11-NEXT: s_clause 0x1647; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x0648; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x10649; GFX11-NEXT: s_waitcnt lgkmcnt(0)650; GFX11-NEXT: v_mov_b32_e32 v4, s6651; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v3, s3652; GFX11-NEXT: v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s2653; GFX11-NEXT: ds_store_b128 v4, v[0:3]654; GFX11-NEXT: s_endpgm655 store <4 x i32> %x, ptr addrspace(3) %out, align 16656 ret void657}658