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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX900 %s3 4 5%pair = type { i32, i32 }6 7define void @test_extractvalue_then_else(ptr %ptr, i1 %cond) {8; GFX900-LABEL: test_extractvalue_then_else:9; GFX900: ; %bb.0: ; %if10; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11; GFX900-NEXT: flat_load_dword v3, v[0:1]12; GFX900-NEXT: v_and_b32_e32 v2, 1, v213; GFX900-NEXT: v_cmp_ne_u32_e32 vcc, 1, v214; GFX900-NEXT: s_and_saveexec_b64 s[4:5], vcc15; GFX900-NEXT: s_xor_b64 s[4:5], exec, s[4:5]16; GFX900-NEXT: s_cbranch_execz .LBB0_217; GFX900-NEXT: ; %bb.1: ; %else18; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)19; GFX900-NEXT: v_add_u32_e32 v3, 1, v320; GFX900-NEXT: .LBB0_2: ; %Flow21; GFX900-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]22; GFX900-NEXT: s_or_b64 exec, exec, s[4:5]23; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)24; GFX900-NEXT: flat_store_dword v[0:1], v325; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)26; GFX900-NEXT: s_setpc_b64 s[30:31]27if:28 %load_then = load %pair, ptr %ptr29 br i1 %cond, label %then, label %else30 31then:32 %a_then = extractvalue %pair %load_then, 033 br label %merge34 35else:36 %a_else = extractvalue %pair %load_then, 037 %sum_else = add i32 %a_else, 138 br label %merge39 40merge:41 %phi = phi i32 [ %a_then, %then ], [ %sum_else, %else ]42 store i32 %phi, ptr %ptr43 ret void44}45 46define void @test_extractvalue_else_then(ptr %ptr, i1 %cond) {47; GFX900-LABEL: test_extractvalue_else_then:48; GFX900: ; %bb.0: ; %if49; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; GFX900-NEXT: flat_load_dword v3, v[0:1]51; GFX900-NEXT: v_and_b32_e32 v2, 1, v252; GFX900-NEXT: v_cmp_ne_u32_e32 vcc, 1, v253; GFX900-NEXT: s_and_saveexec_b64 s[4:5], vcc54; GFX900-NEXT: s_xor_b64 s[4:5], exec, s[4:5]55; GFX900-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]56; GFX900-NEXT: s_cbranch_execz .LBB1_257; GFX900-NEXT: ; %bb.1: ; %else58; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)59; GFX900-NEXT: v_add_u32_e32 v3, 1, v360; GFX900-NEXT: .LBB1_2: ; %merge61; GFX900-NEXT: s_or_b64 exec, exec, s[4:5]62; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)63; GFX900-NEXT: flat_store_dword v[0:1], v364; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)65; GFX900-NEXT: s_setpc_b64 s[30:31]66if:67 %load_then = load %pair, ptr %ptr68 br i1 %cond, label %else, label %then69 70else:71 %a_else = extractvalue %pair %load_then, 072 %sum_else = add i32 %a_else, 173 br label %merge74 75then:76 %a_then = extractvalue %pair %load_then, 077 br label %merge78 79merge:80 %phi = phi i32 [ %a_then, %then ], [ %sum_else, %else ]81 store i32 %phi, ptr %ptr82 ret void83}84 85define amdgpu_kernel void @test_loop_with_if( ptr %ptr, i1 %cond) #0 {86; GFX900-LABEL: test_loop_with_if:87; GFX900: ; %bb.0: ; %entry88; GFX900-NEXT: s_load_dword s2, s[4:5], 0x2c89; GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2490; GFX900-NEXT: v_mov_b32_e32 v5, 091; GFX900-NEXT: s_mov_b64 s[4:5], 092; GFX900-NEXT: s_movk_i32 s10, 0xfe93; GFX900-NEXT: s_waitcnt lgkmcnt(0)94; GFX900-NEXT: s_bitcmp1_b32 s2, 095; GFX900-NEXT: s_cselect_b64 s[2:3], -1, 096; GFX900-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[2:3]97; GFX900-NEXT: v_mov_b32_e32 v2, s198; GFX900-NEXT: s_xor_b64 s[2:3], s[2:3], -199; GFX900-NEXT: v_mov_b32_e32 v1, s0100; GFX900-NEXT: v_cmp_ne_u32_e64 s[0:1], 1, v3101; GFX900-NEXT: s_branch .LBB2_2102; GFX900-NEXT: .LBB2_1: ; %latch103; GFX900-NEXT: ; in Loop: Header=BB2_2 Depth=1104; GFX900-NEXT: s_or_b64 exec, exec, s[8:9]105; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)106; GFX900-NEXT: v_add_u32_e32 v5, 20, v3107; GFX900-NEXT: v_cmp_lt_i32_e32 vcc, s10, v5108; GFX900-NEXT: s_or_b64 s[4:5], vcc, s[4:5]109; GFX900-NEXT: flat_store_dword v[1:2], v3110; GFX900-NEXT: s_andn2_b64 exec, exec, s[4:5]111; GFX900-NEXT: s_cbranch_execz .LBB2_8112; GFX900-NEXT: .LBB2_2: ; %loop113; GFX900-NEXT: ; =>This Inner Loop Header: Depth=1114; GFX900-NEXT: flat_load_dwordx2 v[3:4], v[1:2]115; GFX900-NEXT: s_and_b64 vcc, exec, s[0:1]116; GFX900-NEXT: s_mov_b64 s[8:9], s[2:3]117; GFX900-NEXT: s_mov_b64 s[6:7], 0118; GFX900-NEXT: s_cbranch_vccnz .LBB2_4119; GFX900-NEXT: ; %bb.3: ; %if120; GFX900-NEXT: ; in Loop: Header=BB2_2 Depth=1121; GFX900-NEXT: v_cmp_gt_i32_e32 vcc, 11, v5122; GFX900-NEXT: s_andn2_b64 s[8:9], s[2:3], exec123; GFX900-NEXT: s_and_b64 s[12:13], vcc, exec124; GFX900-NEXT: s_mov_b64 s[6:7], -1125; GFX900-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]126; GFX900-NEXT: .LBB2_4: ; %Flow127; GFX900-NEXT: ; in Loop: Header=BB2_2 Depth=1128; GFX900-NEXT: s_and_saveexec_b64 s[12:13], s[8:9]129; GFX900-NEXT: s_xor_b64 s[8:9], exec, s[12:13]130; GFX900-NEXT: s_cbranch_execz .LBB2_6131; GFX900-NEXT: ; %bb.5: ; %else132; GFX900-NEXT: ; in Loop: Header=BB2_2 Depth=1133; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)134; GFX900-NEXT: v_add_u32_e32 v3, v3, v4135; GFX900-NEXT: s_andn2_b64 s[6:7], s[6:7], exec136; GFX900-NEXT: .LBB2_6: ; %Flow1137; GFX900-NEXT: ; in Loop: Header=BB2_2 Depth=1138; GFX900-NEXT: s_or_b64 exec, exec, s[8:9]139; GFX900-NEXT: s_and_saveexec_b64 s[8:9], s[6:7]140; GFX900-NEXT: s_cbranch_execz .LBB2_1141; GFX900-NEXT: ; %bb.7: ; %then142; GFX900-NEXT: ; in Loop: Header=BB2_2 Depth=1143; GFX900-NEXT: flat_store_dword v[1:2], v0144; GFX900-NEXT: s_branch .LBB2_1145; GFX900-NEXT: .LBB2_8: ; %end146; GFX900-NEXT: s_endpgm147entry:148 %a = tail call i32 @llvm.amdgcn.workitem.id.x()149 br label %loop150 151loop:152 %entry_phi = phi i32 [ 0, %entry ], [ %a15, %latch ]153 %load = load %pair, ptr %ptr154 br i1 %cond, label %if, label %else155 156if:157 %cmp = icmp sgt i32 %entry_phi, 10158 br i1 %cmp, label %then, label %else159 160then:161 %a_then = extractvalue %pair %load, 0162 store i32 %a, ptr %ptr, align 4163 br label %latch164 165else:166 %a2 = extractvalue %pair %load, 1167 %y = extractvalue %pair %load, 0168 %a_else = add i32 %y, %a2169 br label %latch170 171latch:172 %a_test = phi i32 [ %a_then, %then ], [ %a_else, %else ]173 store i32 %a_test, ptr %ptr174 %a15 = add nsw i32 %a_test, 20175 %a16 = icmp slt i32 %a15, 255176 br i1 %a16, label %loop, label %end177 178end:179 ret void180}181 182define void @test_nested_if(ptr %ptr, i32 %val, i1 %cond) {183; GFX900-LABEL: test_nested_if:184; GFX900: ; %bb.0: ; %entry185; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)186; GFX900-NEXT: flat_load_dword v4, v[0:1]187; GFX900-NEXT: v_and_b32_e32 v3, 1, v3188; GFX900-NEXT: v_cmp_eq_u32_e64 s[6:7], 1, v3189; GFX900-NEXT: s_mov_b64 s[10:11], -1190; GFX900-NEXT: s_xor_b64 s[4:5], s[6:7], -1191; GFX900-NEXT: s_mov_b64 s[12:13], s[6:7]192; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)193; GFX900-NEXT: v_mov_b32_e32 v3, v4194; GFX900-NEXT: s_and_saveexec_b64 s[8:9], s[4:5]195; GFX900-NEXT: s_cbranch_execz .LBB3_4196; GFX900-NEXT: ; %bb.1: ; %if197; GFX900-NEXT: s_and_saveexec_b64 s[12:13], s[4:5]198; GFX900-NEXT: s_cbranch_execz .LBB3_3199; GFX900-NEXT: ; %bb.2: ; %if_2200; GFX900-NEXT: flat_load_dword v3, v[0:1]201; GFX900-NEXT: s_xor_b64 s[10:11], exec, -1202; GFX900-NEXT: .LBB3_3: ; %Flow3203; GFX900-NEXT: s_or_b64 exec, exec, s[12:13]204; GFX900-NEXT: s_andn2_b64 s[12:13], s[6:7], exec205; GFX900-NEXT: s_and_b64 s[10:11], s[10:11], exec206; GFX900-NEXT: s_or_b64 s[12:13], s[12:13], s[10:11]207; GFX900-NEXT: .LBB3_4: ; %Flow2208; GFX900-NEXT: s_or_b64 exec, exec, s[8:9]209; GFX900-NEXT: s_and_saveexec_b64 s[8:9], s[12:13]210; GFX900-NEXT: s_or_b64 exec, exec, s[8:9]211; GFX900-NEXT: s_and_saveexec_b64 s[8:9], s[6:7]212; GFX900-NEXT: s_cbranch_execz .LBB3_8213; GFX900-NEXT: ; %bb.5: ; %if_3214; GFX900-NEXT: s_movk_i32 s6, 0xfe215; GFX900-NEXT: v_cmp_lt_i32_e32 vcc, s6, v2216; GFX900-NEXT: s_mov_b64 s[6:7], -1217; GFX900-NEXT: s_and_saveexec_b64 s[10:11], vcc218; GFX900-NEXT: s_cbranch_execz .LBB3_7219; GFX900-NEXT: ; %bb.6: ; %if_4220; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)221; GFX900-NEXT: v_add_u32_e32 v4, 1, v3222; GFX900-NEXT: s_xor_b64 s[6:7], exec, -1223; GFX900-NEXT: .LBB3_7: ; %Flow1224; GFX900-NEXT: s_or_b64 exec, exec, s[10:11]225; GFX900-NEXT: s_andn2_b64 s[4:5], s[4:5], exec226; GFX900-NEXT: s_and_b64 s[6:7], s[6:7], exec227; GFX900-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7]228; GFX900-NEXT: .LBB3_8: ; %Flow229; GFX900-NEXT: s_or_b64 exec, exec, s[8:9]230; GFX900-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]231; GFX900-NEXT: s_or_b64 exec, exec, s[6:7]232; GFX900-NEXT: flat_store_dword v[0:1], v4233; GFX900-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)234; GFX900-NEXT: s_setpc_b64 s[30:31]235entry:236 %load = load %pair, ptr %ptr237 br i1 %cond, label %else, label %if238 239if:240 %a16 = icmp slt i32 %val, 255241 br i1 %cond, label %else, label %if_2242 243if_2:244 %loaded = load i32, ptr %ptr245 br label %merge246 247else:248 %a_else = extractvalue %pair %load, 0249 br label %merge250 251merge:252 %phi = phi i32 [ %loaded, %if_2 ], [ %a_else, %else ]253 br i1 %cond, label %if_3, label %else_2254 255if_3:256 %a17 = icmp slt i32 %val, 255257 br i1 %a17, label %else_2, label %if_4258 259if_4:260 %sum_load = add i32 %phi, 1261 br label %merge_2262 263else_2:264 %a_else_2 = extractvalue %pair %load, 0265 br label %merge_2266 267merge_2:268 %phi_2 = phi i32 [ %sum_load, %if_4 ], [ %a_else_2, %else_2 ]269 store i32 %phi_2, ptr %ptr270 ret void271}272