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1; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s2; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=bonaire < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s3 4; FIXME: Need to handle non-uniform case for function below (load without gep).5; GCN-LABEL: {{^}}v_test_sub_i16:6; VI: flat_load_ushort [[A:v[0-9]+]]7; VI: flat_load_ushort [[B:v[0-9]+]]8; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]9; VI-NEXT: buffer_store_short [[ADD]]10define amdgpu_kernel void @v_test_sub_i16(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {11 %tid = call i32 @llvm.amdgcn.workitem.id.x()12 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid13 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid14 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid15 %a = load volatile i16, ptr addrspace(1) %gep.in016 %b = load volatile i16, ptr addrspace(1) %gep.in117 %add = sub i16 %a, %b18 store i16 %add, ptr addrspace(1) %out19 ret void20}21 22; FIXME: Need to handle non-uniform case for function below (load without gep).23; GCN-LABEL: {{^}}v_test_sub_i16_constant:24; VI: flat_load_ushort [[A:v[0-9]+]]25; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xff85, [[A]]26; VI-NEXT: buffer_store_short [[ADD]]27define amdgpu_kernel void @v_test_sub_i16_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {28 %tid = call i32 @llvm.amdgcn.workitem.id.x()29 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid30 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid31 %a = load volatile i16, ptr addrspace(1) %gep.in032 %add = sub i16 %a, 12333 store i16 %add, ptr addrspace(1) %out34 ret void35}36 37; FIXME: Need to handle non-uniform case for function below (load without gep).38; GCN-LABEL: {{^}}v_test_sub_i16_neg_constant:39; VI: flat_load_ushort [[A:v[0-9]+]]40; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0x34d, [[A]]41; VI-NEXT: buffer_store_short [[ADD]]42define amdgpu_kernel void @v_test_sub_i16_neg_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {43 %tid = call i32 @llvm.amdgcn.workitem.id.x()44 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid45 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid46 %a = load volatile i16, ptr addrspace(1) %gep.in047 %add = sub i16 %a, -84548 store i16 %add, ptr addrspace(1) %out49 ret void50}51 52; FIXME: Need to handle non-uniform case for function below (load without gep).53; GCN-LABEL: {{^}}v_test_sub_i16_inline_63:54; VI: flat_load_ushort [[A:v[0-9]+]]55; VI: v_subrev_u16_e32 [[ADD:v[0-9]+]], 63, [[A]]56; VI-NEXT: buffer_store_short [[ADD]]57define amdgpu_kernel void @v_test_sub_i16_inline_63(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {58 %tid = call i32 @llvm.amdgcn.workitem.id.x()59 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid60 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid61 %a = load volatile i16, ptr addrspace(1) %gep.in062 %add = sub i16 %a, 6363 store i16 %add, ptr addrspace(1) %out64 ret void65}66 67; FIXME: Need to handle non-uniform case for function below (load without gep).68; GCN-LABEL: {{^}}v_test_sub_i16_zext_to_i32:69; VI: flat_load_ushort [[A:v[0-9]+]]70; VI: flat_load_ushort [[B:v[0-9]+]]71; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]72; VI-NEXT: buffer_store_dword [[ADD]]73define amdgpu_kernel void @v_test_sub_i16_zext_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {74 %tid = call i32 @llvm.amdgcn.workitem.id.x()75 %gep.out = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %tid76 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid77 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid78 %a = load volatile i16, ptr addrspace(1) %gep.in079 %b = load volatile i16, ptr addrspace(1) %gep.in180 %add = sub i16 %a, %b81 %ext = zext i16 %add to i3282 store i32 %ext, ptr addrspace(1) %out83 ret void84}85 86; FIXME: Need to handle non-uniform case for function below (load without gep).87; GCN-LABEL: {{^}}v_test_sub_i16_zext_to_i64:88; VI: flat_load_ushort [[A:v[0-9]+]]89; VI: flat_load_ushort [[B:v[0-9]+]]90; VI: v_mov_b32_e32 v[[VZERO:[0-9]+]], 091; VI-DAG: v_sub_u16_e32 v[[ADD:[0-9]+]], [[A]], [[B]]92; VI: buffer_store_dwordx2 v[[[ADD]]:[[VZERO]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}93define amdgpu_kernel void @v_test_sub_i16_zext_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {94 %tid = call i32 @llvm.amdgcn.workitem.id.x()95 %gep.out = getelementptr inbounds i64, ptr addrspace(1) %out, i32 %tid96 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid97 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid98 %a = load volatile i16, ptr addrspace(1) %gep.in099 %b = load volatile i16, ptr addrspace(1) %gep.in1100 %add = sub i16 %a, %b101 %ext = zext i16 %add to i64102 store i64 %ext, ptr addrspace(1) %out103 ret void104}105 106; FIXME: Need to handle non-uniform case for function below (load without gep).107; GCN-LABEL: {{^}}v_test_sub_i16_sext_to_i32:108; VI: flat_load_ushort [[A:v[0-9]+]]109; VI: flat_load_ushort [[B:v[0-9]+]]110; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]111; VI: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16112; VI-NEXT: buffer_store_dword [[SEXT]]113define amdgpu_kernel void @v_test_sub_i16_sext_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {114 %tid = call i32 @llvm.amdgcn.workitem.id.x()115 %gep.out = getelementptr inbounds i32, ptr addrspace(1) %out, i32 %tid116 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid117 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid118 %a = load i16, ptr addrspace(1) %gep.in0119 %b = load i16, ptr addrspace(1) %gep.in1120 %add = sub i16 %a, %b121 %ext = sext i16 %add to i32122 store i32 %ext, ptr addrspace(1) %out123 ret void124}125 126; FIXME: Need to handle non-uniform case for function below (load without gep).127; GCN-LABEL: {{^}}v_test_sub_i16_sext_to_i64:128; VI: flat_load_ushort [[A:v[0-9]+]]129; VI: flat_load_ushort [[B:v[0-9]+]]130; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]131; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16132; VI: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]133; VI-NEXT: buffer_store_dwordx2 v[[[LO]]:[[HI]]]134define amdgpu_kernel void @v_test_sub_i16_sext_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {135 %tid = call i32 @llvm.amdgcn.workitem.id.x()136 %gep.out = getelementptr inbounds i64, ptr addrspace(1) %out, i32 %tid137 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid138 %gep.in1 = getelementptr inbounds i16, ptr addrspace(1) %in1, i32 %tid139 %a = load i16, ptr addrspace(1) %gep.in0140 %b = load i16, ptr addrspace(1) %gep.in1141 %add = sub i16 %a, %b142 %ext = sext i16 %add to i64143 store i64 %ext, ptr addrspace(1) %out144 ret void145}146 147@lds = addrspace(3) global [512 x i32] poison, align 4148 149; GCN-LABEL: {{^}}v_test_sub_i16_constant_commute:150; VI: v_subrev_u16_e32 v{{[0-9]+}}, 0x800, v{{[0-9]+}}151; CI: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 0x800, v{{[0-9]+}}152define amdgpu_kernel void @v_test_sub_i16_constant_commute(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {153 %size = call i32 @llvm.amdgcn.groupstaticsize()154 %size.trunc = trunc i32 %size to i16155 call void asm sideeffect "; $0", "v"(ptr addrspace(3) @lds)156 %tid = call i32 @llvm.amdgcn.workitem.id.x()157 %gep.out = getelementptr inbounds i16, ptr addrspace(1) %out, i32 %tid158 %gep.in0 = getelementptr inbounds i16, ptr addrspace(1) %in0, i32 %tid159 %a = load volatile i16, ptr addrspace(1) %gep.in0160 %add = sub i16 %a, %size.trunc161 store i16 %add, ptr addrspace(1) %out162 ret void163}164 165declare i32 @llvm.amdgcn.workitem.id.x() #0166declare i32 @llvm.amdgcn.groupstaticsize() #0167 168attributes #0 = { nounwind readnone }169attributes #1 = { nounwind }170