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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck %s -enable-var-scope -check-prefixes=GCN,GFX93; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck %s -enable-var-scope -check-prefixes=GCN,VI4; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global < %s | FileCheck %s -enable-var-scope -check-prefixes=GFX105; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck %s -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE166; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck %s -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE167 8; FIXME: Need to handle non-uniform case for function below (load without gep).9define amdgpu_kernel void @v_test_sub_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {10; GFX9-LABEL: v_test_sub_v2i16:11; GFX9: ; %bb.0:12; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2413; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3414; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v015; GFX9-NEXT: s_waitcnt lgkmcnt(0)16; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc17; GFX9-NEXT: s_waitcnt vmcnt(0)18; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc19; GFX9-NEXT: s_waitcnt vmcnt(0)20; GFX9-NEXT: s_mov_b32 s3, 0xf00021; GFX9-NEXT: s_mov_b32 s2, -122; GFX9-NEXT: v_pk_sub_i16 v0, v1, v223; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 024; GFX9-NEXT: s_endpgm25;26; VI-LABEL: v_test_sub_v2i16:27; VI: ; %bb.0:28; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2429; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3430; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v031; VI-NEXT: s_waitcnt lgkmcnt(0)32; VI-NEXT: v_mov_b32_e32 v1, s333; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v234; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc35; VI-NEXT: v_mov_b32_e32 v3, s536; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v237; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc38; VI-NEXT: flat_load_dword v0, v[0:1] glc39; VI-NEXT: s_waitcnt vmcnt(0)40; VI-NEXT: flat_load_dword v1, v[2:3] glc41; VI-NEXT: s_waitcnt vmcnt(0)42; VI-NEXT: s_mov_b32 s3, 0xf00043; VI-NEXT: s_mov_b32 s2, -144; VI-NEXT: v_sub_u16_e32 v2, v0, v145; VI-NEXT: v_sub_u16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_146; VI-NEXT: v_or_b32_e32 v0, v2, v047; VI-NEXT: buffer_store_dword v0, off, s[0:3], 048; VI-NEXT: s_endpgm49;50; GFX10-LABEL: v_test_sub_v2i16:51; GFX10: ; %bb.0:52; GFX10-NEXT: s_clause 0x153; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2454; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3455; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v056; GFX10-NEXT: s_waitcnt lgkmcnt(0)57; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc58; GFX10-NEXT: s_waitcnt vmcnt(0)59; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc60; GFX10-NEXT: s_waitcnt vmcnt(0)61; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)62; GFX10-NEXT: s_mov_b32 s3, 0x3101600063; GFX10-NEXT: s_mov_b32 s2, -164; GFX10-NEXT: v_pk_sub_i16 v0, v1, v265; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 066; GFX10-NEXT: s_endpgm67;68; GFX11-LABEL: v_test_sub_v2i16:69; GFX11: ; %bb.0:70; GFX11-NEXT: s_clause 0x171; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2472; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x3473; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v074; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)75; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v076; GFX11-NEXT: s_waitcnt lgkmcnt(0)77; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc78; GFX11-NEXT: s_waitcnt vmcnt(0)79; GFX11-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc80; GFX11-NEXT: s_waitcnt vmcnt(0)81; GFX11-NEXT: s_mov_b32 s3, 0x3101600082; GFX11-NEXT: s_mov_b32 s2, -183; GFX11-NEXT: v_pk_sub_i16 v0, v1, v084; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 085; GFX11-NEXT: s_endpgm86 %tid = call i32 @llvm.amdgcn.workitem.id.x()87 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid88 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid89 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid90 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in091 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in192 %add = sub <2 x i16> %a, %b93 store <2 x i16> %add, ptr addrspace(1) %out94 ret void95}96 97define amdgpu_kernel void @s_test_sub_v2i16(ptr addrspace(1) %out, ptr addrspace(4) %in0, ptr addrspace(4) %in1) #1 {98; GFX9-LABEL: s_test_sub_v2i16:99; GFX9: ; %bb.0:100; GFX9-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34101; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24102; GFX9-NEXT: s_mov_b32 s7, 0xf000103; GFX9-NEXT: s_mov_b32 s6, -1104; GFX9-NEXT: s_waitcnt lgkmcnt(0)105; GFX9-NEXT: s_load_dword s10, s[8:9], 0x0106; GFX9-NEXT: s_load_dword s11, s[2:3], 0x0107; GFX9-NEXT: s_mov_b32 s4, s0108; GFX9-NEXT: s_mov_b32 s5, s1109; GFX9-NEXT: s_waitcnt lgkmcnt(0)110; GFX9-NEXT: v_mov_b32_e32 v0, s10111; GFX9-NEXT: v_pk_sub_i16 v0, s11, v0112; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0113; GFX9-NEXT: s_endpgm114;115; VI-LABEL: s_test_sub_v2i16:116; VI: ; %bb.0:117; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24118; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34119; VI-NEXT: s_waitcnt lgkmcnt(0)120; VI-NEXT: s_load_dword s6, s[2:3], 0x0121; VI-NEXT: s_load_dword s4, s[4:5], 0x0122; VI-NEXT: s_mov_b32 s3, 0xf000123; VI-NEXT: s_mov_b32 s2, -1124; VI-NEXT: s_waitcnt lgkmcnt(0)125; VI-NEXT: s_sub_i32 s5, s6, s4126; VI-NEXT: s_lshr_b32 s4, s4, 16127; VI-NEXT: s_lshr_b32 s6, s6, 16128; VI-NEXT: s_sub_i32 s4, s6, s4129; VI-NEXT: s_and_b32 s5, s5, 0xffff130; VI-NEXT: s_lshl_b32 s4, s4, 16131; VI-NEXT: s_or_b32 s4, s5, s4132; VI-NEXT: v_mov_b32_e32 v0, s4133; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0134; VI-NEXT: s_endpgm135;136; GFX10-LABEL: s_test_sub_v2i16:137; GFX10: ; %bb.0:138; GFX10-NEXT: s_clause 0x1139; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24140; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34141; GFX10-NEXT: s_waitcnt lgkmcnt(0)142; GFX10-NEXT: s_load_dword s4, s[2:3], 0x0143; GFX10-NEXT: s_load_dword s5, s[6:7], 0x0144; GFX10-NEXT: s_mov_b32 s3, 0x31016000145; GFX10-NEXT: s_mov_b32 s2, -1146; GFX10-NEXT: s_waitcnt lgkmcnt(0)147; GFX10-NEXT: v_pk_sub_i16 v0, s4, s5148; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0149; GFX10-NEXT: s_endpgm150;151; GFX11-LABEL: s_test_sub_v2i16:152; GFX11: ; %bb.0:153; GFX11-NEXT: s_clause 0x1154; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24155; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34156; GFX11-NEXT: s_waitcnt lgkmcnt(0)157; GFX11-NEXT: s_load_b32 s2, s[2:3], 0x0158; GFX11-NEXT: s_load_b32 s4, s[4:5], 0x0159; GFX11-NEXT: s_mov_b32 s3, 0x31016000160; GFX11-NEXT: s_waitcnt lgkmcnt(0)161; GFX11-NEXT: v_pk_sub_i16 v0, s2, s4162; GFX11-NEXT: s_mov_b32 s2, -1163; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0164; GFX11-NEXT: s_endpgm165 %a = load <2 x i16>, ptr addrspace(4) %in0166 %b = load <2 x i16>, ptr addrspace(4) %in1167 %add = sub <2 x i16> %a, %b168 store <2 x i16> %add, ptr addrspace(1) %out169 ret void170}171 172define amdgpu_kernel void @s_test_sub_self_v2i16(ptr addrspace(1) %out, ptr addrspace(4) %in0) #1 {173; GCN-LABEL: s_test_sub_self_v2i16:174; GCN: ; %bb.0:175; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24176; GCN-NEXT: s_mov_b32 s3, 0xf000177; GCN-NEXT: s_mov_b32 s2, -1178; GCN-NEXT: v_mov_b32_e32 v0, 0179; GCN-NEXT: s_waitcnt lgkmcnt(0)180; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0181; GCN-NEXT: s_endpgm182;183; GFX10-LABEL: s_test_sub_self_v2i16:184; GFX10: ; %bb.0:185; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24186; GFX10-NEXT: v_mov_b32_e32 v0, 0187; GFX10-NEXT: s_mov_b32 s3, 0x31016000188; GFX10-NEXT: s_mov_b32 s2, -1189; GFX10-NEXT: s_waitcnt lgkmcnt(0)190; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0191; GFX10-NEXT: s_endpgm192;193; GFX11-LABEL: s_test_sub_self_v2i16:194; GFX11: ; %bb.0:195; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24196; GFX11-NEXT: v_mov_b32_e32 v0, 0197; GFX11-NEXT: s_mov_b32 s3, 0x31016000198; GFX11-NEXT: s_mov_b32 s2, -1199; GFX11-NEXT: s_waitcnt lgkmcnt(0)200; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0201; GFX11-NEXT: s_endpgm202 %a = load <2 x i16>, ptr addrspace(4) %in0203 %add = sub <2 x i16> %a, %a204 store <2 x i16> %add, ptr addrspace(1) %out205 ret void206}207 208; FIXME: VI should not scalarize arg access.209define amdgpu_kernel void @s_test_sub_v2i16_kernarg(ptr addrspace(1) %out, <2 x i16> %a, <2 x i16> %b) #1 {210; GFX9-LABEL: s_test_sub_v2i16_kernarg:211; GFX9: ; %bb.0:212; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24213; GFX9-NEXT: s_mov_b32 s7, 0xf000214; GFX9-NEXT: s_mov_b32 s6, -1215; GFX9-NEXT: s_waitcnt lgkmcnt(0)216; GFX9-NEXT: v_mov_b32_e32 v0, s3217; GFX9-NEXT: s_mov_b32 s4, s0218; GFX9-NEXT: s_mov_b32 s5, s1219; GFX9-NEXT: v_pk_sub_i16 v0, s2, v0220; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0221; GFX9-NEXT: s_endpgm222;223; VI-LABEL: s_test_sub_v2i16_kernarg:224; VI: ; %bb.0:225; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24226; VI-NEXT: s_waitcnt lgkmcnt(0)227; VI-NEXT: s_mov_b64 s[4:5], s[2:3]228; VI-NEXT: s_lshr_b32 s6, s5, 16229; VI-NEXT: s_lshr_b32 s7, s4, 16230; VI-NEXT: s_sub_i32 s4, s4, s5231; VI-NEXT: s_sub_i32 s5, s7, s6232; VI-NEXT: s_lshl_b32 s5, s5, 16233; VI-NEXT: s_and_b32 s4, s4, 0xffff234; VI-NEXT: s_or_b32 s4, s4, s5235; VI-NEXT: s_mov_b32 s3, 0xf000236; VI-NEXT: s_mov_b32 s2, -1237; VI-NEXT: v_mov_b32_e32 v0, s4238; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0239; VI-NEXT: s_endpgm240;241; GFX10-LABEL: s_test_sub_v2i16_kernarg:242; GFX10: ; %bb.0:243; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24244; GFX10-NEXT: s_waitcnt lgkmcnt(0)245; GFX10-NEXT: v_pk_sub_i16 v0, s2, s3246; GFX10-NEXT: s_mov_b32 s3, 0x31016000247; GFX10-NEXT: s_mov_b32 s2, -1248; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0249; GFX10-NEXT: s_endpgm250;251; GFX11-LABEL: s_test_sub_v2i16_kernarg:252; GFX11: ; %bb.0:253; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24254; GFX11-NEXT: s_waitcnt lgkmcnt(0)255; GFX11-NEXT: v_pk_sub_i16 v0, s2, s3256; GFX11-NEXT: s_mov_b32 s3, 0x31016000257; GFX11-NEXT: s_mov_b32 s2, -1258; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0259; GFX11-NEXT: s_endpgm260 %add = sub <2 x i16> %a, %b261 store <2 x i16> %add, ptr addrspace(1) %out262 ret void263}264 265define amdgpu_kernel void @v_test_sub_v2i16_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {266; GFX9-LABEL: v_test_sub_v2i16_constant:267; GFX9: ; %bb.0:268; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24269; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0270; GFX9-NEXT: s_mov_b32 s4, 0x1c8007b271; GFX9-NEXT: s_waitcnt lgkmcnt(0)272; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc273; GFX9-NEXT: s_waitcnt vmcnt(0)274; GFX9-NEXT: s_mov_b32 s3, 0xf000275; GFX9-NEXT: s_mov_b32 s2, -1276; GFX9-NEXT: v_pk_sub_i16 v0, v0, s4277; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0278; GFX9-NEXT: s_endpgm279;280; VI-LABEL: v_test_sub_v2i16_constant:281; VI: ; %bb.0:282; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24283; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0284; VI-NEXT: s_waitcnt lgkmcnt(0)285; VI-NEXT: v_mov_b32_e32 v1, s3286; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0287; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc288; VI-NEXT: flat_load_dword v0, v[0:1] glc289; VI-NEXT: s_waitcnt vmcnt(0)290; VI-NEXT: v_mov_b32_e32 v1, 0xfffffe38291; VI-NEXT: s_mov_b32 s3, 0xf000292; VI-NEXT: s_mov_b32 s2, -1293; VI-NEXT: v_add_u16_e32 v2, 0xff85, v0294; VI-NEXT: v_add_u16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD295; VI-NEXT: v_or_b32_e32 v0, v2, v0296; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0297; VI-NEXT: s_endpgm298;299; GFX10-LABEL: v_test_sub_v2i16_constant:300; GFX10: ; %bb.0:301; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24302; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0303; GFX10-NEXT: s_waitcnt lgkmcnt(0)304; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc305; GFX10-NEXT: s_waitcnt vmcnt(0)306; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)307; GFX10-NEXT: s_mov_b32 s3, 0x31016000308; GFX10-NEXT: s_mov_b32 s2, -1309; GFX10-NEXT: v_pk_sub_i16 v0, v0, 0x1c8007b310; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0311; GFX10-NEXT: s_endpgm312;313; GFX11-LABEL: v_test_sub_v2i16_constant:314; GFX11: ; %bb.0:315; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24316; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0317; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)318; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0319; GFX11-NEXT: s_waitcnt lgkmcnt(0)320; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc321; GFX11-NEXT: s_waitcnt vmcnt(0)322; GFX11-NEXT: s_mov_b32 s3, 0x31016000323; GFX11-NEXT: s_mov_b32 s2, -1324; GFX11-NEXT: v_pk_sub_i16 v0, v0, 0x1c8007b325; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0326; GFX11-NEXT: s_endpgm327 %tid = call i32 @llvm.amdgcn.workitem.id.x()328 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid329 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid330 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0331 %add = sub <2 x i16> %a, <i16 123, i16 456>332 store <2 x i16> %add, ptr addrspace(1) %out333 ret void334}335 336; FIXME: Need to handle non-uniform case for function below (load without gep).337define amdgpu_kernel void @v_test_sub_v2i16_neg_constant(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {338; GFX9-LABEL: v_test_sub_v2i16_neg_constant:339; GFX9: ; %bb.0:340; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24341; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0342; GFX9-NEXT: s_mov_b32 s4, 0xfc21fcb3343; GFX9-NEXT: s_waitcnt lgkmcnt(0)344; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc345; GFX9-NEXT: s_waitcnt vmcnt(0)346; GFX9-NEXT: s_mov_b32 s3, 0xf000347; GFX9-NEXT: s_mov_b32 s2, -1348; GFX9-NEXT: v_pk_sub_i16 v0, v0, s4349; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0350; GFX9-NEXT: s_endpgm351;352; VI-LABEL: v_test_sub_v2i16_neg_constant:353; VI: ; %bb.0:354; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24355; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0356; VI-NEXT: s_waitcnt lgkmcnt(0)357; VI-NEXT: v_mov_b32_e32 v1, s3358; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0359; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc360; VI-NEXT: flat_load_dword v0, v[0:1] glc361; VI-NEXT: s_waitcnt vmcnt(0)362; VI-NEXT: v_mov_b32_e32 v1, 0x3df363; VI-NEXT: s_mov_b32 s3, 0xf000364; VI-NEXT: s_mov_b32 s2, -1365; VI-NEXT: v_add_u16_e32 v2, 0x34d, v0366; VI-NEXT: v_add_u16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD367; VI-NEXT: v_or_b32_e32 v0, v2, v0368; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0369; VI-NEXT: s_endpgm370;371; GFX10-LABEL: v_test_sub_v2i16_neg_constant:372; GFX10: ; %bb.0:373; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24374; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0375; GFX10-NEXT: s_waitcnt lgkmcnt(0)376; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc377; GFX10-NEXT: s_waitcnt vmcnt(0)378; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)379; GFX10-NEXT: s_mov_b32 s3, 0x31016000380; GFX10-NEXT: s_mov_b32 s2, -1381; GFX10-NEXT: v_pk_sub_i16 v0, v0, 0xfc21fcb3382; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0383; GFX10-NEXT: s_endpgm384;385; GFX11-LABEL: v_test_sub_v2i16_neg_constant:386; GFX11: ; %bb.0:387; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24388; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0389; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)390; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0391; GFX11-NEXT: s_waitcnt lgkmcnt(0)392; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc393; GFX11-NEXT: s_waitcnt vmcnt(0)394; GFX11-NEXT: s_mov_b32 s3, 0x31016000395; GFX11-NEXT: s_mov_b32 s2, -1396; GFX11-NEXT: v_pk_sub_i16 v0, v0, 0xfc21fcb3397; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0398; GFX11-NEXT: s_endpgm399 %tid = call i32 @llvm.amdgcn.workitem.id.x()400 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid401 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid402 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0403 %add = sub <2 x i16> %a, <i16 -845, i16 -991>404 store <2 x i16> %add, ptr addrspace(1) %out405 ret void406}407 408define amdgpu_kernel void @v_test_sub_v2i16_inline_neg1(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {409; GFX9-LABEL: v_test_sub_v2i16_inline_neg1:410; GFX9: ; %bb.0:411; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24412; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0413; GFX9-NEXT: s_waitcnt lgkmcnt(0)414; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc415; GFX9-NEXT: s_waitcnt vmcnt(0)416; GFX9-NEXT: s_mov_b32 s3, 0xf000417; GFX9-NEXT: s_mov_b32 s2, -1418; GFX9-NEXT: v_pk_sub_i16 v0, v0, -1419; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0420; GFX9-NEXT: s_endpgm421;422; VI-LABEL: v_test_sub_v2i16_inline_neg1:423; VI: ; %bb.0:424; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24425; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0426; VI-NEXT: s_waitcnt lgkmcnt(0)427; VI-NEXT: v_mov_b32_e32 v1, s3428; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0429; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc430; VI-NEXT: flat_load_dword v0, v[0:1] glc431; VI-NEXT: s_waitcnt vmcnt(0)432; VI-NEXT: v_mov_b32_e32 v1, 1433; VI-NEXT: s_mov_b32 s3, 0xf000434; VI-NEXT: s_mov_b32 s2, -1435; VI-NEXT: v_add_u16_e32 v2, 1, v0436; VI-NEXT: v_add_u16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD437; VI-NEXT: v_or_b32_e32 v0, v2, v0438; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0439; VI-NEXT: s_endpgm440;441; GFX10-LABEL: v_test_sub_v2i16_inline_neg1:442; GFX10: ; %bb.0:443; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24444; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0445; GFX10-NEXT: s_waitcnt lgkmcnt(0)446; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc447; GFX10-NEXT: s_waitcnt vmcnt(0)448; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)449; GFX10-NEXT: s_mov_b32 s3, 0x31016000450; GFX10-NEXT: s_mov_b32 s2, -1451; GFX10-NEXT: v_pk_sub_i16 v0, v0, -1452; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0453; GFX10-NEXT: s_endpgm454;455; GFX11-LABEL: v_test_sub_v2i16_inline_neg1:456; GFX11: ; %bb.0:457; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24458; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0459; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)460; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0461; GFX11-NEXT: s_waitcnt lgkmcnt(0)462; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc463; GFX11-NEXT: s_waitcnt vmcnt(0)464; GFX11-NEXT: s_mov_b32 s3, 0x31016000465; GFX11-NEXT: s_mov_b32 s2, -1466; GFX11-NEXT: v_pk_sub_i16 v0, v0, -1467; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0468; GFX11-NEXT: s_endpgm469 %tid = call i32 @llvm.amdgcn.workitem.id.x()470 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid471 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid472 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0473 %add = sub <2 x i16> %a, <i16 -1, i16 -1>474 store <2 x i16> %add, ptr addrspace(1) %out475 ret void476}477 478define amdgpu_kernel void @v_test_sub_v2i16_inline_lo_zero_hi(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {479; GFX9-LABEL: v_test_sub_v2i16_inline_lo_zero_hi:480; GFX9: ; %bb.0:481; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24482; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0483; GFX9-NEXT: s_waitcnt lgkmcnt(0)484; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc485; GFX9-NEXT: s_waitcnt vmcnt(0)486; GFX9-NEXT: s_mov_b32 s3, 0xf000487; GFX9-NEXT: s_mov_b32 s2, -1488; GFX9-NEXT: v_pk_sub_i16 v0, v0, 32489; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0490; GFX9-NEXT: s_endpgm491;492; VI-LABEL: v_test_sub_v2i16_inline_lo_zero_hi:493; VI: ; %bb.0:494; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24495; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0496; VI-NEXT: s_waitcnt lgkmcnt(0)497; VI-NEXT: v_mov_b32_e32 v1, s3498; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0499; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc500; VI-NEXT: flat_load_dword v0, v[0:1] glc501; VI-NEXT: s_waitcnt vmcnt(0)502; VI-NEXT: s_mov_b32 s3, 0xf000503; VI-NEXT: s_mov_b32 s2, -1504; VI-NEXT: v_and_b32_e32 v1, 0xffff0000, v0505; VI-NEXT: v_subrev_u16_e32 v0, 32, v0506; VI-NEXT: v_or_b32_e32 v0, v0, v1507; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0508; VI-NEXT: s_endpgm509;510; GFX10-LABEL: v_test_sub_v2i16_inline_lo_zero_hi:511; GFX10: ; %bb.0:512; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24513; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0514; GFX10-NEXT: s_waitcnt lgkmcnt(0)515; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc516; GFX10-NEXT: s_waitcnt vmcnt(0)517; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)518; GFX10-NEXT: s_mov_b32 s3, 0x31016000519; GFX10-NEXT: s_mov_b32 s2, -1520; GFX10-NEXT: v_pk_sub_i16 v0, v0, 32521; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0522; GFX10-NEXT: s_endpgm523;524; GFX11-LABEL: v_test_sub_v2i16_inline_lo_zero_hi:525; GFX11: ; %bb.0:526; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24527; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0528; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)529; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0530; GFX11-NEXT: s_waitcnt lgkmcnt(0)531; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc532; GFX11-NEXT: s_waitcnt vmcnt(0)533; GFX11-NEXT: s_mov_b32 s3, 0x31016000534; GFX11-NEXT: s_mov_b32 s2, -1535; GFX11-NEXT: v_pk_sub_i16 v0, v0, 32536; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0537; GFX11-NEXT: s_endpgm538 %tid = call i32 @llvm.amdgcn.workitem.id.x()539 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid540 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid541 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0542 %add = sub <2 x i16> %a, <i16 32, i16 0>543 store <2 x i16> %add, ptr addrspace(1) %out544 ret void545}546 547; The high element gives fp548define amdgpu_kernel void @v_test_sub_v2i16_inline_fp_split(ptr addrspace(1) %out, ptr addrspace(1) %in0) #1 {549; GFX9-LABEL: v_test_sub_v2i16_inline_fp_split:550; GFX9: ; %bb.0:551; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24552; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0553; GFX9-NEXT: s_waitcnt lgkmcnt(0)554; GFX9-NEXT: global_load_dword v0, v0, s[2:3] glc555; GFX9-NEXT: s_waitcnt vmcnt(0)556; GFX9-NEXT: s_mov_b32 s3, 0xf000557; GFX9-NEXT: s_mov_b32 s2, -1558; GFX9-NEXT: v_pk_sub_i16 v0, v0, 1.0559; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0560; GFX9-NEXT: s_endpgm561;562; VI-LABEL: v_test_sub_v2i16_inline_fp_split:563; VI: ; %bb.0:564; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24565; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0566; VI-NEXT: s_waitcnt lgkmcnt(0)567; VI-NEXT: v_mov_b32_e32 v1, s3568; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0569; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc570; VI-NEXT: flat_load_dword v0, v[0:1] glc571; VI-NEXT: s_waitcnt vmcnt(0)572; VI-NEXT: v_mov_b32_e32 v1, 0xffffc080573; VI-NEXT: s_mov_b32 s3, 0xf000574; VI-NEXT: s_mov_b32 s2, -1575; VI-NEXT: v_add_u16_sdwa v1, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD576; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD577; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0578; VI-NEXT: s_endpgm579;580; GFX10-LABEL: v_test_sub_v2i16_inline_fp_split:581; GFX10: ; %bb.0:582; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24583; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0584; GFX10-NEXT: s_waitcnt lgkmcnt(0)585; GFX10-NEXT: global_load_dword v0, v0, s[2:3] glc dlc586; GFX10-NEXT: s_waitcnt vmcnt(0)587; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)588; GFX10-NEXT: s_mov_b32 s3, 0x31016000589; GFX10-NEXT: s_mov_b32 s2, -1590; GFX10-NEXT: v_pk_sub_i16 v0, v0, 1.0591; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0592; GFX10-NEXT: s_endpgm593;594; GFX11-LABEL: v_test_sub_v2i16_inline_fp_split:595; GFX11: ; %bb.0:596; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24597; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0598; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)599; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0600; GFX11-NEXT: s_waitcnt lgkmcnt(0)601; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] glc dlc602; GFX11-NEXT: s_waitcnt vmcnt(0)603; GFX11-NEXT: s_mov_b32 s3, 0x31016000604; GFX11-NEXT: s_mov_b32 s2, -1605; GFX11-NEXT: v_pk_sub_i16 v0, v0, 1.0606; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0607; GFX11-NEXT: s_endpgm608 %tid = call i32 @llvm.amdgcn.workitem.id.x()609 %gep.out = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i32 %tid610 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid611 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0612 %add = sub <2 x i16> %a, <i16 0, i16 16256>613 store <2 x i16> %add, ptr addrspace(1) %out614 ret void615}616 617; FIXME: Need to handle non-uniform case for function below (load without gep).618define amdgpu_kernel void @v_test_sub_v2i16_zext_to_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {619; GFX9-LABEL: v_test_sub_v2i16_zext_to_v2i32:620; GFX9: ; %bb.0:621; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24622; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34623; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0624; GFX9-NEXT: s_waitcnt lgkmcnt(0)625; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc626; GFX9-NEXT: s_waitcnt vmcnt(0)627; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc628; GFX9-NEXT: s_waitcnt vmcnt(0)629; GFX9-NEXT: s_mov_b32 s3, 0xf000630; GFX9-NEXT: s_mov_b32 s2, -1631; GFX9-NEXT: v_pk_sub_i16 v0, v1, v2632; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v0633; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0634; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0635; GFX9-NEXT: s_endpgm636;637; VI-LABEL: v_test_sub_v2i16_zext_to_v2i32:638; VI: ; %bb.0:639; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24640; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34641; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0642; VI-NEXT: s_waitcnt lgkmcnt(0)643; VI-NEXT: v_mov_b32_e32 v1, s3644; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2645; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc646; VI-NEXT: v_mov_b32_e32 v3, s5647; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2648; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc649; VI-NEXT: flat_load_dword v1, v[0:1] glc650; VI-NEXT: s_waitcnt vmcnt(0)651; VI-NEXT: flat_load_dword v2, v[2:3] glc652; VI-NEXT: s_waitcnt vmcnt(0)653; VI-NEXT: s_mov_b32 s3, 0xf000654; VI-NEXT: s_mov_b32 s2, -1655; VI-NEXT: v_sub_u16_e32 v0, v1, v2656; VI-NEXT: v_sub_u16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1657; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0658; VI-NEXT: s_endpgm659;660; GFX10-LABEL: v_test_sub_v2i16_zext_to_v2i32:661; GFX10: ; %bb.0:662; GFX10-NEXT: s_clause 0x1663; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24664; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34665; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0666; GFX10-NEXT: s_waitcnt lgkmcnt(0)667; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc668; GFX10-NEXT: s_waitcnt vmcnt(0)669; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc670; GFX10-NEXT: s_waitcnt vmcnt(0)671; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)672; GFX10-NEXT: s_mov_b32 s3, 0x31016000673; GFX10-NEXT: s_mov_b32 s2, -1674; GFX10-NEXT: v_pk_sub_i16 v0, v1, v2675; GFX10-NEXT: v_lshrrev_b32_e32 v1, 16, v0676; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0677; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0678; GFX10-NEXT: s_endpgm679;680; GFX11-TRUE16-LABEL: v_test_sub_v2i16_zext_to_v2i32:681; GFX11-TRUE16: ; %bb.0:682; GFX11-TRUE16-NEXT: s_clause 0x1683; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24684; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34685; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0686; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)687; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0688; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)689; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc690; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)691; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc692; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)693; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000694; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1695; GFX11-TRUE16-NEXT: v_pk_sub_i16 v2, v1, v0696; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0697; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)698; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v2699; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h700; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0701; GFX11-TRUE16-NEXT: s_endpgm702;703; GFX11-FAKE16-LABEL: v_test_sub_v2i16_zext_to_v2i32:704; GFX11-FAKE16: ; %bb.0:705; GFX11-FAKE16-NEXT: s_clause 0x1706; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24707; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34708; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0709; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)710; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0711; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)712; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc713; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)714; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc715; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)716; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000717; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1718; GFX11-FAKE16-NEXT: v_pk_sub_i16 v0, v1, v0719; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)720; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0721; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0722; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0723; GFX11-FAKE16-NEXT: s_endpgm724 %tid = call i32 @llvm.amdgcn.workitem.id.x()725 %gep.out = getelementptr inbounds <2 x i32>, ptr addrspace(1) %out, i32 %tid726 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid727 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid728 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0729 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in1730 %add = sub <2 x i16> %a, %b731 %ext = zext <2 x i16> %add to <2 x i32>732 store <2 x i32> %ext, ptr addrspace(1) %out733 ret void734}735 736; FIXME: Need to handle non-uniform case for function below (load without gep).737define amdgpu_kernel void @v_test_sub_v2i16_zext_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {738; GFX9-LABEL: v_test_sub_v2i16_zext_to_v2i64:739; GFX9: ; %bb.0:740; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24741; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34742; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0743; GFX9-NEXT: v_mov_b32_e32 v1, 0744; GFX9-NEXT: s_waitcnt lgkmcnt(0)745; GFX9-NEXT: global_load_dword v2, v0, s[2:3] glc746; GFX9-NEXT: s_waitcnt vmcnt(0)747; GFX9-NEXT: global_load_dword v3, v0, s[6:7] glc748; GFX9-NEXT: s_waitcnt vmcnt(0)749; GFX9-NEXT: s_mov_b32 s3, 0xf000750; GFX9-NEXT: s_mov_b32 s2, -1751; GFX9-NEXT: v_pk_sub_i16 v0, v2, v3752; GFX9-NEXT: v_alignbit_b32 v2, 0, v0, 16753; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0754; GFX9-NEXT: v_mov_b32_e32 v3, v1755; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0756; GFX9-NEXT: s_endpgm757;758; VI-LABEL: v_test_sub_v2i16_zext_to_v2i64:759; VI: ; %bb.0:760; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24761; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34762; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0763; VI-NEXT: s_waitcnt lgkmcnt(0)764; VI-NEXT: v_mov_b32_e32 v1, s3765; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2766; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc767; VI-NEXT: v_mov_b32_e32 v3, s5768; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2769; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc770; VI-NEXT: flat_load_dword v4, v[0:1] glc771; VI-NEXT: s_waitcnt vmcnt(0)772; VI-NEXT: flat_load_dword v2, v[2:3] glc773; VI-NEXT: s_waitcnt vmcnt(0)774; VI-NEXT: v_mov_b32_e32 v1, 0775; VI-NEXT: s_mov_b32 s3, 0xf000776; VI-NEXT: s_mov_b32 s2, -1777; VI-NEXT: v_mov_b32_e32 v3, v1778; VI-NEXT: v_sub_u16_e32 v0, v4, v2779; VI-NEXT: v_sub_u16_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1780; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0781; VI-NEXT: s_endpgm782;783; GFX10-LABEL: v_test_sub_v2i16_zext_to_v2i64:784; GFX10: ; %bb.0:785; GFX10-NEXT: s_clause 0x1786; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24787; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34788; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0789; GFX10-NEXT: s_waitcnt lgkmcnt(0)790; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc791; GFX10-NEXT: s_waitcnt vmcnt(0)792; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc793; GFX10-NEXT: s_waitcnt vmcnt(0)794; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)795; GFX10-NEXT: s_mov_b32 s3, 0x31016000796; GFX10-NEXT: s_mov_b32 s2, -1797; GFX10-NEXT: v_pk_sub_i16 v0, v1, v2798; GFX10-NEXT: v_mov_b32_e32 v1, 0799; GFX10-NEXT: v_alignbit_b32 v2, 0, v0, 16800; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0801; GFX10-NEXT: v_mov_b32_e32 v3, v1802; GFX10-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0803; GFX10-NEXT: s_endpgm804;805; GFX11-TRUE16-LABEL: v_test_sub_v2i16_zext_to_v2i64:806; GFX11-TRUE16: ; %bb.0:807; GFX11-TRUE16-NEXT: s_clause 0x1808; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24809; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34810; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0811; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.h, 0812; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)813; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0814; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)815; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc816; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)817; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc818; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)819; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000820; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1821; GFX11-TRUE16-NEXT: v_pk_sub_i16 v0, v1, v0822; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0823; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)824; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v0.h825; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v2.h826; GFX11-TRUE16-NEXT: v_mov_b32_e32 v3, v1827; GFX11-TRUE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0828; GFX11-TRUE16-NEXT: s_endpgm829;830; GFX11-FAKE16-LABEL: v_test_sub_v2i16_zext_to_v2i64:831; GFX11-FAKE16: ; %bb.0:832; GFX11-FAKE16-NEXT: s_clause 0x1833; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24834; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34835; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0836; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)837; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0838; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)839; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc840; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)841; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc842; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)843; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000844; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1845; GFX11-FAKE16-NEXT: v_pk_sub_i16 v0, v1, v0846; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0847; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)848; GFX11-FAKE16-NEXT: v_alignbit_b32 v2, 0, v0, 16849; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, v1 :: v_dual_and_b32 v0, 0xffff, v0850; GFX11-FAKE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0851; GFX11-FAKE16-NEXT: s_endpgm852 %tid = call i32 @llvm.amdgcn.workitem.id.x()853 %gep.out = getelementptr inbounds <2 x i64>, ptr addrspace(1) %out, i32 %tid854 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid855 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid856 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0857 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in1858 %add = sub <2 x i16> %a, %b859 %ext = zext <2 x i16> %add to <2 x i64>860 store <2 x i64> %ext, ptr addrspace(1) %out861 ret void862}863 864; FIXME: Need to handle non-uniform case for function below (load without gep).865define amdgpu_kernel void @v_test_sub_v2i16_sext_to_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {866; GFX9-LABEL: v_test_sub_v2i16_sext_to_v2i32:867; GFX9: ; %bb.0:868; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24869; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34870; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0871; GFX9-NEXT: s_waitcnt lgkmcnt(0)872; GFX9-NEXT: global_load_dword v1, v0, s[2:3] glc873; GFX9-NEXT: s_waitcnt vmcnt(0)874; GFX9-NEXT: global_load_dword v2, v0, s[6:7] glc875; GFX9-NEXT: s_waitcnt vmcnt(0)876; GFX9-NEXT: s_mov_b32 s3, 0xf000877; GFX9-NEXT: s_mov_b32 s2, -1878; GFX9-NEXT: v_pk_sub_i16 v0, v1, v2879; GFX9-NEXT: v_ashrrev_i32_e32 v1, 16, v0880; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 16881; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0882; GFX9-NEXT: s_endpgm883;884; VI-LABEL: v_test_sub_v2i16_sext_to_v2i32:885; VI: ; %bb.0:886; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24887; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34888; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0889; VI-NEXT: s_waitcnt lgkmcnt(0)890; VI-NEXT: v_mov_b32_e32 v1, s3891; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2892; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc893; VI-NEXT: v_mov_b32_e32 v3, s5894; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2895; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc896; VI-NEXT: flat_load_dword v0, v[0:1] glc897; VI-NEXT: s_waitcnt vmcnt(0)898; VI-NEXT: flat_load_dword v1, v[2:3] glc899; VI-NEXT: s_waitcnt vmcnt(0)900; VI-NEXT: s_mov_b32 s3, 0xf000901; VI-NEXT: s_mov_b32 s2, -1902; VI-NEXT: v_sub_u16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1903; VI-NEXT: v_sub_u16_e32 v0, v0, v1904; VI-NEXT: v_bfe_i32 v0, v0, 0, 16905; VI-NEXT: v_bfe_i32 v1, v2, 0, 16906; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0907; VI-NEXT: s_endpgm908;909; GFX10-LABEL: v_test_sub_v2i16_sext_to_v2i32:910; GFX10: ; %bb.0:911; GFX10-NEXT: s_clause 0x1912; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24913; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34914; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0915; GFX10-NEXT: s_waitcnt lgkmcnt(0)916; GFX10-NEXT: global_load_dword v1, v0, s[2:3] glc dlc917; GFX10-NEXT: s_waitcnt vmcnt(0)918; GFX10-NEXT: global_load_dword v2, v0, s[6:7] glc dlc919; GFX10-NEXT: s_waitcnt vmcnt(0)920; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)921; GFX10-NEXT: s_mov_b32 s3, 0x31016000922; GFX10-NEXT: s_mov_b32 s2, -1923; GFX10-NEXT: v_pk_sub_i16 v0, v1, v2924; GFX10-NEXT: v_ashrrev_i32_e32 v1, 16, v0925; GFX10-NEXT: v_bfe_i32 v0, v0, 0, 16926; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0927; GFX10-NEXT: s_endpgm928;929; GFX11-LABEL: v_test_sub_v2i16_sext_to_v2i32:930; GFX11: ; %bb.0:931; GFX11-NEXT: s_clause 0x1932; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24933; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34934; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0935; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)936; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0937; GFX11-NEXT: s_waitcnt lgkmcnt(0)938; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc939; GFX11-NEXT: s_waitcnt vmcnt(0)940; GFX11-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc941; GFX11-NEXT: s_waitcnt vmcnt(0)942; GFX11-NEXT: s_mov_b32 s3, 0x31016000943; GFX11-NEXT: s_mov_b32 s2, -1944; GFX11-NEXT: v_pk_sub_i16 v0, v1, v0945; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)946; GFX11-NEXT: v_ashrrev_i32_e32 v1, 16, v0947; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16948; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0949; GFX11-NEXT: s_endpgm950 %tid = call i32 @llvm.amdgcn.workitem.id.x()951 %gep.out = getelementptr inbounds <2 x i32>, ptr addrspace(1) %out, i32 %tid952 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid953 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid954 %a = load volatile <2 x i16>, ptr addrspace(1) %gep.in0955 %b = load volatile <2 x i16>, ptr addrspace(1) %gep.in1956 %add = sub <2 x i16> %a, %b957 %ext = sext <2 x i16> %add to <2 x i32>958 store <2 x i32> %ext, ptr addrspace(1) %out959 ret void960}961 962; FIXME: Need to handle non-uniform case for function below (load without gep).963define amdgpu_kernel void @v_test_sub_v2i16_sext_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in0, ptr addrspace(1) %in1) #1 {964; GFX9-LABEL: v_test_sub_v2i16_sext_to_v2i64:965; GFX9: ; %bb.0:966; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24967; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34968; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0969; GFX9-NEXT: s_waitcnt lgkmcnt(0)970; GFX9-NEXT: global_load_dword v1, v0, s[2:3]971; GFX9-NEXT: global_load_dword v2, v0, s[6:7]972; GFX9-NEXT: s_mov_b32 s3, 0xf000973; GFX9-NEXT: s_mov_b32 s2, -1974; GFX9-NEXT: s_waitcnt vmcnt(0)975; GFX9-NEXT: v_pk_sub_i16 v1, v1, v2976; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1977; GFX9-NEXT: v_bfe_i32 v0, v1, 0, 16978; GFX9-NEXT: v_bfe_i32 v2, v2, 0, 16979; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0980; GFX9-NEXT: v_ashrrev_i32_e32 v3, 31, v2981; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0982; GFX9-NEXT: s_endpgm983;984; VI-LABEL: v_test_sub_v2i16_sext_to_v2i64:985; VI: ; %bb.0:986; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24987; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34988; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0989; VI-NEXT: s_waitcnt lgkmcnt(0)990; VI-NEXT: v_mov_b32_e32 v1, s3991; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2992; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc993; VI-NEXT: v_mov_b32_e32 v3, s5994; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v2995; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc996; VI-NEXT: flat_load_dword v0, v[0:1]997; VI-NEXT: flat_load_dword v1, v[2:3]998; VI-NEXT: s_mov_b32 s3, 0xf000999; VI-NEXT: s_mov_b32 s2, -11000; VI-NEXT: s_waitcnt vmcnt(0)1001; VI-NEXT: v_sub_u16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11002; VI-NEXT: v_sub_u16_e32 v0, v0, v11003; VI-NEXT: v_bfe_i32 v0, v0, 0, 161004; VI-NEXT: v_bfe_i32 v2, v2, 0, 161005; VI-NEXT: v_ashrrev_i32_e32 v1, 31, v01006; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v21007; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01008; VI-NEXT: s_endpgm1009;1010; GFX10-LABEL: v_test_sub_v2i16_sext_to_v2i64:1011; GFX10: ; %bb.0:1012; GFX10-NEXT: s_clause 0x11013; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241014; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341015; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01016; GFX10-NEXT: s_waitcnt lgkmcnt(0)1017; GFX10-NEXT: s_clause 0x11018; GFX10-NEXT: global_load_dword v1, v0, s[2:3]1019; GFX10-NEXT: global_load_dword v2, v0, s[6:7]1020; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)1021; GFX10-NEXT: s_mov_b32 s3, 0x310160001022; GFX10-NEXT: s_mov_b32 s2, -11023; GFX10-NEXT: s_waitcnt vmcnt(0)1024; GFX10-NEXT: v_pk_sub_i16 v0, v1, v21025; GFX10-NEXT: v_lshrrev_b32_e32 v1, 16, v01026; GFX10-NEXT: v_bfe_i32 v0, v0, 0, 161027; GFX10-NEXT: v_bfe_i32 v2, v1, 0, 161028; GFX10-NEXT: v_ashrrev_i32_e32 v1, 31, v01029; GFX10-NEXT: v_ashrrev_i32_e32 v3, 31, v21030; GFX10-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01031; GFX10-NEXT: s_endpgm1032;1033; GFX11-TRUE16-LABEL: v_test_sub_v2i16_sext_to_v2i64:1034; GFX11-TRUE16: ; %bb.0:1035; GFX11-TRUE16-NEXT: s_clause 0x11036; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241037; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x341038; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01039; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1040; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01041; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1042; GFX11-TRUE16-NEXT: s_clause 0x11043; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]1044; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5]1045; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x310160001046; GFX11-TRUE16-NEXT: s_mov_b32 s2, -11047; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1048; GFX11-TRUE16-NEXT: v_pk_sub_i16 v0, v1, v01049; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 01050; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)1051; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.h1052; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 161053; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1054; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v1, 0, 161055; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v01056; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1057; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v21058; GFX11-TRUE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 01059; GFX11-TRUE16-NEXT: s_endpgm1060;1061; GFX11-FAKE16-LABEL: v_test_sub_v2i16_sext_to_v2i64:1062; GFX11-FAKE16: ; %bb.0:1063; GFX11-FAKE16-NEXT: s_clause 0x11064; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241065; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x341066; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01067; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1068; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01069; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1070; GFX11-FAKE16-NEXT: s_clause 0x11071; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3]1072; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5]1073; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x310160001074; GFX11-FAKE16-NEXT: s_mov_b32 s2, -11075; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1076; GFX11-FAKE16-NEXT: v_pk_sub_i16 v0, v1, v01077; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1078; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v01079; GFX11-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 161080; GFX11-FAKE16-NEXT: v_bfe_i32 v2, v1, 0, 161081; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1082; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v1, 31, v01083; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v21084; GFX11-FAKE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 01085; GFX11-FAKE16-NEXT: s_endpgm1086 %tid = call i32 @llvm.amdgcn.workitem.id.x()1087 %gep.out = getelementptr inbounds <2 x i64>, ptr addrspace(1) %out, i32 %tid1088 %gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid1089 %gep.in1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in1, i32 %tid1090 %a = load <2 x i16>, ptr addrspace(1) %gep.in01091 %b = load <2 x i16>, ptr addrspace(1) %gep.in11092 %add = sub <2 x i16> %a, %b1093 %ext = sext <2 x i16> %add to <2 x i64>1094 store <2 x i64> %ext, ptr addrspace(1) %out1095 ret void1096}1097 1098declare i32 @llvm.amdgcn.workitem.id.x() #01099 1100attributes #0 = { nounwind readnone }1101attributes #1 = { nounwind }1102