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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=tahiti -o - %s | FileCheck -check-prefixes=GCN,GFX6 %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga -o - %s | FileCheck -check-prefixes=GCN,GFX8 %s4 5define amdgpu_kernel void @row_filter_C1_D0() #0 {6; GCN-LABEL: row_filter_C1_D0:7; GCN: ; %bb.0: ; %entry8; GCN-NEXT: s_cbranch_scc1 .LBB0_29; GCN-NEXT: ; %bb.1: ; %do.body.preheader10; GCN-NEXT: .LBB0_2: ; %for.inc.111entry:12 br i1 poison, label %for.inc.1, label %do.body.preheader13 14do.body.preheader: ; preds = %entry15 %tmp = insertelement <4 x i32> zeroinitializer, i32 poison, i32 116 %undef1 = freeze i1 poison17 br i1 %undef1, label %do.body56.1, label %do.body9018 19do.body90: ; preds = %do.body56.2, %do.body56.1, %do.body.preheader20 %tmp1 = phi <4 x i32> [ %tmp6, %do.body56.2 ], [ %tmp5, %do.body56.1 ], [ %tmp, %do.body.preheader ]21 %tmp2 = insertelement <4 x i32> %tmp1, i32 poison, i32 222 %tmp3 = insertelement <4 x i32> %tmp2, i32 poison, i32 323 %undef3 = freeze i1 poison24 br i1 %undef3, label %do.body124.1, label %do.body.1562.preheader25 26do.body.1562.preheader: ; preds = %do.body124.1, %do.body9027 %storemerge = phi <4 x i32> [ %tmp3, %do.body90 ], [ %tmp7, %do.body124.1 ]28 %tmp4 = insertelement <4 x i32> poison, i32 poison, i32 129 br label %for.inc.130 31do.body56.1: ; preds = %do.body.preheader32 %tmp5 = insertelement <4 x i32> %tmp, i32 poison, i32 133 %or.cond472.1 = or i1 poison, poison34 br i1 %or.cond472.1, label %do.body56.2, label %do.body9035 36do.body56.2: ; preds = %do.body56.137 %tmp6 = insertelement <4 x i32> %tmp5, i32 poison, i32 138 br label %do.body9039 40do.body124.1: ; preds = %do.body9041 %tmp7 = insertelement <4 x i32> %tmp3, i32 poison, i32 342 br label %do.body.1562.preheader43 44for.inc.1: ; preds = %do.body.1562.preheader, %entry45 %storemerge591 = phi <4 x i32> [ zeroinitializer, %entry ], [ %storemerge, %do.body.1562.preheader ]46 %undef2 = freeze <4 x i32> poison47 %add.i495 = add <4 x i32> %storemerge591, %undef248 unreachable49}50 51define amdgpu_ps void @foo() #0 {52; GCN-LABEL: foo:53; GCN: ; %bb.0: ; %bb54; GCN-NEXT: s_mov_b64 s[0:1], -155; GCN-NEXT: s_cbranch_scc0 .LBB1_256; GCN-NEXT: ; %bb.1: ; %bb2457; GCN-NEXT: s_mov_b64 s[0:1], 058; GCN-NEXT: .LBB1_2: ; %Flow159; GCN-NEXT: s_and_b64 vcc, exec, s[0:1]60; GCN-NEXT: s_cbranch_vccz .LBB1_461; GCN-NEXT: ; %bb.3: ; %bb962; GCN-NEXT: image_sample v[0:1], v0, s[0:7], s[0:3] dmask:0xa63; GCN-NEXT: s_branch .LBB1_564; GCN-NEXT: .LBB1_4:65; GCN-NEXT: v_mov_b32_e32 v1, 066; GCN-NEXT: v_mov_b32_e32 v0, 067; GCN-NEXT: .LBB1_5: ; %bb1468; GCN-NEXT: s_waitcnt vmcnt(0)69; GCN-NEXT: v_mul_f32_e32 v0, 0x41280000, v070; GCN-NEXT: v_mul_f32_e32 v1, 0x41380000, v171; GCN-NEXT: exp mrt0 v1, v0, v0, v0 done vm72; GCN-NEXT: s_endpgm73bb:74 %undef0 = freeze i1 poison75 br i1 %undef0, label %bb2, label %bb176 77bb1: ; preds = %bb78 %undef1 = freeze i1 poison79 br i1 %undef1, label %bb4, label %bb680 81bb2: ; preds = %bb4, %bb82 %tmp = phi float [ %tmp5, %bb4 ], [ 0.000000e+00, %bb ]83 br i1 poison, label %bb9, label %bb1384 85bb4: ; preds = %bb7, %bb6, %bb186 %tmp5 = phi float [ poison, %bb1 ], [ poison, %bb6 ], [ %tmp8, %bb7 ]87 br label %bb288 89bb6: ; preds = %bb190 %undef2 = freeze i1 poison91 br i1 %undef2, label %bb7, label %bb492 93bb7: ; preds = %bb694 %tmp8 = fmul float poison, poison95 br label %bb496 97bb9: ; preds = %bb298 %tmp10 = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 15, float poison, <8 x i32> poison, <4 x i32> poison, i1 0, i32 0, i32 0)99 %tmp11 = extractelement <4 x float> %tmp10, i32 1100 %tmp12 = extractelement <4 x float> %tmp10, i32 3101 br label %bb14102 103bb13: ; preds = %bb2104 br i1 poison, label %bb23, label %bb24105 106bb14: ; preds = %bb27, %bb24, %bb9107 %tmp15 = phi float [ %tmp12, %bb9 ], [ poison, %bb27 ], [ 0.000000e+00, %bb24 ]108 %tmp16 = phi float [ %tmp11, %bb9 ], [ poison, %bb27 ], [ %tmp25, %bb24 ]109 %tmp17 = fmul float 1.050000e+01, %tmp16110 %tmp18 = fmul float 1.150000e+01, %tmp15111 call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %tmp18, float %tmp17, float %tmp17, float %tmp17, i1 true, i1 true) #0112 ret void113 114bb23: ; preds = %bb13115 br i1 poison, label %bb24, label %bb26116 117bb24: ; preds = %bb26, %bb23, %bb13118 %tmp25 = phi float [ %tmp, %bb13 ], [ %tmp, %bb26 ], [ 0.000000e+00, %bb23 ]119 br i1 poison, label %bb27, label %bb14120 121bb26: ; preds = %bb23122 br label %bb24123 124bb27: ; preds = %bb24125 br label %bb14126}127 128 129declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0130declare <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32, float, <8 x i32>, <4 x i32>, i1, i32, i32) #1131 132attributes #0 = { nounwind }133attributes #1 = { nounwind readonly }134;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:135; GFX6: {{.*}}136; GFX8: {{.*}}137