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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s3 4define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {5; EG-LABEL: main:6; EG: ; %bb.0: ; %main_body7; EG-NEXT: CALL_FS8; EG-NEXT: ALU 3, @8, KC0[CB0:0-32], KC1[]9; EG-NEXT: EXPORT T1.XYZW10; EG-NEXT: EXPORT T0.XYXX11; EG-NEXT: EXPORT T0.ZXXX12; EG-NEXT: EXPORT T0.XXWX13; EG-NEXT: EXPORT T0.XXXW14; EG-NEXT: CF_END15; EG-NEXT: ALU clause starting at 8:16; EG-NEXT: MOV * T0.W, KC0[0].X,17; EG-NEXT: MUL_IEEE T0.X, KC0[0].X, 0.0,18; EG-NEXT: MUL_IEEE T0.Y, KC0[0].Y, KC0[0].X,19; EG-NEXT: MUL_IEEE * T0.Z, KC0[0].Z, KC0[0].X,20main_body:21 %0 = extractelement <4 x float> %reg1, i32 022 %1 = extractelement <4 x float> %reg1, i32 123 %2 = extractelement <4 x float> %reg1, i32 224 %3 = extractelement <4 x float> %reg1, i32 325 %4 = load <4 x float>, ptr addrspace(8) null26 %5 = extractelement <4 x float> %4, i32 127 %6 = load <4 x float>, ptr addrspace(8) null28 %7 = extractelement <4 x float> %6, i32 229 %8 = load <4 x float>, ptr addrspace(8) null30 %9 = extractelement <4 x float> %8, i32 031 %10 = fmul float 0.000000e+00, %932 %11 = load <4 x float>, ptr addrspace(8) null33 %12 = extractelement <4 x float> %11, i32 034 %13 = fmul float %5, %1235 %14 = load <4 x float>, ptr addrspace(8) null36 %15 = extractelement <4 x float> %14, i32 037 %16 = fmul float 0.000000e+00, %1538 %17 = load <4 x float>, ptr addrspace(8) null39 %18 = extractelement <4 x float> %17, i32 040 %19 = fmul float 0.000000e+00, %1841 %20 = load <4 x float>, ptr addrspace(8) null42 %21 = extractelement <4 x float> %20, i32 043 %22 = fmul float %7, %2144 %23 = load <4 x float>, ptr addrspace(8) null45 %24 = extractelement <4 x float> %23, i32 046 %25 = fmul float 0.000000e+00, %2447 %26 = load <4 x float>, ptr addrspace(8) null48 %27 = extractelement <4 x float> %26, i32 049 %28 = fmul float 0.000000e+00, %2750 %29 = load <4 x float>, ptr addrspace(8) null51 %30 = extractelement <4 x float> %29, i32 052 %31 = fmul float 0.000000e+00, %3053 %32 = load <4 x float>, ptr addrspace(8) null54 %33 = extractelement <4 x float> %32, i32 055 %34 = fmul float 0.000000e+00, %3356 %35 = load <4 x float>, ptr addrspace(8) null57 %36 = extractelement <4 x float> %35, i32 058 %37 = fmul float 0.000000e+00, %3659 %38 = load <4 x float>, ptr addrspace(8) null60 %39 = extractelement <4 x float> %38, i32 061 %40 = fmul float 1.000000e+00, %3962 %41 = load <4 x float>, ptr addrspace(8) null63 %42 = extractelement <4 x float> %41, i32 064 %43 = fmul float 0.000000e+00, %4265 %44 = load <4 x float>, ptr addrspace(8) null66 %45 = extractelement <4 x float> %44, i32 067 %46 = fmul float 0.000000e+00, %4568 %47 = load <4 x float>, ptr addrspace(8) null69 %48 = extractelement <4 x float> %47, i32 070 %49 = fmul float 0.000000e+00, %4871 %50 = load <4 x float>, ptr addrspace(8) null72 %51 = extractelement <4 x float> %50, i32 073 %52 = fmul float 0.000000e+00, %5174 %53 = load <4 x float>, ptr addrspace(8) null75 %54 = extractelement <4 x float> %53, i32 076 %55 = fmul float 1.000000e+00, %5477 %56 = insertelement <4 x float> poison, float %0, i32 078 %57 = insertelement <4 x float> %56, float %1, i32 179 %58 = insertelement <4 x float> %57, float %2, i32 280 %59 = insertelement <4 x float> %58, float %3, i32 381 call void @llvm.r600.store.swizzle(<4 x float> %59, i32 60, i32 1)82 %60 = insertelement <4 x float> poison, float %10, i32 083 %61 = insertelement <4 x float> %60, float %13, i32 184 %62 = insertelement <4 x float> %61, float %16, i32 285 %63 = insertelement <4 x float> %62, float %19, i32 386 call void @llvm.r600.store.swizzle(<4 x float> %63, i32 0, i32 2)87 %64 = insertelement <4 x float> poison, float %22, i32 088 %65 = insertelement <4 x float> %64, float %25, i32 189 %66 = insertelement <4 x float> %65, float %28, i32 290 %67 = insertelement <4 x float> %66, float %31, i32 391 call void @llvm.r600.store.swizzle(<4 x float> %67, i32 1, i32 2)92 %68 = insertelement <4 x float> poison, float %34, i32 093 %69 = insertelement <4 x float> %68, float %37, i32 194 %70 = insertelement <4 x float> %69, float %40, i32 295 %71 = insertelement <4 x float> %70, float %43, i32 396 call void @llvm.r600.store.swizzle(<4 x float> %71, i32 2, i32 2)97 %72 = insertelement <4 x float> poison, float %46, i32 098 %73 = insertelement <4 x float> %72, float %49, i32 199 %74 = insertelement <4 x float> %73, float %52, i32 2100 %75 = insertelement <4 x float> %74, float %55, i32 3101 call void @llvm.r600.store.swizzle(<4 x float> %75, i32 3, i32 2)102 ret void103}104 105define amdgpu_vs void @main2(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {106; EG-LABEL: main2:107; EG: ; %bb.0: ; %main_body108; EG-NEXT: CALL_FS109; EG-NEXT: ALU 11, @6, KC0[CB0:0-32], KC1[]110; EG-NEXT: EXPORT T1.XY__111; EG-NEXT: EXPORT T0.ZXY0112; EG-NEXT: CF_END113; EG-NEXT: PAD114; EG-NEXT: ALU clause starting at 6:115; EG-NEXT: MULADD_IEEE * T0.W, KC0[1].X, literal.x, 0.5,116; EG-NEXT: 1042479491(1.591549e-01), 0(0.000000e+00)117; EG-NEXT: FRACT * T0.W, PV.W,118; EG-NEXT: ADD * T0.W, PV.W, literal.x,119; EG-NEXT: -1090519040(-5.000000e-01), 0(0.000000e+00)120; EG-NEXT: COS * T0.Z, PV.W,121; EG-NEXT: ADD T1.X, T1.X, literal.x,122; EG-NEXT: MOV T0.Y, KC0[0].Y,123; EG-NEXT: MOV * T0.X, KC0[0].X,124; EG-NEXT: 1075838976(2.500000e+00), 0(0.000000e+00)125; EG-NEXT: MUL_IEEE * T1.Y, T1.Y, literal.x,126; EG-NEXT: 1080033280(3.500000e+00), 0(0.000000e+00)127main_body:128 %0 = extractelement <4 x float> %reg1, i32 0129 %1 = extractelement <4 x float> %reg1, i32 1130 %2 = fadd float %0, 2.5131 %3 = fmul float %1, 3.5132 %4 = load <4 x float>, ptr addrspace(8) getelementptr ([1024 x <4 x float>], ptr addrspace(8) null, i64 0, i32 1)133 %5 = extractelement <4 x float> %4, i32 0134 %6 = call float @llvm.cos.f32(float %5)135 %7 = load <4 x float>, ptr addrspace(8) null136 %8 = extractelement <4 x float> %7, i32 0137 %9 = load <4 x float>, ptr addrspace(8) null138 %10 = extractelement <4 x float> %9, i32 1139 %11 = insertelement <4 x float> poison, float %2, i32 0140 %12 = insertelement <4 x float> %11, float %3, i32 1141 call void @llvm.r600.store.swizzle(<4 x float> %12, i32 60, i32 1)142 %13 = insertelement <4 x float> poison, float %6, i32 0143 %14 = insertelement <4 x float> %13, float %8, i32 1144 %15 = insertelement <4 x float> %14, float %10, i32 2145 %16 = insertelement <4 x float> %15, float 0.000000e+00, i32 3146 call void @llvm.r600.store.swizzle(<4 x float> %16, i32 0, i32 2)147 ret void148}149 150; Function Attrs: nounwind readonly151declare float @llvm.cos.f32(float) #1152 153declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)154 155attributes #1 = { nounwind readonly }156