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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s3 4declare hidden void @void_func_i32_inreg(i32 inreg)5 6define void @tail_call_i32_inreg_uniform(i32 inreg %sgpr) {7; CHECK-LABEL: tail_call_i32_inreg_uniform:8; CHECK: ; %bb.0:9; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10; CHECK-NEXT: s_getpc_b64 s[18:19]11; CHECK-NEXT: s_add_u32 s18, s18, void_func_i32_inreg@rel32@lo+412; CHECK-NEXT: s_addc_u32 s19, s19, void_func_i32_inreg@rel32@hi+1213; CHECK-NEXT: s_mov_b32 s0, s1614; CHECK-NEXT: s_setpc_b64 s[18:19]15 tail call void @void_func_i32_inreg(i32 inreg %sgpr)16 ret void17}18 19@constant = external hidden addrspace(4) constant ptr20 21define void @indirect_tail_call_i32_inreg_uniform(i32 inreg %sgpr) {22; CHECK-LABEL: indirect_tail_call_i32_inreg_uniform:23; CHECK: ; %bb.0:24; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; CHECK-NEXT: s_getpc_b64 s[18:19]26; CHECK-NEXT: s_add_u32 s18, s18, constant@rel32@lo+427; CHECK-NEXT: s_addc_u32 s19, s19, constant@rel32@hi+1228; CHECK-NEXT: s_load_dwordx2 s[18:19], s[18:19], 0x029; CHECK-NEXT: s_mov_b32 s0, s1630; CHECK-NEXT: s_waitcnt lgkmcnt(0)31; CHECK-NEXT: s_setpc_b64 s[18:19]32 %fptr = load ptr, ptr addrspace(4) @constant, align 833 tail call void %fptr(i32 inreg %sgpr)34 ret void35}36 37declare void @void_func_i64_inreg(i64 inreg)38 39define void @tail_call_i64_inreg_uniform(i64 inreg %sgpr) {40; CHECK-LABEL: tail_call_i64_inreg_uniform:41; CHECK: ; %bb.0:42; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)43; CHECK-NEXT: s_getpc_b64 s[18:19]44; CHECK-NEXT: s_add_u32 s18, s18, void_func_i64_inreg@gotpcrel32@lo+445; CHECK-NEXT: s_addc_u32 s19, s19, void_func_i64_inreg@gotpcrel32@hi+1246; CHECK-NEXT: s_load_dwordx2 s[18:19], s[18:19], 0x047; CHECK-NEXT: s_mov_b32 s1, s1748; CHECK-NEXT: s_mov_b32 s0, s1649; CHECK-NEXT: s_waitcnt lgkmcnt(0)50; CHECK-NEXT: s_setpc_b64 s[18:19]51 tail call void @void_func_i64_inreg(i64 inreg %sgpr)52 ret void53}54 55define void @tail_call_i64_inreg_uniform_in_vgpr() {56; CHECK-LABEL: tail_call_i64_inreg_uniform_in_vgpr:57; CHECK: ; %bb.0:58; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)59; CHECK-NEXT: v_mov_b32_e32 v0, 060; CHECK-NEXT: ds_read_b64 v[0:1], v061; CHECK-NEXT: s_getpc_b64 s[16:17]62; CHECK-NEXT: s_add_u32 s16, s16, void_func_i64_inreg@gotpcrel32@lo+463; CHECK-NEXT: s_addc_u32 s17, s17, void_func_i64_inreg@gotpcrel32@hi+1264; CHECK-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x065; CHECK-NEXT: s_waitcnt lgkmcnt(0)66; CHECK-NEXT: v_readfirstlane_b32 s0, v067; CHECK-NEXT: v_readfirstlane_b32 s1, v168; CHECK-NEXT: s_setpc_b64 s[16:17]69 %uniform.vgpr = load i64, ptr addrspace(3) null, align 870 tail call void @void_func_i64_inreg(i64 inreg %uniform.vgpr)71 ret void72}73