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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -march=amdgcn -mcpu=gfx1100 -run-pass si-fold-operands -mattr=+real-true16 -o - %s | FileCheck %s3 4---5name: fold_16bit_subreg_16tracksRegLiveness: true7registers:8body: |9 bb.0.entry:10 ; CHECK-LABEL: name: fold_16bit_subreg_111 ; CHECK: [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF12 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF13 ; CHECK-NEXT: [[V_CMP_EQ_F16_t16_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_EQ_F16_t16_e64 0, killed [[DEF1]], 2, [[DEF]].sub1, 0, 0, implicit $mode, implicit $exec14 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_CMP_EQ_F16_t16_e64_]]15 %0:sreg_64_xexec = IMPLICIT_DEF16 %1:sgpr_lo16 = COPY %0.sub1_lo16:sreg_64_xexec17 %2:vgpr_16 = COPY %1:sgpr_lo1618 %3:vgpr_16 = IMPLICIT_DEF19 %4:sreg_32 = nofpexcept V_CMP_EQ_F16_t16_e64 0, killed %3:vgpr_16, 2, killed %2:vgpr_16, 0, 0, implicit $mode, implicit $exec20 S_ENDPGM 0, implicit %421...22 23---24name: fold_16bit_subreg_025tracksRegLiveness: true26registers:27body: |28 bb.0.entry:29 ; CHECK-LABEL: name: fold_16bit_subreg_030 ; CHECK: [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF31 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF32 ; CHECK-NEXT: [[V_CMP_EQ_F16_t16_e64_:%[0-9]+]]:sreg_32 = nofpexcept V_CMP_EQ_F16_t16_e64 0, killed [[DEF1]], 2, [[DEF]].sub0, 0, 0, implicit $mode, implicit $exec33 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_CMP_EQ_F16_t16_e64_]]34 %0:sreg_64_xexec = IMPLICIT_DEF35 %1:sgpr_lo16 = COPY %0.lo16:sreg_64_xexec36 %2:vgpr_16 = COPY %1:sgpr_lo1637 %3:vgpr_16 = IMPLICIT_DEF38 %4:sreg_32 = nofpexcept V_CMP_EQ_F16_t16_e64 0, killed %3:vgpr_16, 2, killed %2:vgpr_16, 0, 0, implicit $mode, implicit $exec39 S_ENDPGM 0, implicit %440...41 42---43name: sgpr_lo1644tracksRegLiveness: true45registers:46body: |47 bb.0.entry:48 ; CHECK-LABEL: name: sgpr_lo1649 ; CHECK: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF50 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF51 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 3052 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_16 = COPY [[S_MOV_B32_]]53 ; CHECK-NEXT: [[V_ALIGNBIT_B32_t16_e64_:%[0-9]+]]:vgpr_32 = V_ALIGNBIT_B32_t16_e64 0, [[DEF]], 0, killed [[DEF1]], 0, killed [[COPY]], 0, 0, implicit $exec54 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_ALIGNBIT_B32_t16_e64_]]55 %0:sreg_32 = IMPLICIT_DEF56 %1:sreg_32 = IMPLICIT_DEF57 %2:sreg_32 = S_MOV_B32 3058 %3:sgpr_lo16 = COPY %2.lo16:sreg_3259 %4:vgpr_16 = COPY %3:sgpr_lo1660 %5:vgpr_32 = V_ALIGNBIT_B32_t16_e64 0, %0:sreg_32, 0, killed %1:sreg_32, 0, killed %4:vgpr_16, 0, 0, implicit $exec61 S_ENDPGM 0, implicit %562...63 64---65name: fold_16bit_madmix_clamp66tracksRegLiveness: true67registers:68body: |69 bb.0:70 liveins: $vgpr0, $vgpr1, $vgpr271 ; CHECK-LABEL: name: fold_16bit_madmix_clamp72 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr273 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr275 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr176 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr077 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF78 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]79 ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 1, [[COPY3]], 0, 0, implicit $mode, implicit $exec80 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[V_FMA_MIXLO_F16_]]81 ; CHECK-NEXT: $vgpr0 = COPY [[V_FMA_MIXLO_F16_]]82 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr083 %0:vgpr_32 = COPY $vgpr284 %1:vgpr_32 = COPY $vgpr185 %2:vgpr_32 = COPY $vgpr086 %3:sreg_32 = IMPLICIT_DEF87 %4:vgpr_32 = COPY %388 %5:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, %2, 8, %1, 0, %0, 0, %4, 0, 0, implicit $mode, implicit $exec89 %6:vgpr_16 = COPY %590 %7:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, %6, 0, %6, -1, 0, 0, implicit $mode, implicit $exec91 $vgpr0 = COPY %792 S_ENDPGM 0, implicit $vgpr093...94 95---96name: fold_16bit_subreg_1_clamp97tracksRegLiveness: true98registers:99body: |100 bb.0:101 liveins: $vgpr0, $vgpr1, $vgpr2102 ; CHECK-LABEL: name: fold_16bit_subreg_1_clamp103 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2104 ; CHECK-NEXT: {{ $}}105 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2106 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1107 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0108 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF109 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]110 ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec111 ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, [[V_FMA_MIXLO_F16_]].lo16, 0, [[V_FMA_MIXLO_F16_]].lo16, -1, 0, 0, implicit $mode, implicit $exec112 ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]113 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0114 %0:vgpr_32 = COPY $vgpr2115 %1:vgpr_32 = COPY $vgpr1116 %2:vgpr_32 = COPY $vgpr0117 %3:sreg_32 = IMPLICIT_DEF118 %4:vgpr_32 = COPY %3119 %5:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, %2, 8, %1, 0, %0, 0, %4, 0, 0, implicit $mode, implicit $exec120 %6:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, %5.lo16, 0, %5.lo16, -1, 0, 0, implicit $mode, implicit $exec121 $vgpr0 = COPY %6122 S_ENDPGM 0, implicit $vgpr0123...124 125---126name: fold_16bit_subreg_2_clamp127tracksRegLiveness: true128registers:129body: |130 bb.0:131 liveins: $vgpr0, $vgpr1, $vgpr2132 ; CHECK-LABEL: name: fold_16bit_subreg_2_clamp133 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2134 ; CHECK-NEXT: {{ $}}135 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2136 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1137 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0138 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF139 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]140 ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec141 ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, [[V_FMA_MIXLO_F16_]].lo16, 0, [[V_FMA_MIXLO_F16_]].lo16, -1, 0, 0, implicit $mode, implicit $exec142 ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]143 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0144 %0:vgpr_32 = COPY $vgpr2145 %1:vgpr_32 = COPY $vgpr1146 %2:vgpr_32 = COPY $vgpr0147 %3:sreg_32 = IMPLICIT_DEF148 %4:vgpr_32 = COPY %3149 %5:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, %2, 8, %1, 0, %0, 0, %4, 0, 0, implicit $mode, implicit $exec150 %6:vgpr_16 = COPY %5.lo16151 %7:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, %6, 0, %6, -1, 0, 0, implicit $mode, implicit $exec152 $vgpr0 = COPY %7153 S_ENDPGM 0, implicit $vgpr0154...155 156---157name: fold_16bit_phyreg_clamp158tracksRegLiveness: true159registers:160body: |161 bb.0:162 liveins: $vgpr0, $vgpr1, $vgpr2163 ; CHECK-LABEL: name: fold_16bit_phyreg_clamp164 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2165 ; CHECK-NEXT: {{ $}}166 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2167 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1168 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0169 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF170 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]171 ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec172 ; CHECK-NEXT: $vgpr10_lo16 = COPY [[V_FMA_MIXLO_F16_]]173 ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, $vgpr10_lo16, 0, $vgpr10_lo16, -1, 0, 0, implicit $mode, implicit $exec174 ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]175 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0176 %0:vgpr_32 = COPY $vgpr2177 %1:vgpr_32 = COPY $vgpr1178 %2:vgpr_32 = COPY $vgpr0179 %3:sreg_32 = IMPLICIT_DEF180 %4:vgpr_32 = COPY %3181 %5:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, %2, 8, %1, 0, %0, 0, %4, 0, 0, implicit $mode, implicit $exec182 $vgpr10_lo16 = COPY %5183 %6:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, $vgpr10_lo16, 0, $vgpr10_lo16, -1, 0, 0, implicit $mode, implicit $exec184 $vgpr0 = COPY %6185 S_ENDPGM 0, implicit $vgpr0186...187 188---189name: fold_16bit_undef_clamp190tracksRegLiveness: true191registers:192body: |193 bb.0:194 liveins: $vgpr0, $vgpr1, $vgpr2195 ; CHECK-LABEL: name: fold_16bit_undef_clamp196 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1200 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0201 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF202 ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, [[DEF]], 0, [[DEF]], -1, 0, 0, implicit $mode, implicit $exec203 ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]204 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0205 %0:vgpr_32 = COPY $vgpr2206 %1:vgpr_32 = COPY $vgpr1207 %2:vgpr_32 = COPY $vgpr0208 %3:vgpr_16 = IMPLICIT_DEF209 %4:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, %3, 0, %3, -1, 0, 0, implicit $mode, implicit $exec210 $vgpr0 = COPY %4211 S_ENDPGM 0, implicit $vgpr0212...213 214---215name: fold_imm16_across_reg_sequence216tracksRegLiveness: true217registers:218body: |219 bb.0:220 liveins: $vgpr0, $vgpr1, $vgpr2221 ; CHECK-LABEL: name: fold_imm16_across_reg_sequence222 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2223 ; CHECK-NEXT: {{ $}}224 ; CHECK-NEXT: [[V_MOV_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, -1, 0, implicit $exec225 ; CHECK-NEXT: [[V_MOV_B16_t16_e64_1:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, -1, 0, implicit $exec226 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_MOV_B16_t16_e64_]], %subreg.lo16, [[V_MOV_B16_t16_e64_1]], %subreg.hi16227 ; CHECK-NEXT: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F32_e64 0, -1, 0, -1, 0, 0, implicit $mode, implicit $exec228 ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F32_e64_]]229 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0230 %0:vgpr_16 = V_MOV_B16_t16_e64 0, -1, 0, implicit $exec231 %1:vgpr_16 = V_MOV_B16_t16_e64 0, -1, 0, implicit $exec232 %2:vgpr_32 = REG_SEQUENCE %0, %subreg.lo16, %1, %subreg.hi16233 %3:vgpr_32 = nofpexcept V_MAX_F32_e64 0, %2, 0, %2, 0, 0, implicit $mode, implicit $exec234 $vgpr0 = COPY %3235 S_ENDPGM 0, implicit $vgpr0236...237 238# Make sure the immediate materialized by the v_mov_b16 isn't239# incorrectly folded into the bfi as 0.240 241# FIXME: %4:vgpr_32 = COPY %3 is a direct copy from v16 to v32 and242# should probably fail the verifier243---244name: mov_v16_copy_v32_fold_b32_regression245tracksRegLiveness: true246body: |247 bb.0:248 liveins: $vgpr0, $vgpr1249 250 ; CHECK-LABEL: name: mov_v16_copy_v32_fold_b32_regression251 ; CHECK: liveins: $vgpr0, $vgpr1252 ; CHECK-NEXT: {{ $}}253 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1254 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0255 ; CHECK-NEXT: [[V_MOV_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, 15360, 0, implicit $exec256 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B16_t16_e64_]]257 ; CHECK-NEXT: [[V_BFI_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFI_B32_e64 32767, [[COPY2]], [[COPY1]], implicit $exec258 ; CHECK-NEXT: $vgpr0 = COPY [[V_BFI_B32_e64_]]259 ; CHECK-NEXT: SI_RETURN implicit $vgpr0260 %0:vgpr_32 = COPY $vgpr1261 %1:vgpr_32 = COPY $vgpr0262 %3:vgpr_16 = V_MOV_B16_t16_e64 0, 15360, 0, implicit $exec263 %4:vgpr_32 = COPY %3264 %5:vgpr_32 = V_BFI_B32_e64 32767, %4, %1, implicit $exec265 $vgpr0 = COPY %5266 SI_RETURN implicit $vgpr0267...268