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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -enable-var-scope -check-prefixes=SI %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=VI %s4 5define amdgpu_kernel void @trunc_i64_bitcast_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {6; SI-LABEL: trunc_i64_bitcast_v2i32:7; SI: ; %bb.0:8; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x99; SI-NEXT: s_mov_b32 s7, 0xf00010; SI-NEXT: s_mov_b32 s6, -111; SI-NEXT: s_mov_b32 s10, s612; SI-NEXT: s_mov_b32 s11, s713; SI-NEXT: s_waitcnt lgkmcnt(0)14; SI-NEXT: s_mov_b32 s8, s215; SI-NEXT: s_mov_b32 s9, s316; SI-NEXT: buffer_load_dword v0, off, s[8:11], 017; SI-NEXT: s_mov_b32 s4, s018; SI-NEXT: s_mov_b32 s5, s119; SI-NEXT: s_waitcnt vmcnt(0)20; SI-NEXT: buffer_store_dword v0, off, s[4:7], 021; SI-NEXT: s_endpgm22;23; VI-LABEL: trunc_i64_bitcast_v2i32:24; VI: ; %bb.0:25; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2426; VI-NEXT: s_mov_b32 s7, 0xf00027; VI-NEXT: s_mov_b32 s6, -128; VI-NEXT: s_mov_b32 s10, s629; VI-NEXT: s_mov_b32 s11, s730; VI-NEXT: s_waitcnt lgkmcnt(0)31; VI-NEXT: s_mov_b32 s8, s232; VI-NEXT: s_mov_b32 s9, s333; VI-NEXT: buffer_load_dword v0, off, s[8:11], 034; VI-NEXT: s_mov_b32 s4, s035; VI-NEXT: s_mov_b32 s5, s136; VI-NEXT: s_waitcnt vmcnt(0)37; VI-NEXT: buffer_store_dword v0, off, s[4:7], 038; VI-NEXT: s_endpgm39 %ld = load <2 x i32>, ptr addrspace(1) %in40 %bc = bitcast <2 x i32> %ld to i6441 %trunc = trunc i64 %bc to i3242 store i32 %trunc, ptr addrspace(1) %out43 ret void44}45 46define amdgpu_kernel void @trunc_i96_bitcast_v3i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {47; SI-LABEL: trunc_i96_bitcast_v3i32:48; SI: ; %bb.0:49; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x950; SI-NEXT: s_mov_b32 s7, 0xf00051; SI-NEXT: s_mov_b32 s6, -152; SI-NEXT: s_mov_b32 s10, s653; SI-NEXT: s_mov_b32 s11, s754; SI-NEXT: s_waitcnt lgkmcnt(0)55; SI-NEXT: s_mov_b32 s8, s256; SI-NEXT: s_mov_b32 s9, s357; SI-NEXT: buffer_load_dword v0, off, s[8:11], 058; SI-NEXT: s_mov_b32 s4, s059; SI-NEXT: s_mov_b32 s5, s160; SI-NEXT: s_waitcnt vmcnt(0)61; SI-NEXT: buffer_store_dword v0, off, s[4:7], 062; SI-NEXT: s_endpgm63;64; VI-LABEL: trunc_i96_bitcast_v3i32:65; VI: ; %bb.0:66; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2467; VI-NEXT: s_mov_b32 s7, 0xf00068; VI-NEXT: s_mov_b32 s6, -169; VI-NEXT: s_mov_b32 s10, s670; VI-NEXT: s_mov_b32 s11, s771; VI-NEXT: s_waitcnt lgkmcnt(0)72; VI-NEXT: s_mov_b32 s8, s273; VI-NEXT: s_mov_b32 s9, s374; VI-NEXT: buffer_load_dword v0, off, s[8:11], 075; VI-NEXT: s_mov_b32 s4, s076; VI-NEXT: s_mov_b32 s5, s177; VI-NEXT: s_waitcnt vmcnt(0)78; VI-NEXT: buffer_store_dword v0, off, s[4:7], 079; VI-NEXT: s_endpgm80 %ld = load <3 x i32>, ptr addrspace(1) %in81 %bc = bitcast <3 x i32> %ld to i9682 %trunc = trunc i96 %bc to i3283 store i32 %trunc, ptr addrspace(1) %out84 ret void85}86 87define amdgpu_kernel void @trunc_i128_bitcast_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {88; SI-LABEL: trunc_i128_bitcast_v4i32:89; SI: ; %bb.0:90; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x991; SI-NEXT: s_mov_b32 s7, 0xf00092; SI-NEXT: s_mov_b32 s6, -193; SI-NEXT: s_mov_b32 s10, s694; SI-NEXT: s_mov_b32 s11, s795; SI-NEXT: s_waitcnt lgkmcnt(0)96; SI-NEXT: s_mov_b32 s8, s297; SI-NEXT: s_mov_b32 s9, s398; SI-NEXT: buffer_load_dword v0, off, s[8:11], 099; SI-NEXT: s_mov_b32 s4, s0100; SI-NEXT: s_mov_b32 s5, s1101; SI-NEXT: s_waitcnt vmcnt(0)102; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0103; SI-NEXT: s_endpgm104;105; VI-LABEL: trunc_i128_bitcast_v4i32:106; VI: ; %bb.0:107; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24108; VI-NEXT: s_mov_b32 s7, 0xf000109; VI-NEXT: s_mov_b32 s6, -1110; VI-NEXT: s_mov_b32 s10, s6111; VI-NEXT: s_mov_b32 s11, s7112; VI-NEXT: s_waitcnt lgkmcnt(0)113; VI-NEXT: s_mov_b32 s8, s2114; VI-NEXT: s_mov_b32 s9, s3115; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0116; VI-NEXT: s_mov_b32 s4, s0117; VI-NEXT: s_mov_b32 s5, s1118; VI-NEXT: s_waitcnt vmcnt(0)119; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0120; VI-NEXT: s_endpgm121 %ld = load <4 x i32>, ptr addrspace(1) %in122 %bc = bitcast <4 x i32> %ld to i128123 %trunc = trunc i128 %bc to i32124 store i32 %trunc, ptr addrspace(1) %out125 ret void126}127 128; Don't want load width reduced in this case.129define amdgpu_kernel void @trunc_i16_bitcast_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {130; SI-LABEL: trunc_i16_bitcast_v2i16:131; SI: ; %bb.0:132; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9133; SI-NEXT: s_mov_b32 s7, 0xf000134; SI-NEXT: s_mov_b32 s6, -1135; SI-NEXT: s_mov_b32 s10, s6136; SI-NEXT: s_mov_b32 s11, s7137; SI-NEXT: s_waitcnt lgkmcnt(0)138; SI-NEXT: s_mov_b32 s8, s2139; SI-NEXT: s_mov_b32 s9, s3140; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0141; SI-NEXT: s_mov_b32 s4, s0142; SI-NEXT: s_mov_b32 s5, s1143; SI-NEXT: s_waitcnt vmcnt(0)144; SI-NEXT: buffer_store_short v0, off, s[4:7], 0145; SI-NEXT: s_endpgm146;147; VI-LABEL: trunc_i16_bitcast_v2i16:148; VI: ; %bb.0:149; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24150; VI-NEXT: s_mov_b32 s7, 0xf000151; VI-NEXT: s_mov_b32 s6, -1152; VI-NEXT: s_mov_b32 s10, s6153; VI-NEXT: s_mov_b32 s11, s7154; VI-NEXT: s_waitcnt lgkmcnt(0)155; VI-NEXT: s_mov_b32 s8, s2156; VI-NEXT: s_mov_b32 s9, s3157; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0158; VI-NEXT: s_mov_b32 s4, s0159; VI-NEXT: s_mov_b32 s5, s1160; VI-NEXT: s_waitcnt vmcnt(0)161; VI-NEXT: buffer_store_short v0, off, s[4:7], 0162; VI-NEXT: s_endpgm163 %ld = load <2 x i16>, ptr addrspace(1) %in164 %bc = bitcast <2 x i16> %ld to i32165 %trunc = trunc i32 %bc to i16166 store i16 %trunc, ptr addrspace(1) %out167 ret void168}169 170; FIXME We need to teach the dagcombiner to reduce load width for:171; t21: v2i32,ch = load<LD8[%in(addrspace=1)]> t12, t10, undef:i64172; t23: i64 = bitcast t21173; t30: i16 = truncate t23174define amdgpu_kernel void @trunc_i16_bitcast_v4i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {175; SI-LABEL: trunc_i16_bitcast_v4i16:176; SI: ; %bb.0:177; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9178; SI-NEXT: s_mov_b32 s7, 0xf000179; SI-NEXT: s_mov_b32 s6, -1180; SI-NEXT: s_mov_b32 s10, s6181; SI-NEXT: s_mov_b32 s11, s7182; SI-NEXT: s_waitcnt lgkmcnt(0)183; SI-NEXT: s_mov_b32 s8, s2184; SI-NEXT: s_mov_b32 s9, s3185; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0186; SI-NEXT: s_mov_b32 s4, s0187; SI-NEXT: s_mov_b32 s5, s1188; SI-NEXT: s_waitcnt vmcnt(0)189; SI-NEXT: buffer_store_short v0, off, s[4:7], 0190; SI-NEXT: s_endpgm191;192; VI-LABEL: trunc_i16_bitcast_v4i16:193; VI: ; %bb.0:194; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24195; VI-NEXT: s_mov_b32 s7, 0xf000196; VI-NEXT: s_mov_b32 s6, -1197; VI-NEXT: s_mov_b32 s10, s6198; VI-NEXT: s_mov_b32 s11, s7199; VI-NEXT: s_waitcnt lgkmcnt(0)200; VI-NEXT: s_mov_b32 s8, s2201; VI-NEXT: s_mov_b32 s9, s3202; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0203; VI-NEXT: s_mov_b32 s4, s0204; VI-NEXT: s_mov_b32 s5, s1205; VI-NEXT: s_waitcnt vmcnt(0)206; VI-NEXT: buffer_store_short v0, off, s[4:7], 0207; VI-NEXT: s_endpgm208 %ld = load <4 x i16>, ptr addrspace(1) %in209 %bc = bitcast <4 x i16> %ld to i64210 %trunc = trunc i64 %bc to i16211 store i16 %trunc, ptr addrspace(1) %out212 ret void213}214 215; FIXME: Consistently shrink or not here216define amdgpu_kernel void @trunc_i8_bitcast_v2i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {217; SI-LABEL: trunc_i8_bitcast_v2i8:218; SI: ; %bb.0:219; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9220; SI-NEXT: s_mov_b32 s7, 0xf000221; SI-NEXT: s_mov_b32 s6, -1222; SI-NEXT: s_mov_b32 s10, s6223; SI-NEXT: s_mov_b32 s11, s7224; SI-NEXT: s_waitcnt lgkmcnt(0)225; SI-NEXT: s_mov_b32 s8, s2226; SI-NEXT: s_mov_b32 s9, s3227; SI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0228; SI-NEXT: s_mov_b32 s4, s0229; SI-NEXT: s_mov_b32 s5, s1230; SI-NEXT: s_waitcnt vmcnt(0)231; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0232; SI-NEXT: s_endpgm233;234; VI-LABEL: trunc_i8_bitcast_v2i8:235; VI: ; %bb.0:236; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24237; VI-NEXT: s_mov_b32 s7, 0xf000238; VI-NEXT: s_mov_b32 s6, -1239; VI-NEXT: s_mov_b32 s10, s6240; VI-NEXT: s_mov_b32 s11, s7241; VI-NEXT: s_waitcnt lgkmcnt(0)242; VI-NEXT: s_mov_b32 s8, s2243; VI-NEXT: s_mov_b32 s9, s3244; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 0245; VI-NEXT: s_mov_b32 s4, s0246; VI-NEXT: s_mov_b32 s5, s1247; VI-NEXT: s_waitcnt vmcnt(0)248; VI-NEXT: buffer_store_byte v0, off, s[4:7], 0249; VI-NEXT: s_endpgm250 %ld = load <2 x i8>, ptr addrspace(1) %in251 %bc = bitcast <2 x i8> %ld to i16252 %trunc = trunc i16 %bc to i8253 store i8 %trunc, ptr addrspace(1) %out254 ret void255}256 257define amdgpu_kernel void @trunc_i32_bitcast_v4i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {258; SI-LABEL: trunc_i32_bitcast_v4i8:259; SI: ; %bb.0:260; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9261; SI-NEXT: s_mov_b32 s7, 0xf000262; SI-NEXT: s_mov_b32 s6, -1263; SI-NEXT: s_mov_b32 s10, s6264; SI-NEXT: s_mov_b32 s11, s7265; SI-NEXT: s_waitcnt lgkmcnt(0)266; SI-NEXT: s_mov_b32 s8, s2267; SI-NEXT: s_mov_b32 s9, s3268; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0269; SI-NEXT: s_mov_b32 s4, s0270; SI-NEXT: s_mov_b32 s5, s1271; SI-NEXT: s_waitcnt vmcnt(0)272; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0273; SI-NEXT: s_endpgm274;275; VI-LABEL: trunc_i32_bitcast_v4i8:276; VI: ; %bb.0:277; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24278; VI-NEXT: s_mov_b32 s7, 0xf000279; VI-NEXT: s_mov_b32 s6, -1280; VI-NEXT: s_mov_b32 s10, s6281; VI-NEXT: s_mov_b32 s11, s7282; VI-NEXT: s_waitcnt lgkmcnt(0)283; VI-NEXT: s_mov_b32 s8, s2284; VI-NEXT: s_mov_b32 s9, s3285; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0286; VI-NEXT: s_mov_b32 s4, s0287; VI-NEXT: s_mov_b32 s5, s1288; VI-NEXT: s_waitcnt vmcnt(0)289; VI-NEXT: buffer_store_byte v0, off, s[4:7], 0290; VI-NEXT: s_endpgm291 %ld = load <4 x i8>, ptr addrspace(1) %in292 %bc = bitcast <4 x i8> %ld to i32293 %trunc = trunc i32 %bc to i8294 store i8 %trunc, ptr addrspace(1) %out295 ret void296}297 298define amdgpu_kernel void @trunc_i24_bitcast_v3i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {299; SI-LABEL: trunc_i24_bitcast_v3i8:300; SI: ; %bb.0:301; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9302; SI-NEXT: s_mov_b32 s7, 0xf000303; SI-NEXT: s_mov_b32 s6, -1304; SI-NEXT: s_mov_b32 s10, s6305; SI-NEXT: s_mov_b32 s11, s7306; SI-NEXT: s_waitcnt lgkmcnt(0)307; SI-NEXT: s_mov_b32 s8, s2308; SI-NEXT: s_mov_b32 s9, s3309; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0310; SI-NEXT: s_mov_b32 s4, s0311; SI-NEXT: s_mov_b32 s5, s1312; SI-NEXT: s_waitcnt vmcnt(0)313; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0314; SI-NEXT: s_endpgm315;316; VI-LABEL: trunc_i24_bitcast_v3i8:317; VI: ; %bb.0:318; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24319; VI-NEXT: s_mov_b32 s7, 0xf000320; VI-NEXT: s_mov_b32 s6, -1321; VI-NEXT: s_mov_b32 s10, s6322; VI-NEXT: s_mov_b32 s11, s7323; VI-NEXT: s_waitcnt lgkmcnt(0)324; VI-NEXT: s_mov_b32 s8, s2325; VI-NEXT: s_mov_b32 s9, s3326; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0327; VI-NEXT: s_mov_b32 s4, s0328; VI-NEXT: s_mov_b32 s5, s1329; VI-NEXT: s_waitcnt vmcnt(0)330; VI-NEXT: buffer_store_byte v0, off, s[4:7], 0331; VI-NEXT: s_endpgm332 %ld = load <3 x i8>, ptr addrspace(1) %in333 %bc = bitcast <3 x i8> %ld to i24334 %trunc = trunc i24 %bc to i8335 store i8 %trunc, ptr addrspace(1) %out336 ret void337}338