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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti | FileCheck %s --check-prefix=SI3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=VI4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 | FileCheck %s --check-prefix=GFX95; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s --check-prefix=GFX106; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 | FileCheck %s --check-prefix=GFX117 8define amdgpu_kernel void @s_uaddo_i64_zext(ptr addrspace(1) %out, i64 %a, i64 %b) #0 {9; SI-LABEL: s_uaddo_i64_zext:10; SI: ; %bb.0:11; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x912; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd13; SI-NEXT: s_mov_b32 s7, 0xf00014; SI-NEXT: s_mov_b32 s6, -115; SI-NEXT: s_waitcnt lgkmcnt(0)16; SI-NEXT: s_mov_b32 s4, s017; SI-NEXT: s_add_u32 s2, s2, s818; SI-NEXT: s_addc_u32 s3, s3, s919; SI-NEXT: s_mov_b32 s5, s120; SI-NEXT: s_cselect_b64 s[0:1], -1, 021; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]22; SI-NEXT: v_mov_b32_e32 v1, s323; SI-NEXT: v_add_i32_e32 v0, vcc, s2, v024; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc25; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 026; SI-NEXT: s_endpgm27;28; VI-LABEL: s_uaddo_i64_zext:29; VI: ; %bb.0:30; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2431; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3432; VI-NEXT: s_waitcnt lgkmcnt(0)33; VI-NEXT: v_mov_b32_e32 v0, s034; VI-NEXT: s_add_u32 s2, s2, s435; VI-NEXT: s_addc_u32 s3, s3, s536; VI-NEXT: v_mov_b32_e32 v1, s137; VI-NEXT: s_cselect_b64 s[0:1], -1, 038; VI-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]39; VI-NEXT: v_mov_b32_e32 v3, s340; VI-NEXT: v_add_u32_e32 v2, vcc, s2, v241; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc42; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]43; VI-NEXT: s_endpgm44;45; GFX9-LABEL: s_uaddo_i64_zext:46; GFX9: ; %bb.0:47; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2448; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3449; GFX9-NEXT: v_mov_b32_e32 v2, 050; GFX9-NEXT: s_waitcnt lgkmcnt(0)51; GFX9-NEXT: s_add_u32 s4, s2, s652; GFX9-NEXT: s_addc_u32 s5, s3, s753; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 054; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[2:3]55; GFX9-NEXT: v_mov_b32_e32 v1, s556; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v057; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc58; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]59; GFX9-NEXT: s_endpgm60;61; GFX10-LABEL: s_uaddo_i64_zext:62; GFX10: ; %bb.0:63; GFX10-NEXT: s_clause 0x164; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2465; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3466; GFX10-NEXT: v_mov_b32_e32 v2, 067; GFX10-NEXT: s_waitcnt lgkmcnt(0)68; GFX10-NEXT: s_add_u32 s2, s2, s669; GFX10-NEXT: s_addc_u32 s3, s3, s770; GFX10-NEXT: s_cselect_b32 s4, -1, 071; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s472; GFX10-NEXT: v_add_co_u32 v0, s2, s2, v073; GFX10-NEXT: v_add_co_ci_u32_e64 v1, s2, s3, 0, s274; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]75; GFX10-NEXT: s_endpgm76;77; GFX11-LABEL: s_uaddo_i64_zext:78; GFX11: ; %bb.0:79; GFX11-NEXT: s_clause 0x180; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2481; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x3482; GFX11-NEXT: v_mov_b32_e32 v2, 083; GFX11-NEXT: s_waitcnt lgkmcnt(0)84; GFX11-NEXT: s_add_u32 s2, s2, s485; GFX11-NEXT: s_addc_u32 s3, s3, s586; GFX11-NEXT: s_cselect_b32 s4, -1, 087; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)88; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, s489; GFX11-NEXT: v_add_co_u32 v0, s2, s2, v090; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)91; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s292; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]93; GFX11-NEXT: s_endpgm94 %uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)95 %val = extractvalue { i64, i1 } %uadd, 096 %carry = extractvalue { i64, i1 } %uadd, 197 %ext = zext i1 %carry to i6498 %add2 = add i64 %val, %ext99 store i64 %add2, ptr addrspace(1) %out, align 8100 ret void101}102 103; FIXME: Could do scalar104 105define amdgpu_kernel void @s_uaddo_i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {106; SI-LABEL: s_uaddo_i32:107; SI: ; %bb.0:108; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9109; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd110; SI-NEXT: s_mov_b32 s7, 0xf000111; SI-NEXT: s_mov_b32 s6, -1112; SI-NEXT: s_waitcnt lgkmcnt(0)113; SI-NEXT: s_mov_b32 s4, s0114; SI-NEXT: v_mov_b32_e32 v0, s9115; SI-NEXT: s_mov_b32 s5, s1116; SI-NEXT: v_add_i32_e32 v0, vcc, s8, v0117; SI-NEXT: s_mov_b32 s0, s2118; SI-NEXT: s_mov_b32 s1, s3119; SI-NEXT: s_mov_b32 s2, s6120; SI-NEXT: s_mov_b32 s3, s7121; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc122; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0123; SI-NEXT: buffer_store_byte v1, off, s[0:3], 0124; SI-NEXT: s_endpgm125;126; VI-LABEL: s_uaddo_i32:127; VI: ; %bb.0:128; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24129; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34130; VI-NEXT: s_waitcnt lgkmcnt(0)131; VI-NEXT: v_mov_b32_e32 v0, s0132; VI-NEXT: v_mov_b32_e32 v4, s5133; VI-NEXT: v_mov_b32_e32 v1, s1134; VI-NEXT: v_add_u32_e32 v4, vcc, s4, v4135; VI-NEXT: v_mov_b32_e32 v2, s2136; VI-NEXT: v_mov_b32_e32 v3, s3137; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc138; VI-NEXT: flat_store_dword v[0:1], v4139; VI-NEXT: flat_store_byte v[2:3], v5140; VI-NEXT: s_endpgm141;142; GFX9-LABEL: s_uaddo_i32:143; GFX9: ; %bb.0:144; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34145; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24146; GFX9-NEXT: v_mov_b32_e32 v0, 0147; GFX9-NEXT: s_waitcnt lgkmcnt(0)148; GFX9-NEXT: v_mov_b32_e32 v1, s7149; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, s6, v1150; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc151; GFX9-NEXT: global_store_dword v0, v1, s[0:1]152; GFX9-NEXT: global_store_byte v0, v2, s[2:3]153; GFX9-NEXT: s_endpgm154;155; GFX10-LABEL: s_uaddo_i32:156; GFX10: ; %bb.0:157; GFX10-NEXT: s_clause 0x1158; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34159; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24160; GFX10-NEXT: v_mov_b32_e32 v0, 0161; GFX10-NEXT: s_waitcnt lgkmcnt(0)162; GFX10-NEXT: v_add_co_u32 v1, s4, s6, s7163; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4164; GFX10-NEXT: global_store_dword v0, v1, s[0:1]165; GFX10-NEXT: global_store_byte v0, v2, s[2:3]166; GFX10-NEXT: s_endpgm167;168; GFX11-LABEL: s_uaddo_i32:169; GFX11: ; %bb.0:170; GFX11-NEXT: s_clause 0x1171; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x34172; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24173; GFX11-NEXT: v_mov_b32_e32 v0, 0174; GFX11-NEXT: s_waitcnt lgkmcnt(0)175; GFX11-NEXT: v_add_co_u32 v1, s4, s6, s7176; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)177; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4178; GFX11-NEXT: s_clause 0x1179; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]180; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]181; GFX11-NEXT: s_endpgm182 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)183 %val = extractvalue { i32, i1 } %uadd, 0184 %carry = extractvalue { i32, i1 } %uadd, 1185 store i32 %val, ptr addrspace(1) %out, align 4186 store i1 %carry, ptr addrspace(1) %carryout187 ret void188}189 190define amdgpu_kernel void @v_uaddo_i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {191; SI-LABEL: v_uaddo_i32:192; SI: ; %bb.0:193; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9194; SI-NEXT: s_mov_b32 s11, 0xf000195; SI-NEXT: s_mov_b32 s10, -1196; SI-NEXT: s_mov_b32 s14, s10197; SI-NEXT: s_mov_b32 s15, s11198; SI-NEXT: s_waitcnt lgkmcnt(0)199; SI-NEXT: s_mov_b32 s12, s4200; SI-NEXT: s_mov_b32 s13, s5201; SI-NEXT: s_mov_b32 s4, s6202; SI-NEXT: s_mov_b32 s5, s7203; SI-NEXT: s_mov_b32 s6, s10204; SI-NEXT: s_mov_b32 s7, s11205; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0206; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0207; SI-NEXT: s_mov_b32 s8, s0208; SI-NEXT: s_mov_b32 s9, s1209; SI-NEXT: s_mov_b32 s4, s2210; SI-NEXT: s_mov_b32 s5, s3211; SI-NEXT: s_waitcnt vmcnt(0)212; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v1213; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc214; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0215; SI-NEXT: buffer_store_byte v1, off, s[4:7], 0216; SI-NEXT: s_endpgm217;218; VI-LABEL: v_uaddo_i32:219; VI: ; %bb.0:220; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24221; VI-NEXT: s_waitcnt lgkmcnt(0)222; VI-NEXT: v_mov_b32_e32 v0, s4223; VI-NEXT: v_mov_b32_e32 v1, s5224; VI-NEXT: v_mov_b32_e32 v2, s6225; VI-NEXT: v_mov_b32_e32 v3, s7226; VI-NEXT: flat_load_dword v4, v[0:1]227; VI-NEXT: flat_load_dword v5, v[2:3]228; VI-NEXT: v_mov_b32_e32 v0, s0229; VI-NEXT: v_mov_b32_e32 v1, s1230; VI-NEXT: v_mov_b32_e32 v2, s2231; VI-NEXT: v_mov_b32_e32 v3, s3232; VI-NEXT: s_waitcnt vmcnt(0)233; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v5234; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc235; VI-NEXT: flat_store_dword v[0:1], v4236; VI-NEXT: flat_store_byte v[2:3], v5237; VI-NEXT: s_endpgm238;239; GFX9-LABEL: v_uaddo_i32:240; GFX9: ; %bb.0:241; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24242; GFX9-NEXT: v_mov_b32_e32 v0, 0243; GFX9-NEXT: s_waitcnt lgkmcnt(0)244; GFX9-NEXT: global_load_dword v1, v0, s[12:13]245; GFX9-NEXT: global_load_dword v2, v0, s[14:15]246; GFX9-NEXT: s_waitcnt vmcnt(0)247; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, v1, v2248; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc249; GFX9-NEXT: global_store_dword v0, v1, s[8:9]250; GFX9-NEXT: global_store_byte v0, v2, s[10:11]251; GFX9-NEXT: s_endpgm252;253; GFX10-LABEL: v_uaddo_i32:254; GFX10: ; %bb.0:255; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24256; GFX10-NEXT: v_mov_b32_e32 v0, 0257; GFX10-NEXT: s_waitcnt lgkmcnt(0)258; GFX10-NEXT: s_clause 0x1259; GFX10-NEXT: global_load_dword v1, v0, s[12:13]260; GFX10-NEXT: global_load_dword v2, v0, s[14:15]261; GFX10-NEXT: s_waitcnt vmcnt(0)262; GFX10-NEXT: v_add_co_u32 v1, s0, v1, v2263; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0264; GFX10-NEXT: global_store_dword v0, v1, s[8:9]265; GFX10-NEXT: global_store_byte v0, v2, s[10:11]266; GFX10-NEXT: s_endpgm267;268; GFX11-LABEL: v_uaddo_i32:269; GFX11: ; %bb.0:270; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24271; GFX11-NEXT: v_mov_b32_e32 v0, 0272; GFX11-NEXT: s_waitcnt lgkmcnt(0)273; GFX11-NEXT: s_clause 0x1274; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]275; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]276; GFX11-NEXT: s_waitcnt vmcnt(0)277; GFX11-NEXT: v_add_co_u32 v1, s4, v1, v2278; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)279; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4280; GFX11-NEXT: s_clause 0x1281; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]282; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]283; GFX11-NEXT: s_endpgm284 %tid = call i32 @llvm.amdgcn.workitem.id.x()285 %tid.ext = sext i32 %tid to i64286 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr287 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr288 %a = load i32, ptr addrspace(1) %a.gep, align 4289 %b = load i32, ptr addrspace(1) %b.gep, align 4290 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)291 %val = extractvalue { i32, i1 } %uadd, 0292 %carry = extractvalue { i32, i1 } %uadd, 1293 store i32 %val, ptr addrspace(1) %out, align 4294 store i1 %carry, ptr addrspace(1) %carryout295 ret void296}297 298define amdgpu_kernel void @v_uaddo_i32_novcc(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {299; SI-LABEL: v_uaddo_i32_novcc:300; SI: ; %bb.0:301; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9302; SI-NEXT: s_mov_b32 s11, 0xf000303; SI-NEXT: s_mov_b32 s10, -1304; SI-NEXT: s_mov_b32 s14, s10305; SI-NEXT: s_mov_b32 s15, s11306; SI-NEXT: s_waitcnt lgkmcnt(0)307; SI-NEXT: s_mov_b32 s12, s4308; SI-NEXT: s_mov_b32 s13, s5309; SI-NEXT: s_mov_b32 s4, s6310; SI-NEXT: s_mov_b32 s5, s7311; SI-NEXT: s_mov_b32 s6, s10312; SI-NEXT: s_mov_b32 s7, s11313; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0314; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0315; SI-NEXT: s_mov_b32 s8, s0316; SI-NEXT: s_mov_b32 s9, s1317; SI-NEXT: s_mov_b32 s4, s2318; SI-NEXT: s_mov_b32 s5, s3319; SI-NEXT: s_waitcnt vmcnt(0)320; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v1321; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc322; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0323; SI-NEXT: s_waitcnt vmcnt(0)324; SI-NEXT: ;;#ASMSTART325; SI-NEXT: ;;#ASMEND326; SI-NEXT: buffer_store_byte v1, off, s[4:7], 0327; SI-NEXT: s_waitcnt vmcnt(0)328; SI-NEXT: s_endpgm329;330; VI-LABEL: v_uaddo_i32_novcc:331; VI: ; %bb.0:332; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24333; VI-NEXT: s_waitcnt lgkmcnt(0)334; VI-NEXT: v_mov_b32_e32 v0, s4335; VI-NEXT: v_mov_b32_e32 v1, s5336; VI-NEXT: v_mov_b32_e32 v2, s6337; VI-NEXT: v_mov_b32_e32 v3, s7338; VI-NEXT: flat_load_dword v4, v[0:1]339; VI-NEXT: flat_load_dword v5, v[2:3]340; VI-NEXT: v_mov_b32_e32 v0, s0341; VI-NEXT: v_mov_b32_e32 v1, s1342; VI-NEXT: v_mov_b32_e32 v2, s2343; VI-NEXT: v_mov_b32_e32 v3, s3344; VI-NEXT: s_waitcnt vmcnt(0)345; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v5346; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc347; VI-NEXT: flat_store_dword v[0:1], v4348; VI-NEXT: s_waitcnt vmcnt(0)349; VI-NEXT: ;;#ASMSTART350; VI-NEXT: ;;#ASMEND351; VI-NEXT: flat_store_byte v[2:3], v5352; VI-NEXT: s_waitcnt vmcnt(0)353; VI-NEXT: s_endpgm354;355; GFX9-LABEL: v_uaddo_i32_novcc:356; GFX9: ; %bb.0:357; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24358; GFX9-NEXT: v_mov_b32_e32 v0, 0359; GFX9-NEXT: s_waitcnt lgkmcnt(0)360; GFX9-NEXT: global_load_dword v1, v0, s[12:13]361; GFX9-NEXT: global_load_dword v2, v0, s[14:15]362; GFX9-NEXT: s_waitcnt vmcnt(0)363; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, v1, v2364; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc365; GFX9-NEXT: global_store_dword v0, v1, s[8:9]366; GFX9-NEXT: s_waitcnt vmcnt(0)367; GFX9-NEXT: ;;#ASMSTART368; GFX9-NEXT: ;;#ASMEND369; GFX9-NEXT: global_store_byte v0, v2, s[10:11]370; GFX9-NEXT: s_waitcnt vmcnt(0)371; GFX9-NEXT: s_endpgm372;373; GFX10-LABEL: v_uaddo_i32_novcc:374; GFX10: ; %bb.0:375; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24376; GFX10-NEXT: v_mov_b32_e32 v0, 0377; GFX10-NEXT: s_waitcnt lgkmcnt(0)378; GFX10-NEXT: s_clause 0x1379; GFX10-NEXT: global_load_dword v1, v0, s[12:13]380; GFX10-NEXT: global_load_dword v2, v0, s[14:15]381; GFX10-NEXT: s_waitcnt vmcnt(0)382; GFX10-NEXT: v_add_co_u32 v1, s0, v1, v2383; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0384; GFX10-NEXT: global_store_dword v0, v1, s[8:9]385; GFX10-NEXT: s_waitcnt_vscnt null, 0x0386; GFX10-NEXT: ;;#ASMSTART387; GFX10-NEXT: ;;#ASMEND388; GFX10-NEXT: global_store_byte v0, v2, s[10:11]389; GFX10-NEXT: s_waitcnt_vscnt null, 0x0390; GFX10-NEXT: s_endpgm391;392; GFX11-LABEL: v_uaddo_i32_novcc:393; GFX11: ; %bb.0:394; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24395; GFX11-NEXT: v_mov_b32_e32 v0, 0396; GFX11-NEXT: s_waitcnt lgkmcnt(0)397; GFX11-NEXT: s_clause 0x1398; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]399; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]400; GFX11-NEXT: s_waitcnt vmcnt(0)401; GFX11-NEXT: v_add_co_u32 v1, s4, v1, v2402; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)403; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4404; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] dlc405; GFX11-NEXT: s_waitcnt_vscnt null, 0x0406; GFX11-NEXT: ;;#ASMSTART407; GFX11-NEXT: ;;#ASMEND408; GFX11-NEXT: global_store_b8 v0, v2, s[2:3] dlc409; GFX11-NEXT: s_waitcnt_vscnt null, 0x0410; GFX11-NEXT: s_endpgm411 %tid = call i32 @llvm.amdgcn.workitem.id.x()412 %tid.ext = sext i32 %tid to i64413 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr414 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr415 %a = load i32, ptr addrspace(1) %a.gep, align 4416 %b = load i32, ptr addrspace(1) %b.gep, align 4417 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)418 %val = extractvalue { i32, i1 } %uadd, 0419 %carry = extractvalue { i32, i1 } %uadd, 1420 store volatile i32 %val, ptr addrspace(1) %out, align 4421 call void asm sideeffect "", "~{vcc}"() #0422 store volatile i1 %carry, ptr addrspace(1) %carryout423 ret void424}425 426define amdgpu_kernel void @s_uaddo_i64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a, i64 %b) #0 {427; SI-LABEL: s_uaddo_i64:428; SI: ; %bb.0:429; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9430; SI-NEXT: s_mov_b32 s11, 0xf000431; SI-NEXT: s_mov_b32 s10, -1432; SI-NEXT: s_waitcnt lgkmcnt(0)433; SI-NEXT: s_add_u32 s4, s4, s6434; SI-NEXT: s_addc_u32 s5, s5, s7435; SI-NEXT: s_mov_b32 s8, s0436; SI-NEXT: s_mov_b32 s9, s1437; SI-NEXT: v_mov_b32_e32 v0, s4438; SI-NEXT: v_mov_b32_e32 v1, s5439; SI-NEXT: s_cselect_b64 s[4:5], -1, 0440; SI-NEXT: s_mov_b32 s0, s2441; SI-NEXT: s_mov_b32 s1, s3442; SI-NEXT: s_mov_b32 s2, s10443; SI-NEXT: s_mov_b32 s3, s11444; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0445; SI-NEXT: s_waitcnt expcnt(0)446; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]447; SI-NEXT: buffer_store_byte v0, off, s[0:3], 0448; SI-NEXT: s_endpgm449;450; VI-LABEL: s_uaddo_i64:451; VI: ; %bb.0:452; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24453; VI-NEXT: s_waitcnt lgkmcnt(0)454; VI-NEXT: v_mov_b32_e32 v0, s0455; VI-NEXT: s_add_u32 s0, s4, s6456; VI-NEXT: v_mov_b32_e32 v1, s1457; VI-NEXT: s_addc_u32 s1, s5, s7458; VI-NEXT: v_mov_b32_e32 v4, s0459; VI-NEXT: v_mov_b32_e32 v5, s1460; VI-NEXT: s_cselect_b64 s[0:1], -1, 0461; VI-NEXT: v_mov_b32_e32 v2, s2462; VI-NEXT: v_mov_b32_e32 v3, s3463; VI-NEXT: flat_store_dwordx2 v[0:1], v[4:5]464; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]465; VI-NEXT: flat_store_byte v[2:3], v0466; VI-NEXT: s_endpgm467;468; GFX9-LABEL: s_uaddo_i64:469; GFX9: ; %bb.0:470; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24471; GFX9-NEXT: v_mov_b32_e32 v2, 0472; GFX9-NEXT: s_waitcnt lgkmcnt(0)473; GFX9-NEXT: s_add_u32 s0, s12, s14474; GFX9-NEXT: s_addc_u32 s1, s13, s15475; GFX9-NEXT: v_mov_b32_e32 v0, s0476; GFX9-NEXT: v_mov_b32_e32 v1, s1477; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0478; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[0:1]479; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]480; GFX9-NEXT: global_store_byte v2, v3, s[10:11]481; GFX9-NEXT: s_endpgm482;483; GFX10-LABEL: s_uaddo_i64:484; GFX10: ; %bb.0:485; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24486; GFX10-NEXT: v_mov_b32_e32 v2, 0487; GFX10-NEXT: s_waitcnt lgkmcnt(0)488; GFX10-NEXT: s_add_u32 s0, s12, s14489; GFX10-NEXT: s_addc_u32 s1, s13, s15490; GFX10-NEXT: v_mov_b32_e32 v0, s0491; GFX10-NEXT: s_cselect_b32 s0, -1, 0492; GFX10-NEXT: v_mov_b32_e32 v1, s1493; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0494; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]495; GFX10-NEXT: global_store_byte v2, v3, s[10:11]496; GFX10-NEXT: s_endpgm497;498; GFX11-LABEL: s_uaddo_i64:499; GFX11: ; %bb.0:500; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24501; GFX11-NEXT: s_waitcnt lgkmcnt(0)502; GFX11-NEXT: s_add_u32 s4, s4, s6503; GFX11-NEXT: s_addc_u32 s5, s5, s7504; GFX11-NEXT: v_mov_b32_e32 v0, s4505; GFX11-NEXT: s_cselect_b32 s4, -1, 0506; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s5507; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4508; GFX11-NEXT: s_clause 0x1509; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]510; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]511; GFX11-NEXT: s_endpgm512 %uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)513 %val = extractvalue { i64, i1 } %uadd, 0514 %carry = extractvalue { i64, i1 } %uadd, 1515 store i64 %val, ptr addrspace(1) %out, align 8516 store i1 %carry, ptr addrspace(1) %carryout517 ret void518}519 520define amdgpu_kernel void @v_uaddo_i64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {521; SI-LABEL: v_uaddo_i64:522; SI: ; %bb.0:523; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9524; SI-NEXT: s_mov_b32 s11, 0xf000525; SI-NEXT: s_mov_b32 s10, -1526; SI-NEXT: s_mov_b32 s14, s10527; SI-NEXT: s_mov_b32 s15, s11528; SI-NEXT: s_waitcnt lgkmcnt(0)529; SI-NEXT: s_mov_b32 s12, s4530; SI-NEXT: s_mov_b32 s13, s5531; SI-NEXT: s_mov_b32 s4, s6532; SI-NEXT: s_mov_b32 s5, s7533; SI-NEXT: s_mov_b32 s6, s10534; SI-NEXT: s_mov_b32 s7, s11535; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[12:15], 0536; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[4:7], 0537; SI-NEXT: s_mov_b32 s8, s0538; SI-NEXT: s_mov_b32 s9, s1539; SI-NEXT: s_mov_b32 s4, s2540; SI-NEXT: s_mov_b32 s5, s3541; SI-NEXT: s_waitcnt vmcnt(0)542; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v2543; SI-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc544; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0545; SI-NEXT: s_waitcnt expcnt(0)546; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc547; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0548; SI-NEXT: s_endpgm549;550; VI-LABEL: v_uaddo_i64:551; VI: ; %bb.0:552; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24553; VI-NEXT: s_waitcnt lgkmcnt(0)554; VI-NEXT: v_mov_b32_e32 v0, s4555; VI-NEXT: v_mov_b32_e32 v1, s5556; VI-NEXT: v_mov_b32_e32 v2, s6557; VI-NEXT: v_mov_b32_e32 v3, s7558; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]559; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]560; VI-NEXT: v_mov_b32_e32 v4, s0561; VI-NEXT: v_mov_b32_e32 v5, s1562; VI-NEXT: v_mov_b32_e32 v6, s2563; VI-NEXT: v_mov_b32_e32 v7, s3564; VI-NEXT: s_waitcnt vmcnt(0)565; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2566; VI-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc567; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]568; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc569; VI-NEXT: flat_store_byte v[6:7], v0570; VI-NEXT: s_endpgm571;572; GFX9-LABEL: v_uaddo_i64:573; GFX9: ; %bb.0:574; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24575; GFX9-NEXT: v_mov_b32_e32 v4, 0576; GFX9-NEXT: s_waitcnt lgkmcnt(0)577; GFX9-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]578; GFX9-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]579; GFX9-NEXT: s_waitcnt vmcnt(0)580; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2581; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc582; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]583; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc584; GFX9-NEXT: global_store_byte v4, v0, s[10:11]585; GFX9-NEXT: s_endpgm586;587; GFX10-LABEL: v_uaddo_i64:588; GFX10: ; %bb.0:589; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24590; GFX10-NEXT: v_mov_b32_e32 v4, 0591; GFX10-NEXT: s_waitcnt lgkmcnt(0)592; GFX10-NEXT: s_clause 0x1593; GFX10-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]594; GFX10-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]595; GFX10-NEXT: s_waitcnt vmcnt(0)596; GFX10-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2597; GFX10-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo598; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo599; GFX10-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]600; GFX10-NEXT: global_store_byte v4, v2, s[10:11]601; GFX10-NEXT: s_endpgm602;603; GFX11-LABEL: v_uaddo_i64:604; GFX11: ; %bb.0:605; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24606; GFX11-NEXT: v_mov_b32_e32 v4, 0607; GFX11-NEXT: s_waitcnt lgkmcnt(0)608; GFX11-NEXT: s_clause 0x1609; GFX11-NEXT: global_load_b64 v[0:1], v4, s[4:5]610; GFX11-NEXT: global_load_b64 v[2:3], v4, s[6:7]611; GFX11-NEXT: s_waitcnt vmcnt(0)612; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2613; GFX11-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo614; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo615; GFX11-NEXT: s_clause 0x1616; GFX11-NEXT: global_store_b64 v4, v[0:1], s[0:1]617; GFX11-NEXT: global_store_b8 v4, v2, s[2:3]618; GFX11-NEXT: s_endpgm619 %tid = call i32 @llvm.amdgcn.workitem.id.x()620 %tid.ext = sext i32 %tid to i64621 %a.gep = getelementptr inbounds i64, ptr addrspace(1) %a.ptr622 %b.gep = getelementptr inbounds i64, ptr addrspace(1) %b.ptr623 %a = load i64, ptr addrspace(1) %a.gep624 %b = load i64, ptr addrspace(1) %b.gep625 %uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b)626 %val = extractvalue { i64, i1 } %uadd, 0627 %carry = extractvalue { i64, i1 } %uadd, 1628 store i64 %val, ptr addrspace(1) %out629 store i1 %carry, ptr addrspace(1) %carryout630 ret void631}632 633define amdgpu_kernel void @v_uaddo_i16(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {634; SI-LABEL: v_uaddo_i16:635; SI: ; %bb.0:636; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9637; SI-NEXT: s_mov_b32 s11, 0xf000638; SI-NEXT: s_mov_b32 s10, -1639; SI-NEXT: s_mov_b32 s14, s10640; SI-NEXT: s_mov_b32 s15, s11641; SI-NEXT: s_waitcnt lgkmcnt(0)642; SI-NEXT: s_mov_b32 s12, s4643; SI-NEXT: s_mov_b32 s13, s5644; SI-NEXT: s_mov_b32 s4, s6645; SI-NEXT: s_mov_b32 s5, s7646; SI-NEXT: s_mov_b32 s6, s10647; SI-NEXT: s_mov_b32 s7, s11648; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0649; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0650; SI-NEXT: s_mov_b32 s8, s0651; SI-NEXT: s_mov_b32 s9, s1652; SI-NEXT: s_mov_b32 s4, s2653; SI-NEXT: s_mov_b32 s5, s3654; SI-NEXT: s_waitcnt vmcnt(0)655; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v1656; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0657; SI-NEXT: v_cmp_ne_u32_e32 vcc, v1, v0658; SI-NEXT: buffer_store_short v0, off, s[8:11], 0659; SI-NEXT: s_waitcnt expcnt(0)660; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc661; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0662; SI-NEXT: s_endpgm663;664; VI-LABEL: v_uaddo_i16:665; VI: ; %bb.0:666; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24667; VI-NEXT: s_waitcnt lgkmcnt(0)668; VI-NEXT: v_mov_b32_e32 v0, s4669; VI-NEXT: v_mov_b32_e32 v1, s5670; VI-NEXT: v_mov_b32_e32 v2, s6671; VI-NEXT: v_mov_b32_e32 v3, s7672; VI-NEXT: flat_load_ushort v4, v[0:1]673; VI-NEXT: flat_load_ushort v5, v[2:3]674; VI-NEXT: v_mov_b32_e32 v0, s0675; VI-NEXT: v_mov_b32_e32 v1, s1676; VI-NEXT: v_mov_b32_e32 v2, s2677; VI-NEXT: v_mov_b32_e32 v3, s3678; VI-NEXT: s_waitcnt vmcnt(0)679; VI-NEXT: v_add_u32_e32 v5, vcc, v4, v5680; VI-NEXT: v_and_b32_e32 v4, 0xffff, v4681; VI-NEXT: v_and_b32_e32 v6, 0xffff, v5682; VI-NEXT: v_cmp_lt_u32_e32 vcc, v6, v4683; VI-NEXT: flat_store_short v[0:1], v5684; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc685; VI-NEXT: flat_store_byte v[2:3], v0686; VI-NEXT: s_endpgm687;688; GFX9-LABEL: v_uaddo_i16:689; GFX9: ; %bb.0:690; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24691; GFX9-NEXT: v_mov_b32_e32 v0, 0692; GFX9-NEXT: s_waitcnt lgkmcnt(0)693; GFX9-NEXT: global_load_ushort v1, v0, s[12:13]694; GFX9-NEXT: global_load_ushort v2, v0, s[14:15]695; GFX9-NEXT: s_waitcnt vmcnt(0)696; GFX9-NEXT: v_add_u32_e32 v2, v1, v2697; GFX9-NEXT: v_cmp_lt_u32_sdwa s[0:1], v2, v1 src0_sel:WORD_0 src1_sel:WORD_0698; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]699; GFX9-NEXT: global_store_short v0, v2, s[8:9]700; GFX9-NEXT: global_store_byte v0, v1, s[10:11]701; GFX9-NEXT: s_endpgm702;703; GFX10-LABEL: v_uaddo_i16:704; GFX10: ; %bb.0:705; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24706; GFX10-NEXT: v_mov_b32_e32 v0, 0707; GFX10-NEXT: s_waitcnt lgkmcnt(0)708; GFX10-NEXT: s_clause 0x1709; GFX10-NEXT: global_load_ushort v1, v0, s[12:13]710; GFX10-NEXT: global_load_ushort v2, v0, s[14:15]711; GFX10-NEXT: s_waitcnt vmcnt(0)712; GFX10-NEXT: v_add_nc_u32_e32 v2, v1, v2713; GFX10-NEXT: v_cmp_lt_u32_sdwa s0, v2, v1 src0_sel:WORD_0 src1_sel:WORD_0714; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 1, s0715; GFX10-NEXT: global_store_short v0, v2, s[8:9]716; GFX10-NEXT: global_store_byte v0, v1, s[10:11]717; GFX10-NEXT: s_endpgm718;719; GFX11-LABEL: v_uaddo_i16:720; GFX11: ; %bb.0:721; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24722; GFX11-NEXT: v_mov_b32_e32 v0, 0723; GFX11-NEXT: s_waitcnt lgkmcnt(0)724; GFX11-NEXT: s_clause 0x1725; GFX11-NEXT: global_load_d16_b16 v1, v0, s[4:5]726; GFX11-NEXT: global_load_u16 v2, v0, s[6:7]727; GFX11-NEXT: s_waitcnt vmcnt(0)728; GFX11-NEXT: v_add_nc_u32_e32 v2, v1, v2729; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1730; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)731; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v2732; GFX11-NEXT: v_cmp_lt_u32_e32 vcc_lo, v3, v1733; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo734; GFX11-NEXT: s_clause 0x1735; GFX11-NEXT: global_store_b16 v0, v2, s[0:1]736; GFX11-NEXT: global_store_b8 v0, v1, s[2:3]737; GFX11-NEXT: s_endpgm738 %tid = call i32 @llvm.amdgcn.workitem.id.x()739 %tid.ext = sext i32 %tid to i64740 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr741 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr742 %a = load i16, ptr addrspace(1) %a.gep743 %b = load i16, ptr addrspace(1) %b.gep744 %uadd = call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 %a, i16 %b)745 %val = extractvalue { i16, i1 } %uadd, 0746 %carry = extractvalue { i16, i1 } %uadd, 1747 store i16 %val, ptr addrspace(1) %out748 store i1 %carry, ptr addrspace(1) %carryout749 ret void750}751 752define amdgpu_kernel void @v_uaddo_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {753; SI-LABEL: v_uaddo_v2i32:754; SI: ; %bb.0:755; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9756; SI-NEXT: s_mov_b32 s11, 0xf000757; SI-NEXT: s_mov_b32 s10, -1758; SI-NEXT: s_mov_b32 s14, s10759; SI-NEXT: s_mov_b32 s15, s11760; SI-NEXT: s_waitcnt lgkmcnt(0)761; SI-NEXT: s_mov_b32 s12, s4762; SI-NEXT: s_mov_b32 s13, s5763; SI-NEXT: s_mov_b32 s4, s6764; SI-NEXT: s_mov_b32 s5, s7765; SI-NEXT: s_mov_b32 s6, s10766; SI-NEXT: s_mov_b32 s7, s11767; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[12:15], 0768; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[4:7], 0769; SI-NEXT: s_mov_b32 s8, s0770; SI-NEXT: s_mov_b32 s9, s1771; SI-NEXT: s_mov_b32 s4, s2772; SI-NEXT: s_mov_b32 s5, s3773; SI-NEXT: s_waitcnt vmcnt(0)774; SI-NEXT: v_add_i32_e32 v1, vcc, v1, v3775; SI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc776; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v2777; SI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc778; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0779; SI-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0780; SI-NEXT: s_endpgm781;782; VI-LABEL: v_uaddo_v2i32:783; VI: ; %bb.0:784; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24785; VI-NEXT: s_waitcnt lgkmcnt(0)786; VI-NEXT: v_mov_b32_e32 v0, s4787; VI-NEXT: v_mov_b32_e32 v1, s5788; VI-NEXT: v_mov_b32_e32 v2, s6789; VI-NEXT: v_mov_b32_e32 v3, s7790; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]791; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]792; VI-NEXT: v_mov_b32_e32 v4, s0793; VI-NEXT: v_mov_b32_e32 v5, s1794; VI-NEXT: v_mov_b32_e32 v6, s2795; VI-NEXT: v_mov_b32_e32 v7, s3796; VI-NEXT: s_waitcnt vmcnt(0)797; VI-NEXT: v_add_u32_e32 v1, vcc, v1, v3798; VI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc799; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2800; VI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc801; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]802; VI-NEXT: flat_store_dwordx2 v[6:7], v[2:3]803; VI-NEXT: s_endpgm804;805; GFX9-LABEL: v_uaddo_v2i32:806; GFX9: ; %bb.0:807; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24808; GFX9-NEXT: v_mov_b32_e32 v4, 0809; GFX9-NEXT: s_waitcnt lgkmcnt(0)810; GFX9-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]811; GFX9-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]812; GFX9-NEXT: s_waitcnt vmcnt(0)813; GFX9-NEXT: v_add_co_u32_e32 v1, vcc, v1, v3814; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc815; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2816; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc817; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]818; GFX9-NEXT: global_store_dwordx2 v4, v[2:3], s[10:11]819; GFX9-NEXT: s_endpgm820;821; GFX10-LABEL: v_uaddo_v2i32:822; GFX10: ; %bb.0:823; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24824; GFX10-NEXT: v_mov_b32_e32 v4, 0825; GFX10-NEXT: s_waitcnt lgkmcnt(0)826; GFX10-NEXT: s_clause 0x1827; GFX10-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]828; GFX10-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]829; GFX10-NEXT: s_waitcnt vmcnt(0)830; GFX10-NEXT: v_add_co_u32 v1, s0, v1, v3831; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0832; GFX10-NEXT: v_add_co_u32 v0, s0, v0, v2833; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0834; GFX10-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]835; GFX10-NEXT: global_store_dwordx2 v4, v[2:3], s[10:11]836; GFX10-NEXT: s_endpgm837;838; GFX11-LABEL: v_uaddo_v2i32:839; GFX11: ; %bb.0:840; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24841; GFX11-NEXT: v_mov_b32_e32 v4, 0842; GFX11-NEXT: s_waitcnt lgkmcnt(0)843; GFX11-NEXT: s_clause 0x1844; GFX11-NEXT: global_load_b64 v[0:1], v4, s[4:5]845; GFX11-NEXT: global_load_b64 v[2:3], v4, s[6:7]846; GFX11-NEXT: s_waitcnt vmcnt(0)847; GFX11-NEXT: v_add_co_u32 v1, s4, v1, v3848; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)849; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4850; GFX11-NEXT: v_add_co_u32 v0, s4, v0, v2851; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4852; GFX11-NEXT: s_clause 0x1853; GFX11-NEXT: global_store_b64 v4, v[0:1], s[0:1]854; GFX11-NEXT: global_store_b64 v4, v[2:3], s[2:3]855; GFX11-NEXT: s_endpgm856 %a = load <2 x i32>, ptr addrspace(1) %aptr, align 4857 %b = load <2 x i32>, ptr addrspace(1) %bptr, align 4858 %sadd = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> %b) nounwind859 %val = extractvalue { <2 x i32>, <2 x i1> } %sadd, 0860 %carry = extractvalue { <2 x i32>, <2 x i1> } %sadd, 1861 store <2 x i32> %val, ptr addrspace(1) %out, align 4862 %carry.ext = zext <2 x i1> %carry to <2 x i32>863 store <2 x i32> %carry.ext, ptr addrspace(1) %carryout864 ret void865}866 867define amdgpu_kernel void @s_uaddo_clamp_bit(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {868; SI-LABEL: s_uaddo_clamp_bit:869; SI: ; %bb.0: ; %entry870; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd871; SI-NEXT: s_waitcnt lgkmcnt(0)872; SI-NEXT: v_mov_b32_e32 v0, s1873; SI-NEXT: s_cmp_eq_u32 s0, s1874; SI-NEXT: v_add_i32_e32 v0, vcc, s0, v0875; SI-NEXT: s_mov_b64 s[0:1], 0876; SI-NEXT: s_cbranch_scc1 .LBB8_2877; SI-NEXT: ; %bb.1: ; %if878; SI-NEXT: s_xor_b64 s[0:1], vcc, -1879; SI-NEXT: .LBB8_2: ; %exit880; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9881; SI-NEXT: s_mov_b32 s11, 0xf000882; SI-NEXT: s_mov_b32 s10, -1883; SI-NEXT: s_waitcnt lgkmcnt(0)884; SI-NEXT: s_mov_b32 s8, s4885; SI-NEXT: s_mov_b32 s9, s5886; SI-NEXT: s_mov_b32 s4, s6887; SI-NEXT: s_mov_b32 s5, s7888; SI-NEXT: s_mov_b32 s6, s10889; SI-NEXT: s_mov_b32 s7, s11890; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0891; SI-NEXT: s_waitcnt expcnt(0)892; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]893; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0894; SI-NEXT: s_endpgm895;896; VI-LABEL: s_uaddo_clamp_bit:897; VI: ; %bb.0: ; %entry898; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34899; VI-NEXT: s_waitcnt lgkmcnt(0)900; VI-NEXT: v_mov_b32_e32 v0, s1901; VI-NEXT: s_cmp_eq_u32 s0, s1902; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0903; VI-NEXT: s_mov_b64 s[0:1], 0904; VI-NEXT: s_cbranch_scc1 .LBB8_2905; VI-NEXT: ; %bb.1: ; %if906; VI-NEXT: s_xor_b64 s[0:1], vcc, -1907; VI-NEXT: .LBB8_2: ; %exit908; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24909; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[0:1]910; VI-NEXT: s_waitcnt lgkmcnt(0)911; VI-NEXT: v_mov_b32_e32 v1, s4912; VI-NEXT: v_mov_b32_e32 v2, s5913; VI-NEXT: v_mov_b32_e32 v3, s6914; VI-NEXT: v_mov_b32_e32 v4, s7915; VI-NEXT: flat_store_dword v[1:2], v0916; VI-NEXT: flat_store_byte v[3:4], v5917; VI-NEXT: s_endpgm918;919; GFX9-LABEL: s_uaddo_clamp_bit:920; GFX9: ; %bb.0: ; %entry921; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34922; GFX9-NEXT: s_waitcnt lgkmcnt(0)923; GFX9-NEXT: v_mov_b32_e32 v0, s1924; GFX9-NEXT: s_cmp_eq_u32 s0, s1925; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v0926; GFX9-NEXT: s_mov_b64 s[0:1], 0927; GFX9-NEXT: s_cbranch_scc1 .LBB8_2928; GFX9-NEXT: ; %bb.1: ; %if929; GFX9-NEXT: s_xor_b64 s[0:1], vcc, -1930; GFX9-NEXT: .LBB8_2: ; %exit931; GFX9-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24932; GFX9-NEXT: v_mov_b32_e32 v1, 0933; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]934; GFX9-NEXT: s_waitcnt lgkmcnt(0)935; GFX9-NEXT: global_store_dword v1, v0, s[8:9]936; GFX9-NEXT: global_store_byte v1, v2, s[10:11]937; GFX9-NEXT: s_endpgm938;939; GFX10-LABEL: s_uaddo_clamp_bit:940; GFX10: ; %bb.0: ; %entry941; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x34942; GFX10-NEXT: s_mov_b32 s0, 0943; GFX10-NEXT: s_waitcnt lgkmcnt(0)944; GFX10-NEXT: v_add_co_u32 v0, s1, s2, s3945; GFX10-NEXT: s_cmp_eq_u32 s2, s3946; GFX10-NEXT: s_cbranch_scc1 .LBB8_2947; GFX10-NEXT: ; %bb.1: ; %if948; GFX10-NEXT: s_xor_b32 s0, s1, -1949; GFX10-NEXT: .LBB8_2: ; %exit950; GFX10-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24951; GFX10-NEXT: v_mov_b32_e32 v1, 0952; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0953; GFX10-NEXT: s_waitcnt lgkmcnt(0)954; GFX10-NEXT: global_store_dword v1, v0, s[8:9]955; GFX10-NEXT: global_store_byte v1, v2, s[10:11]956; GFX10-NEXT: s_endpgm957;958; GFX11-LABEL: s_uaddo_clamp_bit:959; GFX11: ; %bb.0: ; %entry960; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x34961; GFX11-NEXT: s_mov_b32 s0, 0962; GFX11-NEXT: s_waitcnt lgkmcnt(0)963; GFX11-NEXT: v_add_co_u32 v0, s1, s2, s3964; GFX11-NEXT: s_cmp_eq_u32 s2, s3965; GFX11-NEXT: s_cbranch_scc1 .LBB8_2966; GFX11-NEXT: ; %bb.1: ; %if967; GFX11-NEXT: s_xor_b32 s0, s1, -1968; GFX11-NEXT: .LBB8_2: ; %exit969; GFX11-NEXT: s_load_b128 s[4:7], s[4:5], 0x24970; GFX11-NEXT: v_mov_b32_e32 v1, 0971; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0972; GFX11-NEXT: s_waitcnt lgkmcnt(0)973; GFX11-NEXT: s_clause 0x1974; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]975; GFX11-NEXT: global_store_b8 v1, v2, s[6:7]976; GFX11-NEXT: s_endpgm977entry:978 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)979 %val = extractvalue { i32, i1 } %uadd, 0980 %carry = extractvalue { i32, i1 } %uadd, 1981 %c2 = icmp eq i1 %carry, false982 %cc = icmp eq i32 %a, %b983 br i1 %cc, label %exit, label %if984 985if:986 br label %exit987 988exit:989 %cout = phi i1 [false, %entry], [%c2, %if]990 store i32 %val, ptr addrspace(1) %out, align 4991 store i1 %cout, ptr addrspace(1) %carryout992 ret void993}994 995define amdgpu_kernel void @v_uaddo_clamp_bit(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {996; SI-LABEL: v_uaddo_clamp_bit:997; SI: ; %bb.0: ; %entry998; SI-NEXT: s_load_dwordx8 s[4:11], s[4:5], 0x9999; SI-NEXT: s_mov_b32 s3, 0xf0001000; SI-NEXT: s_mov_b32 s2, -11001; SI-NEXT: s_waitcnt lgkmcnt(0)1002; SI-NEXT: s_mov_b32 s0, s81003; SI-NEXT: s_mov_b32 s1, s91004; SI-NEXT: s_mov_b32 s8, s101005; SI-NEXT: s_mov_b32 s9, s111006; SI-NEXT: s_mov_b32 s10, s21007; SI-NEXT: s_mov_b32 s11, s31008; SI-NEXT: buffer_load_dword v1, off, s[0:3], 01009; SI-NEXT: buffer_load_dword v2, off, s[8:11], 01010; SI-NEXT: s_mov_b64 s[8:9], 01011; SI-NEXT: s_waitcnt vmcnt(0)1012; SI-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21013; SI-NEXT: v_add_i32_e64 v0, s[0:1], v1, v21014; SI-NEXT: s_cbranch_vccnz .LBB9_21015; SI-NEXT: ; %bb.1: ; %if1016; SI-NEXT: s_xor_b64 s[8:9], s[0:1], -11017; SI-NEXT: .LBB9_2: ; %exit1018; SI-NEXT: s_mov_b32 s0, s41019; SI-NEXT: s_mov_b32 s1, s51020; SI-NEXT: s_mov_b32 s4, s61021; SI-NEXT: s_mov_b32 s5, s71022; SI-NEXT: s_mov_b32 s6, s21023; SI-NEXT: s_mov_b32 s7, s31024; SI-NEXT: buffer_store_dword v0, off, s[0:3], 01025; SI-NEXT: s_waitcnt expcnt(0)1026; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[8:9]1027; SI-NEXT: buffer_store_byte v0, off, s[4:7], 01028; SI-NEXT: s_endpgm1029;1030; VI-LABEL: v_uaddo_clamp_bit:1031; VI: ; %bb.0: ; %entry1032; VI-NEXT: s_load_dwordx8 s[4:11], s[4:5], 0x241033; VI-NEXT: s_mov_b64 s[2:3], 01034; VI-NEXT: s_waitcnt lgkmcnt(0)1035; VI-NEXT: v_mov_b32_e32 v0, s81036; VI-NEXT: v_mov_b32_e32 v1, s91037; VI-NEXT: v_mov_b32_e32 v2, s101038; VI-NEXT: v_mov_b32_e32 v3, s111039; VI-NEXT: flat_load_dword v1, v[0:1]1040; VI-NEXT: flat_load_dword v2, v[2:3]1041; VI-NEXT: s_waitcnt vmcnt(0)1042; VI-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21043; VI-NEXT: v_add_u32_e64 v0, s[0:1], v1, v21044; VI-NEXT: s_cbranch_vccnz .LBB9_21045; VI-NEXT: ; %bb.1: ; %if1046; VI-NEXT: s_xor_b64 s[2:3], s[0:1], -11047; VI-NEXT: .LBB9_2: ; %exit1048; VI-NEXT: v_mov_b32_e32 v1, s41049; VI-NEXT: v_mov_b32_e32 v2, s51050; VI-NEXT: v_mov_b32_e32 v3, s61051; VI-NEXT: v_mov_b32_e32 v4, s71052; VI-NEXT: flat_store_dword v[1:2], v01053; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[2:3]1054; VI-NEXT: flat_store_byte v[3:4], v01055; VI-NEXT: s_endpgm1056;1057; GFX9-LABEL: v_uaddo_clamp_bit:1058; GFX9: ; %bb.0: ; %entry1059; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241060; GFX9-NEXT: v_mov_b32_e32 v0, 01061; GFX9-NEXT: s_mov_b64 s[2:3], 01062; GFX9-NEXT: s_waitcnt lgkmcnt(0)1063; GFX9-NEXT: global_load_dword v2, v0, s[12:13]1064; GFX9-NEXT: global_load_dword v3, v0, s[14:15]1065; GFX9-NEXT: s_waitcnt vmcnt(0)1066; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31067; GFX9-NEXT: v_add_co_u32_e64 v1, s[0:1], v2, v31068; GFX9-NEXT: s_cbranch_vccnz .LBB9_21069; GFX9-NEXT: ; %bb.1: ; %if1070; GFX9-NEXT: s_xor_b64 s[2:3], s[0:1], -11071; GFX9-NEXT: .LBB9_2: ; %exit1072; GFX9-NEXT: global_store_dword v0, v1, s[8:9]1073; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[2:3]1074; GFX9-NEXT: global_store_byte v0, v1, s[10:11]1075; GFX9-NEXT: s_endpgm1076;1077; GFX10-LABEL: v_uaddo_clamp_bit:1078; GFX10: ; %bb.0: ; %entry1079; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241080; GFX10-NEXT: v_mov_b32_e32 v0, 01081; GFX10-NEXT: s_mov_b32 s0, 01082; GFX10-NEXT: s_waitcnt lgkmcnt(0)1083; GFX10-NEXT: s_clause 0x11084; GFX10-NEXT: global_load_dword v1, v0, s[12:13]1085; GFX10-NEXT: global_load_dword v2, v0, s[14:15]1086; GFX10-NEXT: s_waitcnt vmcnt(0)1087; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21088; GFX10-NEXT: v_add_co_u32 v1, s1, v1, v21089; GFX10-NEXT: s_cbranch_vccnz .LBB9_21090; GFX10-NEXT: ; %bb.1: ; %if1091; GFX10-NEXT: s_xor_b32 s0, s1, -11092; GFX10-NEXT: .LBB9_2: ; %exit1093; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s01094; GFX10-NEXT: global_store_dword v0, v1, s[8:9]1095; GFX10-NEXT: global_store_byte v0, v2, s[10:11]1096; GFX10-NEXT: s_endpgm1097;1098; GFX11-LABEL: v_uaddo_clamp_bit:1099; GFX11: ; %bb.0: ; %entry1100; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x241101; GFX11-NEXT: v_mov_b32_e32 v0, 01102; GFX11-NEXT: s_waitcnt lgkmcnt(0)1103; GFX11-NEXT: s_clause 0x11104; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]1105; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]1106; GFX11-NEXT: s_mov_b32 s4, 01107; GFX11-NEXT: s_waitcnt vmcnt(0)1108; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21109; GFX11-NEXT: v_add_co_u32 v1, s5, v1, v21110; GFX11-NEXT: s_cbranch_vccnz .LBB9_21111; GFX11-NEXT: ; %bb.1: ; %if1112; GFX11-NEXT: s_xor_b32 s4, s5, -11113; GFX11-NEXT: .LBB9_2: ; %exit1114; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1115; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41116; GFX11-NEXT: s_clause 0x11117; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]1118; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]1119; GFX11-NEXT: s_endpgm1120entry:1121 %tid = call i32 @llvm.amdgcn.workitem.id.x()1122 %tid.ext = sext i32 %tid to i641123 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr1124 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr1125 %a = load i32, ptr addrspace(1) %a.gep1126 %b = load i32, ptr addrspace(1) %b.gep1127 %uadd = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %a, i32 %b)1128 %val = extractvalue { i32, i1 } %uadd, 01129 %carry = extractvalue { i32, i1 } %uadd, 11130 %c2 = icmp eq i1 %carry, false1131 %cc = icmp eq i32 %a, %b1132 br i1 %cc, label %exit, label %if1133 1134if:1135 br label %exit1136 1137exit:1138 %cout = phi i1 [false, %entry], [%c2, %if]1139 store i32 %val, ptr addrspace(1) %out, align 41140 store i1 %cout, ptr addrspace(1) %carryout1141 ret void1142}1143 1144define amdgpu_cs void @sv_uaddo_i128(ptr addrspace(1) %out, i128 inreg %a, i128 %b) {1145; SI-LABEL: sv_uaddo_i128:1146; SI: ; %bb.0:1147; SI-NEXT: v_add_i32_e32 v2, vcc, s0, v21148; SI-NEXT: v_mov_b32_e32 v6, s11149; SI-NEXT: v_addc_u32_e32 v3, vcc, v6, v3, vcc1150; SI-NEXT: v_mov_b32_e32 v6, s21151; SI-NEXT: v_addc_u32_e32 v4, vcc, v6, v4, vcc1152; SI-NEXT: v_mov_b32_e32 v6, s31153; SI-NEXT: v_addc_u32_e32 v5, vcc, v6, v5, vcc1154; SI-NEXT: v_cmp_gt_u64_e32 vcc, s[0:1], v[2:3]1155; SI-NEXT: s_mov_b32 s6, 01156; SI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1157; SI-NEXT: v_cmp_gt_u64_e32 vcc, s[2:3], v[4:5]1158; SI-NEXT: s_mov_b32 s7, 0xf0001159; SI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc1160; SI-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[4:5]1161; SI-NEXT: s_mov_b32 s4, s61162; SI-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1163; SI-NEXT: s_mov_b32 s5, s61164; SI-NEXT: v_and_b32_e32 v2, 1, v21165; SI-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr641166; SI-NEXT: s_endpgm1167;1168; VI-LABEL: sv_uaddo_i128:1169; VI: ; %bb.0:1170; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v21171; VI-NEXT: v_mov_b32_e32 v6, s11172; VI-NEXT: v_addc_u32_e32 v3, vcc, v6, v3, vcc1173; VI-NEXT: v_mov_b32_e32 v6, s21174; VI-NEXT: v_addc_u32_e32 v4, vcc, v6, v4, vcc1175; VI-NEXT: v_mov_b32_e32 v6, s31176; VI-NEXT: v_addc_u32_e32 v5, vcc, v6, v5, vcc1177; VI-NEXT: v_cmp_gt_u64_e32 vcc, s[0:1], v[2:3]1178; VI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1179; VI-NEXT: v_cmp_gt_u64_e32 vcc, s[2:3], v[4:5]1180; VI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc1181; VI-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[4:5]1182; VI-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1183; VI-NEXT: v_and_b32_e32 v2, 1, v21184; VI-NEXT: flat_store_dword v[0:1], v21185; VI-NEXT: s_endpgm1186;1187; GFX9-LABEL: sv_uaddo_i128:1188; GFX9: ; %bb.0:1189; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v21190; GFX9-NEXT: v_mov_b32_e32 v6, s11191; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v6, v3, vcc1192; GFX9-NEXT: v_mov_b32_e32 v6, s21193; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, v6, v4, vcc1194; GFX9-NEXT: v_mov_b32_e32 v6, s31195; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, v6, v5, vcc1196; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, s[0:1], v[2:3]1197; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1198; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, s[2:3], v[4:5]1199; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc1200; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[4:5]1201; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1202; GFX9-NEXT: v_and_b32_e32 v2, 1, v21203; GFX9-NEXT: global_store_dword v[0:1], v2, off1204; GFX9-NEXT: s_endpgm1205;1206; GFX10-LABEL: sv_uaddo_i128:1207; GFX10: ; %bb.0:1208; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, s0, v21209; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo1210; GFX10-NEXT: v_add_co_ci_u32_e32 v4, vcc_lo, s2, v4, vcc_lo1211; GFX10-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo1212; GFX10-NEXT: v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[2:3]1213; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1214; GFX10-NEXT: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[4:5]1215; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo1216; GFX10-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[4:5]1217; GFX10-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc_lo1218; GFX10-NEXT: v_and_b32_e32 v2, 1, v21219; GFX10-NEXT: global_store_dword v[0:1], v2, off1220; GFX10-NEXT: s_endpgm1221;1222; GFX11-LABEL: sv_uaddo_i128:1223; GFX11: ; %bb.0:1224; GFX11-NEXT: v_add_co_u32 v2, vcc_lo, s0, v21225; GFX11-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo1226; GFX11-NEXT: v_add_co_ci_u32_e32 v4, vcc_lo, s2, v4, vcc_lo1227; GFX11-NEXT: v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo1228; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1229; GFX11-NEXT: v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[4:5]1230; GFX11-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc_lo1231; GFX11-NEXT: v_cmp_gt_u64_e32 vcc_lo, s[0:1], v[2:3]1232; GFX11-NEXT: v_mov_b16_e32 v2.l, v6.l1233; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo1234; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[2:3], v[4:5]1235; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1236; GFX11-NEXT: v_cndmask_b16 v2.l, v2.l, v3.l, vcc_lo1237; GFX11-NEXT: v_and_b32_e32 v2, 1, v21238; GFX11-NEXT: global_store_b32 v[0:1], v2, off1239; GFX11-NEXT: s_endpgm1240 %uadd = call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 %a, i128 %b)1241 %carry = extractvalue { i128, i1 } %uadd, 11242 %carry.ext = zext i1 %carry to i321243 store i32 %carry.ext, ptr addrspace(1) %out1244 ret void1245}1246 1247declare i32 @llvm.amdgcn.workitem.id.x() #11248declare { i16, i1 } @llvm.uadd.with.overflow.i16(i16, i16) #11249declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #11250declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #11251declare { i128, i1 } @llvm.uadd.with.overflow.i128(i128, i128) #11252declare { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32>, <2 x i32>) nounwind readnone1253 1254 1255attributes #0 = { nounwind }1256attributes #1 = { nounwind readnone }1257