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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=tahiti < %s | FileCheck --check-prefix=GFX6 %s3; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=fiji < %s | FileCheck --check-prefix=GFX8 %s4; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck --check-prefix=GFX9 %s5; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck --check-prefix=GFX10 %s6; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-TRUE16 %s7; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-FAKE16 %s8 9define i8 @v_uaddsat_i8(i8 %lhs, i8 %rhs) {10; GFX6-LABEL: v_uaddsat_i8:11; GFX6: ; %bb.0:12; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; GFX6-NEXT: v_and_b32_e32 v1, 0xff, v114; GFX6-NEXT: v_and_b32_e32 v0, 0xff, v015; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v116; GFX6-NEXT: v_min_u32_e32 v0, 0xff, v017; GFX6-NEXT: s_setpc_b64 s[30:31]18;19; GFX8-LABEL: v_uaddsat_i8:20; GFX8: ; %bb.0:21; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)22; GFX8-NEXT: v_add_u16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_023; GFX8-NEXT: v_min_u16_e32 v0, 0xff, v024; GFX8-NEXT: s_setpc_b64 s[30:31]25;26; GFX9-LABEL: v_uaddsat_i8:27; GFX9: ; %bb.0:28; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)29; GFX9-NEXT: v_add_u16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_030; GFX9-NEXT: v_min_u16_e32 v0, 0xff, v031; GFX9-NEXT: s_setpc_b64 s[30:31]32;33; GFX10-LABEL: v_uaddsat_i8:34; GFX10: ; %bb.0:35; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)36; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v137; GFX10-NEXT: v_and_b32_e32 v0, 0xff, v038; GFX10-NEXT: v_add_nc_u16 v0, v0, v139; GFX10-NEXT: v_min_u16 v0, 0xff, v040; GFX10-NEXT: s_setpc_b64 s[30:31]41;42; GFX11-TRUE16-LABEL: v_uaddsat_i8:43; GFX11-TRUE16: ; %bb.0:44; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)45; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v1.l46; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l47; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)48; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v0.l, v0.h49; GFX11-TRUE16-NEXT: v_min_u16 v0.l, 0xff, v0.l50; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]51;52; GFX11-FAKE16-LABEL: v_uaddsat_i8:53; GFX11-FAKE16: ; %bb.0:54; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)55; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v156; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v057; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)58; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v0, v159; GFX11-FAKE16-NEXT: v_min_u16 v0, 0xff, v060; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]61 %result = call i8 @llvm.uadd.sat.i8(i8 %lhs, i8 %rhs)62 ret i8 %result63}64 65define i16 @v_uaddsat_i16(i16 %lhs, i16 %rhs) {66; GFX6-LABEL: v_uaddsat_i16:67; GFX6: ; %bb.0:68; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)69; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v170; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v071; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v172; GFX6-NEXT: v_min_u32_e32 v0, 0xffff, v073; GFX6-NEXT: s_setpc_b64 s[30:31]74;75; GFX8-LABEL: v_uaddsat_i16:76; GFX8: ; %bb.0:77; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)78; GFX8-NEXT: v_add_u16_e64 v0, v0, v1 clamp79; GFX8-NEXT: s_setpc_b64 s[30:31]80;81; GFX9-LABEL: v_uaddsat_i16:82; GFX9: ; %bb.0:83; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)84; GFX9-NEXT: v_add_u16_e64 v0, v0, v1 clamp85; GFX9-NEXT: s_setpc_b64 s[30:31]86;87; GFX10-LABEL: v_uaddsat_i16:88; GFX10: ; %bb.0:89; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)90; GFX10-NEXT: v_add_nc_u16 v0, v0, v1 clamp91; GFX10-NEXT: s_setpc_b64 s[30:31]92;93; GFX11-TRUE16-LABEL: v_uaddsat_i16:94; GFX11-TRUE16: ; %bb.0:95; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)96; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v0.l, v1.l clamp97; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]98;99; GFX11-FAKE16-LABEL: v_uaddsat_i16:100; GFX11-FAKE16: ; %bb.0:101; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)102; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v0, v1 clamp103; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]104 %result = call i16 @llvm.uadd.sat.i16(i16 %lhs, i16 %rhs)105 ret i16 %result106}107 108define i32 @v_uaddsat_i32(i32 %lhs, i32 %rhs) {109; GFX6-LABEL: v_uaddsat_i32:110; GFX6: ; %bb.0:111; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)112; GFX6-NEXT: v_not_b32_e32 v2, v1113; GFX6-NEXT: v_min_u32_e32 v0, v0, v2114; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v1115; GFX6-NEXT: s_setpc_b64 s[30:31]116;117; GFX8-LABEL: v_uaddsat_i32:118; GFX8: ; %bb.0:119; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)120; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v0, v1 clamp121; GFX8-NEXT: s_setpc_b64 s[30:31]122;123; GFX9-LABEL: v_uaddsat_i32:124; GFX9: ; %bb.0:125; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)126; GFX9-NEXT: v_add_u32_e64 v0, v0, v1 clamp127; GFX9-NEXT: s_setpc_b64 s[30:31]128;129; GFX10-LABEL: v_uaddsat_i32:130; GFX10: ; %bb.0:131; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)132; GFX10-NEXT: v_add_nc_u32_e64 v0, v0, v1 clamp133; GFX10-NEXT: s_setpc_b64 s[30:31]134;135; GFX11-LABEL: v_uaddsat_i32:136; GFX11: ; %bb.0:137; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)138; GFX11-NEXT: v_add_nc_u32_e64 v0, v0, v1 clamp139; GFX11-NEXT: s_setpc_b64 s[30:31]140 %result = call i32 @llvm.uadd.sat.i32(i32 %lhs, i32 %rhs)141 ret i32 %result142}143 144define <2 x i16> @v_uaddsat_v2i16(<2 x i16> %lhs, <2 x i16> %rhs) {145; GFX6-LABEL: v_uaddsat_v2i16:146; GFX6: ; %bb.0:147; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)148; GFX6-NEXT: v_and_b32_e32 v3, 0xffff, v3149; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v1150; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2151; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0152; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v3153; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v2154; GFX6-NEXT: v_min_u32_e32 v1, 0xffff, v1155; GFX6-NEXT: v_min_u32_e32 v0, 0xffff, v0156; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v1157; GFX6-NEXT: v_or_b32_e32 v0, v0, v2158; GFX6-NEXT: s_setpc_b64 s[30:31]159;160; GFX8-LABEL: v_uaddsat_v2i16:161; GFX8: ; %bb.0:162; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)163; GFX8-NEXT: v_add_u16_sdwa v2, v0, v1 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1164; GFX8-NEXT: v_add_u16_e64 v0, v0, v1 clamp165; GFX8-NEXT: v_or_b32_e32 v0, v0, v2166; GFX8-NEXT: s_setpc_b64 s[30:31]167;168; GFX9-LABEL: v_uaddsat_v2i16:169; GFX9: ; %bb.0:170; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)171; GFX9-NEXT: v_pk_add_u16 v0, v0, v1 clamp172; GFX9-NEXT: s_setpc_b64 s[30:31]173;174; GFX10-LABEL: v_uaddsat_v2i16:175; GFX10: ; %bb.0:176; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)177; GFX10-NEXT: v_pk_add_u16 v0, v0, v1 clamp178; GFX10-NEXT: s_setpc_b64 s[30:31]179;180; GFX11-LABEL: v_uaddsat_v2i16:181; GFX11: ; %bb.0:182; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)183; GFX11-NEXT: v_pk_add_u16 v0, v0, v1 clamp184; GFX11-NEXT: s_setpc_b64 s[30:31]185 %result = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> %lhs, <2 x i16> %rhs)186 ret <2 x i16> %result187}188 189define <3 x i16> @v_uaddsat_v3i16(<3 x i16> %lhs, <3 x i16> %rhs) {190; GFX6-LABEL: v_uaddsat_v3i16:191; GFX6: ; %bb.0:192; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)193; GFX6-NEXT: v_and_b32_e32 v4, 0xffff, v4194; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v1195; GFX6-NEXT: v_and_b32_e32 v5, 0xffff, v5196; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2197; GFX6-NEXT: v_and_b32_e32 v3, 0xffff, v3198; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0199; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v4200; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v3201; GFX6-NEXT: v_min_u32_e32 v1, 0xffff, v1202; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v5203; GFX6-NEXT: v_min_u32_e32 v0, 0xffff, v0204; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1205; GFX6-NEXT: v_min_u32_e32 v2, 0xffff, v2206; GFX6-NEXT: v_or_b32_e32 v0, v0, v1207; GFX6-NEXT: v_alignbit_b32 v1, v2, v1, 16208; GFX6-NEXT: s_setpc_b64 s[30:31]209;210; GFX8-LABEL: v_uaddsat_v3i16:211; GFX8: ; %bb.0:212; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)213; GFX8-NEXT: v_add_u16_sdwa v4, v0, v2 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1214; GFX8-NEXT: v_add_u16_e64 v0, v0, v2 clamp215; GFX8-NEXT: v_add_u16_e64 v1, v1, v3 clamp216; GFX8-NEXT: v_or_b32_e32 v0, v0, v4217; GFX8-NEXT: s_setpc_b64 s[30:31]218;219; GFX9-LABEL: v_uaddsat_v3i16:220; GFX9: ; %bb.0:221; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)222; GFX9-NEXT: v_pk_add_u16 v1, v1, v3 clamp223; GFX9-NEXT: v_pk_add_u16 v0, v0, v2 clamp224; GFX9-NEXT: s_setpc_b64 s[30:31]225;226; GFX10-LABEL: v_uaddsat_v3i16:227; GFX10: ; %bb.0:228; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)229; GFX10-NEXT: v_pk_add_u16 v0, v0, v2 clamp230; GFX10-NEXT: v_pk_add_u16 v1, v1, v3 clamp231; GFX10-NEXT: s_setpc_b64 s[30:31]232;233; GFX11-LABEL: v_uaddsat_v3i16:234; GFX11: ; %bb.0:235; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)236; GFX11-NEXT: v_pk_add_u16 v0, v0, v2 clamp237; GFX11-NEXT: v_pk_add_u16 v1, v1, v3 clamp238; GFX11-NEXT: s_setpc_b64 s[30:31]239 %result = call <3 x i16> @llvm.uadd.sat.v3i16(<3 x i16> %lhs, <3 x i16> %rhs)240 ret <3 x i16> %result241}242 243define <2 x float> @v_uaddsat_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {244; GFX6-LABEL: v_uaddsat_v4i16:245; GFX6: ; %bb.0:246; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)247; GFX6-NEXT: v_and_b32_e32 v5, 0xffff, v5248; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v1249; GFX6-NEXT: v_and_b32_e32 v4, 0xffff, v4250; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0251; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v5252; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v4253; GFX6-NEXT: v_min_u32_e32 v1, 0xffff, v1254; GFX6-NEXT: v_and_b32_e32 v7, 0xffff, v7255; GFX6-NEXT: v_and_b32_e32 v3, 0xffff, v3256; GFX6-NEXT: v_and_b32_e32 v6, 0xffff, v6257; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2258; GFX6-NEXT: v_min_u32_e32 v0, 0xffff, v0259; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1260; GFX6-NEXT: v_or_b32_e32 v0, v0, v1261; GFX6-NEXT: v_add_i32_e32 v1, vcc, v2, v6262; GFX6-NEXT: v_add_i32_e32 v2, vcc, v3, v7263; GFX6-NEXT: v_min_u32_e32 v2, 0xffff, v2264; GFX6-NEXT: v_min_u32_e32 v1, 0xffff, v1265; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2266; GFX6-NEXT: v_or_b32_e32 v1, v1, v2267; GFX6-NEXT: s_setpc_b64 s[30:31]268;269; GFX8-LABEL: v_uaddsat_v4i16:270; GFX8: ; %bb.0:271; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)272; GFX8-NEXT: v_add_u16_sdwa v4, v0, v2 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1273; GFX8-NEXT: v_add_u16_e64 v0, v0, v2 clamp274; GFX8-NEXT: v_add_u16_sdwa v2, v1, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1275; GFX8-NEXT: v_add_u16_e64 v1, v1, v3 clamp276; GFX8-NEXT: v_or_b32_e32 v0, v0, v4277; GFX8-NEXT: v_or_b32_e32 v1, v1, v2278; GFX8-NEXT: s_setpc_b64 s[30:31]279;280; GFX9-LABEL: v_uaddsat_v4i16:281; GFX9: ; %bb.0:282; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)283; GFX9-NEXT: v_pk_add_u16 v0, v0, v2 clamp284; GFX9-NEXT: v_pk_add_u16 v1, v1, v3 clamp285; GFX9-NEXT: s_setpc_b64 s[30:31]286;287; GFX10-LABEL: v_uaddsat_v4i16:288; GFX10: ; %bb.0:289; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)290; GFX10-NEXT: v_pk_add_u16 v0, v0, v2 clamp291; GFX10-NEXT: v_pk_add_u16 v1, v1, v3 clamp292; GFX10-NEXT: s_setpc_b64 s[30:31]293;294; GFX11-LABEL: v_uaddsat_v4i16:295; GFX11: ; %bb.0:296; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)297; GFX11-NEXT: v_pk_add_u16 v0, v0, v2 clamp298; GFX11-NEXT: v_pk_add_u16 v1, v1, v3 clamp299; GFX11-NEXT: s_setpc_b64 s[30:31]300 %result = call <4 x i16> @llvm.uadd.sat.v4i16(<4 x i16> %lhs, <4 x i16> %rhs)301 %cast = bitcast <4 x i16> %result to <2 x float>302 ret <2 x float> %cast303}304 305define <2 x i32> @v_uaddsat_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {306; GFX6-LABEL: v_uaddsat_v2i32:307; GFX6: ; %bb.0:308; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)309; GFX6-NEXT: v_not_b32_e32 v4, v2310; GFX6-NEXT: v_min_u32_e32 v0, v0, v4311; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v2312; GFX6-NEXT: v_not_b32_e32 v2, v3313; GFX6-NEXT: v_min_u32_e32 v1, v1, v2314; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v3315; GFX6-NEXT: s_setpc_b64 s[30:31]316;317; GFX8-LABEL: v_uaddsat_v2i32:318; GFX8: ; %bb.0:319; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)320; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v0, v2 clamp321; GFX8-NEXT: v_add_u32_e64 v1, s[4:5], v1, v3 clamp322; GFX8-NEXT: s_setpc_b64 s[30:31]323;324; GFX9-LABEL: v_uaddsat_v2i32:325; GFX9: ; %bb.0:326; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)327; GFX9-NEXT: v_add_u32_e64 v0, v0, v2 clamp328; GFX9-NEXT: v_add_u32_e64 v1, v1, v3 clamp329; GFX9-NEXT: s_setpc_b64 s[30:31]330;331; GFX10-LABEL: v_uaddsat_v2i32:332; GFX10: ; %bb.0:333; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)334; GFX10-NEXT: v_add_nc_u32_e64 v0, v0, v2 clamp335; GFX10-NEXT: v_add_nc_u32_e64 v1, v1, v3 clamp336; GFX10-NEXT: s_setpc_b64 s[30:31]337;338; GFX11-LABEL: v_uaddsat_v2i32:339; GFX11: ; %bb.0:340; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)341; GFX11-NEXT: v_add_nc_u32_e64 v0, v0, v2 clamp342; GFX11-NEXT: v_add_nc_u32_e64 v1, v1, v3 clamp343; GFX11-NEXT: s_setpc_b64 s[30:31]344 %result = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> %lhs, <2 x i32> %rhs)345 ret <2 x i32> %result346}347 348define <3 x i32> @v_uaddsat_v3i32(<3 x i32> %lhs, <3 x i32> %rhs) {349; GFX6-LABEL: v_uaddsat_v3i32:350; GFX6: ; %bb.0:351; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)352; GFX6-NEXT: v_not_b32_e32 v6, v3353; GFX6-NEXT: v_min_u32_e32 v0, v0, v6354; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v3355; GFX6-NEXT: v_not_b32_e32 v3, v4356; GFX6-NEXT: v_min_u32_e32 v1, v1, v3357; GFX6-NEXT: v_not_b32_e32 v3, v5358; GFX6-NEXT: v_min_u32_e32 v2, v2, v3359; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v4360; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v5361; GFX6-NEXT: s_setpc_b64 s[30:31]362;363; GFX8-LABEL: v_uaddsat_v3i32:364; GFX8: ; %bb.0:365; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)366; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v0, v3 clamp367; GFX8-NEXT: v_add_u32_e64 v1, s[4:5], v1, v4 clamp368; GFX8-NEXT: v_add_u32_e64 v2, s[4:5], v2, v5 clamp369; GFX8-NEXT: s_setpc_b64 s[30:31]370;371; GFX9-LABEL: v_uaddsat_v3i32:372; GFX9: ; %bb.0:373; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)374; GFX9-NEXT: v_add_u32_e64 v0, v0, v3 clamp375; GFX9-NEXT: v_add_u32_e64 v1, v1, v4 clamp376; GFX9-NEXT: v_add_u32_e64 v2, v2, v5 clamp377; GFX9-NEXT: s_setpc_b64 s[30:31]378;379; GFX10-LABEL: v_uaddsat_v3i32:380; GFX10: ; %bb.0:381; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)382; GFX10-NEXT: v_add_nc_u32_e64 v0, v0, v3 clamp383; GFX10-NEXT: v_add_nc_u32_e64 v1, v1, v4 clamp384; GFX10-NEXT: v_add_nc_u32_e64 v2, v2, v5 clamp385; GFX10-NEXT: s_setpc_b64 s[30:31]386;387; GFX11-LABEL: v_uaddsat_v3i32:388; GFX11: ; %bb.0:389; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)390; GFX11-NEXT: v_add_nc_u32_e64 v0, v0, v3 clamp391; GFX11-NEXT: v_add_nc_u32_e64 v1, v1, v4 clamp392; GFX11-NEXT: v_add_nc_u32_e64 v2, v2, v5 clamp393; GFX11-NEXT: s_setpc_b64 s[30:31]394 %result = call <3 x i32> @llvm.uadd.sat.v3i32(<3 x i32> %lhs, <3 x i32> %rhs)395 ret <3 x i32> %result396}397 398define <4 x i32> @v_uaddsat_v4i32(<4 x i32> %lhs, <4 x i32> %rhs) {399; GFX6-LABEL: v_uaddsat_v4i32:400; GFX6: ; %bb.0:401; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)402; GFX6-NEXT: v_not_b32_e32 v8, v4403; GFX6-NEXT: v_min_u32_e32 v0, v0, v8404; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v4405; GFX6-NEXT: v_not_b32_e32 v4, v5406; GFX6-NEXT: v_min_u32_e32 v1, v1, v4407; GFX6-NEXT: v_not_b32_e32 v4, v6408; GFX6-NEXT: v_min_u32_e32 v2, v2, v4409; GFX6-NEXT: v_not_b32_e32 v4, v7410; GFX6-NEXT: v_min_u32_e32 v3, v3, v4411; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v5412; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v6413; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v7414; GFX6-NEXT: s_setpc_b64 s[30:31]415;416; GFX8-LABEL: v_uaddsat_v4i32:417; GFX8: ; %bb.0:418; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)419; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v0, v4 clamp420; GFX8-NEXT: v_add_u32_e64 v1, s[4:5], v1, v5 clamp421; GFX8-NEXT: v_add_u32_e64 v2, s[4:5], v2, v6 clamp422; GFX8-NEXT: v_add_u32_e64 v3, s[4:5], v3, v7 clamp423; GFX8-NEXT: s_setpc_b64 s[30:31]424;425; GFX9-LABEL: v_uaddsat_v4i32:426; GFX9: ; %bb.0:427; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)428; GFX9-NEXT: v_add_u32_e64 v0, v0, v4 clamp429; GFX9-NEXT: v_add_u32_e64 v1, v1, v5 clamp430; GFX9-NEXT: v_add_u32_e64 v2, v2, v6 clamp431; GFX9-NEXT: v_add_u32_e64 v3, v3, v7 clamp432; GFX9-NEXT: s_setpc_b64 s[30:31]433;434; GFX10-LABEL: v_uaddsat_v4i32:435; GFX10: ; %bb.0:436; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)437; GFX10-NEXT: v_add_nc_u32_e64 v0, v0, v4 clamp438; GFX10-NEXT: v_add_nc_u32_e64 v1, v1, v5 clamp439; GFX10-NEXT: v_add_nc_u32_e64 v2, v2, v6 clamp440; GFX10-NEXT: v_add_nc_u32_e64 v3, v3, v7 clamp441; GFX10-NEXT: s_setpc_b64 s[30:31]442;443; GFX11-LABEL: v_uaddsat_v4i32:444; GFX11: ; %bb.0:445; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)446; GFX11-NEXT: v_add_nc_u32_e64 v0, v0, v4 clamp447; GFX11-NEXT: v_add_nc_u32_e64 v1, v1, v5 clamp448; GFX11-NEXT: v_add_nc_u32_e64 v2, v2, v6 clamp449; GFX11-NEXT: v_add_nc_u32_e64 v3, v3, v7 clamp450; GFX11-NEXT: s_setpc_b64 s[30:31]451 %result = call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %lhs, <4 x i32> %rhs)452 ret <4 x i32> %result453}454 455define <8 x i32> @v_uaddsat_v8i32(<8 x i32> %lhs, <8 x i32> %rhs) {456; GFX6-LABEL: v_uaddsat_v8i32:457; GFX6: ; %bb.0:458; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)459; GFX6-NEXT: v_not_b32_e32 v16, v8460; GFX6-NEXT: v_min_u32_e32 v0, v0, v16461; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v8462; GFX6-NEXT: v_not_b32_e32 v8, v9463; GFX6-NEXT: v_min_u32_e32 v1, v1, v8464; GFX6-NEXT: v_not_b32_e32 v8, v10465; GFX6-NEXT: v_min_u32_e32 v2, v2, v8466; GFX6-NEXT: v_not_b32_e32 v8, v11467; GFX6-NEXT: v_min_u32_e32 v3, v3, v8468; GFX6-NEXT: v_not_b32_e32 v8, v12469; GFX6-NEXT: v_min_u32_e32 v4, v4, v8470; GFX6-NEXT: v_not_b32_e32 v8, v13471; GFX6-NEXT: v_min_u32_e32 v5, v5, v8472; GFX6-NEXT: v_not_b32_e32 v8, v14473; GFX6-NEXT: v_min_u32_e32 v6, v6, v8474; GFX6-NEXT: v_not_b32_e32 v8, v15475; GFX6-NEXT: v_min_u32_e32 v7, v7, v8476; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v9477; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v10478; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v11479; GFX6-NEXT: v_add_i32_e32 v4, vcc, v4, v12480; GFX6-NEXT: v_add_i32_e32 v5, vcc, v5, v13481; GFX6-NEXT: v_add_i32_e32 v6, vcc, v6, v14482; GFX6-NEXT: v_add_i32_e32 v7, vcc, v7, v15483; GFX6-NEXT: s_setpc_b64 s[30:31]484;485; GFX8-LABEL: v_uaddsat_v8i32:486; GFX8: ; %bb.0:487; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)488; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v0, v8 clamp489; GFX8-NEXT: v_add_u32_e64 v1, s[4:5], v1, v9 clamp490; GFX8-NEXT: v_add_u32_e64 v2, s[4:5], v2, v10 clamp491; GFX8-NEXT: v_add_u32_e64 v3, s[4:5], v3, v11 clamp492; GFX8-NEXT: v_add_u32_e64 v4, s[4:5], v4, v12 clamp493; GFX8-NEXT: v_add_u32_e64 v5, s[4:5], v5, v13 clamp494; GFX8-NEXT: v_add_u32_e64 v6, s[4:5], v6, v14 clamp495; GFX8-NEXT: v_add_u32_e64 v7, s[4:5], v7, v15 clamp496; GFX8-NEXT: s_setpc_b64 s[30:31]497;498; GFX9-LABEL: v_uaddsat_v8i32:499; GFX9: ; %bb.0:500; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)501; GFX9-NEXT: v_add_u32_e64 v0, v0, v8 clamp502; GFX9-NEXT: v_add_u32_e64 v1, v1, v9 clamp503; GFX9-NEXT: v_add_u32_e64 v2, v2, v10 clamp504; GFX9-NEXT: v_add_u32_e64 v3, v3, v11 clamp505; GFX9-NEXT: v_add_u32_e64 v4, v4, v12 clamp506; GFX9-NEXT: v_add_u32_e64 v5, v5, v13 clamp507; GFX9-NEXT: v_add_u32_e64 v6, v6, v14 clamp508; GFX9-NEXT: v_add_u32_e64 v7, v7, v15 clamp509; GFX9-NEXT: s_setpc_b64 s[30:31]510;511; GFX10-LABEL: v_uaddsat_v8i32:512; GFX10: ; %bb.0:513; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)514; GFX10-NEXT: v_add_nc_u32_e64 v0, v0, v8 clamp515; GFX10-NEXT: v_add_nc_u32_e64 v1, v1, v9 clamp516; GFX10-NEXT: v_add_nc_u32_e64 v2, v2, v10 clamp517; GFX10-NEXT: v_add_nc_u32_e64 v3, v3, v11 clamp518; GFX10-NEXT: v_add_nc_u32_e64 v4, v4, v12 clamp519; GFX10-NEXT: v_add_nc_u32_e64 v5, v5, v13 clamp520; GFX10-NEXT: v_add_nc_u32_e64 v6, v6, v14 clamp521; GFX10-NEXT: v_add_nc_u32_e64 v7, v7, v15 clamp522; GFX10-NEXT: s_setpc_b64 s[30:31]523;524; GFX11-LABEL: v_uaddsat_v8i32:525; GFX11: ; %bb.0:526; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)527; GFX11-NEXT: v_add_nc_u32_e64 v0, v0, v8 clamp528; GFX11-NEXT: v_add_nc_u32_e64 v1, v1, v9 clamp529; GFX11-NEXT: v_add_nc_u32_e64 v2, v2, v10 clamp530; GFX11-NEXT: v_add_nc_u32_e64 v3, v3, v11 clamp531; GFX11-NEXT: v_add_nc_u32_e64 v4, v4, v12 clamp532; GFX11-NEXT: v_add_nc_u32_e64 v5, v5, v13 clamp533; GFX11-NEXT: v_add_nc_u32_e64 v6, v6, v14 clamp534; GFX11-NEXT: v_add_nc_u32_e64 v7, v7, v15 clamp535; GFX11-NEXT: s_setpc_b64 s[30:31]536 %result = call <8 x i32> @llvm.uadd.sat.v8i32(<8 x i32> %lhs, <8 x i32> %rhs)537 ret <8 x i32> %result538}539 540define <16 x i32> @v_uaddsat_v16i32(<16 x i32> %lhs, <16 x i32> %rhs) {541; GFX6-LABEL: v_uaddsat_v16i32:542; GFX6: ; %bb.0:543; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)544; GFX6-NEXT: v_not_b32_e32 v31, v16545; GFX6-NEXT: v_min_u32_e32 v0, v0, v31546; GFX6-NEXT: buffer_load_dword v31, off, s[0:3], s32547; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v16548; GFX6-NEXT: v_not_b32_e32 v16, v17549; GFX6-NEXT: v_min_u32_e32 v1, v1, v16550; GFX6-NEXT: v_not_b32_e32 v16, v18551; GFX6-NEXT: v_min_u32_e32 v2, v2, v16552; GFX6-NEXT: v_not_b32_e32 v16, v19553; GFX6-NEXT: v_min_u32_e32 v3, v3, v16554; GFX6-NEXT: v_not_b32_e32 v16, v20555; GFX6-NEXT: v_min_u32_e32 v4, v4, v16556; GFX6-NEXT: v_not_b32_e32 v16, v21557; GFX6-NEXT: v_min_u32_e32 v5, v5, v16558; GFX6-NEXT: v_not_b32_e32 v16, v22559; GFX6-NEXT: v_min_u32_e32 v6, v6, v16560; GFX6-NEXT: v_not_b32_e32 v16, v23561; GFX6-NEXT: v_min_u32_e32 v7, v7, v16562; GFX6-NEXT: v_not_b32_e32 v16, v24563; GFX6-NEXT: v_min_u32_e32 v8, v8, v16564; GFX6-NEXT: v_not_b32_e32 v16, v25565; GFX6-NEXT: v_min_u32_e32 v9, v9, v16566; GFX6-NEXT: v_not_b32_e32 v16, v26567; GFX6-NEXT: v_min_u32_e32 v10, v10, v16568; GFX6-NEXT: v_not_b32_e32 v16, v27569; GFX6-NEXT: v_min_u32_e32 v11, v11, v16570; GFX6-NEXT: v_not_b32_e32 v16, v28571; GFX6-NEXT: v_min_u32_e32 v12, v12, v16572; GFX6-NEXT: v_not_b32_e32 v16, v29573; GFX6-NEXT: v_min_u32_e32 v13, v13, v16574; GFX6-NEXT: v_not_b32_e32 v16, v30575; GFX6-NEXT: v_min_u32_e32 v14, v14, v16576; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v17577; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v18578; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v19579; GFX6-NEXT: v_add_i32_e32 v4, vcc, v4, v20580; GFX6-NEXT: v_add_i32_e32 v5, vcc, v5, v21581; GFX6-NEXT: v_add_i32_e32 v6, vcc, v6, v22582; GFX6-NEXT: v_add_i32_e32 v7, vcc, v7, v23583; GFX6-NEXT: v_add_i32_e32 v8, vcc, v8, v24584; GFX6-NEXT: v_add_i32_e32 v9, vcc, v9, v25585; GFX6-NEXT: v_add_i32_e32 v10, vcc, v10, v26586; GFX6-NEXT: v_add_i32_e32 v11, vcc, v11, v27587; GFX6-NEXT: v_add_i32_e32 v12, vcc, v12, v28588; GFX6-NEXT: v_add_i32_e32 v13, vcc, v13, v29589; GFX6-NEXT: v_add_i32_e32 v14, vcc, v14, v30590; GFX6-NEXT: s_waitcnt vmcnt(0)591; GFX6-NEXT: v_not_b32_e32 v16, v31592; GFX6-NEXT: v_min_u32_e32 v15, v15, v16593; GFX6-NEXT: v_add_i32_e32 v15, vcc, v15, v31594; GFX6-NEXT: s_setpc_b64 s[30:31]595;596; GFX8-LABEL: v_uaddsat_v16i32:597; GFX8: ; %bb.0:598; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)599; GFX8-NEXT: v_add_u32_e64 v0, s[4:5], v0, v16 clamp600; GFX8-NEXT: buffer_load_dword v16, off, s[0:3], s32601; GFX8-NEXT: v_add_u32_e64 v1, s[4:5], v1, v17 clamp602; GFX8-NEXT: v_add_u32_e64 v2, s[4:5], v2, v18 clamp603; GFX8-NEXT: v_add_u32_e64 v3, s[4:5], v3, v19 clamp604; GFX8-NEXT: v_add_u32_e64 v4, s[4:5], v4, v20 clamp605; GFX8-NEXT: v_add_u32_e64 v5, s[4:5], v5, v21 clamp606; GFX8-NEXT: v_add_u32_e64 v6, s[4:5], v6, v22 clamp607; GFX8-NEXT: v_add_u32_e64 v7, s[4:5], v7, v23 clamp608; GFX8-NEXT: v_add_u32_e64 v8, s[4:5], v8, v24 clamp609; GFX8-NEXT: v_add_u32_e64 v9, s[4:5], v9, v25 clamp610; GFX8-NEXT: v_add_u32_e64 v10, s[4:5], v10, v26 clamp611; GFX8-NEXT: v_add_u32_e64 v11, s[4:5], v11, v27 clamp612; GFX8-NEXT: v_add_u32_e64 v12, s[4:5], v12, v28 clamp613; GFX8-NEXT: v_add_u32_e64 v13, s[4:5], v13, v29 clamp614; GFX8-NEXT: v_add_u32_e64 v14, s[4:5], v14, v30 clamp615; GFX8-NEXT: s_waitcnt vmcnt(0)616; GFX8-NEXT: v_add_u32_e64 v15, s[4:5], v15, v16 clamp617; GFX8-NEXT: s_setpc_b64 s[30:31]618;619; GFX9-LABEL: v_uaddsat_v16i32:620; GFX9: ; %bb.0:621; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)622; GFX9-NEXT: v_add_u32_e64 v0, v0, v16 clamp623; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32624; GFX9-NEXT: v_add_u32_e64 v1, v1, v17 clamp625; GFX9-NEXT: v_add_u32_e64 v2, v2, v18 clamp626; GFX9-NEXT: v_add_u32_e64 v3, v3, v19 clamp627; GFX9-NEXT: v_add_u32_e64 v4, v4, v20 clamp628; GFX9-NEXT: v_add_u32_e64 v5, v5, v21 clamp629; GFX9-NEXT: v_add_u32_e64 v6, v6, v22 clamp630; GFX9-NEXT: v_add_u32_e64 v7, v7, v23 clamp631; GFX9-NEXT: v_add_u32_e64 v8, v8, v24 clamp632; GFX9-NEXT: v_add_u32_e64 v9, v9, v25 clamp633; GFX9-NEXT: v_add_u32_e64 v10, v10, v26 clamp634; GFX9-NEXT: v_add_u32_e64 v11, v11, v27 clamp635; GFX9-NEXT: v_add_u32_e64 v12, v12, v28 clamp636; GFX9-NEXT: v_add_u32_e64 v13, v13, v29 clamp637; GFX9-NEXT: v_add_u32_e64 v14, v14, v30 clamp638; GFX9-NEXT: s_waitcnt vmcnt(0)639; GFX9-NEXT: v_add_u32_e64 v15, v15, v16 clamp640; GFX9-NEXT: s_setpc_b64 s[30:31]641;642; GFX10-LABEL: v_uaddsat_v16i32:643; GFX10: ; %bb.0:644; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)645; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32646; GFX10-NEXT: v_add_nc_u32_e64 v0, v0, v16 clamp647; GFX10-NEXT: v_add_nc_u32_e64 v1, v1, v17 clamp648; GFX10-NEXT: v_add_nc_u32_e64 v2, v2, v18 clamp649; GFX10-NEXT: v_add_nc_u32_e64 v3, v3, v19 clamp650; GFX10-NEXT: v_add_nc_u32_e64 v4, v4, v20 clamp651; GFX10-NEXT: v_add_nc_u32_e64 v5, v5, v21 clamp652; GFX10-NEXT: v_add_nc_u32_e64 v6, v6, v22 clamp653; GFX10-NEXT: v_add_nc_u32_e64 v7, v7, v23 clamp654; GFX10-NEXT: v_add_nc_u32_e64 v8, v8, v24 clamp655; GFX10-NEXT: v_add_nc_u32_e64 v9, v9, v25 clamp656; GFX10-NEXT: v_add_nc_u32_e64 v10, v10, v26 clamp657; GFX10-NEXT: v_add_nc_u32_e64 v11, v11, v27 clamp658; GFX10-NEXT: v_add_nc_u32_e64 v12, v12, v28 clamp659; GFX10-NEXT: v_add_nc_u32_e64 v13, v13, v29 clamp660; GFX10-NEXT: v_add_nc_u32_e64 v14, v14, v30 clamp661; GFX10-NEXT: s_waitcnt vmcnt(0)662; GFX10-NEXT: v_add_nc_u32_e64 v15, v15, v31 clamp663; GFX10-NEXT: s_setpc_b64 s[30:31]664;665; GFX11-LABEL: v_uaddsat_v16i32:666; GFX11: ; %bb.0:667; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)668; GFX11-NEXT: scratch_load_b32 v31, off, s32669; GFX11-NEXT: v_add_nc_u32_e64 v0, v0, v16 clamp670; GFX11-NEXT: v_add_nc_u32_e64 v1, v1, v17 clamp671; GFX11-NEXT: v_add_nc_u32_e64 v2, v2, v18 clamp672; GFX11-NEXT: v_add_nc_u32_e64 v3, v3, v19 clamp673; GFX11-NEXT: v_add_nc_u32_e64 v4, v4, v20 clamp674; GFX11-NEXT: v_add_nc_u32_e64 v5, v5, v21 clamp675; GFX11-NEXT: v_add_nc_u32_e64 v6, v6, v22 clamp676; GFX11-NEXT: v_add_nc_u32_e64 v7, v7, v23 clamp677; GFX11-NEXT: v_add_nc_u32_e64 v8, v8, v24 clamp678; GFX11-NEXT: v_add_nc_u32_e64 v9, v9, v25 clamp679; GFX11-NEXT: v_add_nc_u32_e64 v10, v10, v26 clamp680; GFX11-NEXT: v_add_nc_u32_e64 v11, v11, v27 clamp681; GFX11-NEXT: v_add_nc_u32_e64 v12, v12, v28 clamp682; GFX11-NEXT: v_add_nc_u32_e64 v13, v13, v29 clamp683; GFX11-NEXT: v_add_nc_u32_e64 v14, v14, v30 clamp684; GFX11-NEXT: s_waitcnt vmcnt(0)685; GFX11-NEXT: v_add_nc_u32_e64 v15, v15, v31 clamp686; GFX11-NEXT: s_setpc_b64 s[30:31]687 %result = call <16 x i32> @llvm.uadd.sat.v16i32(<16 x i32> %lhs, <16 x i32> %rhs)688 ret <16 x i32> %result689}690 691 692define i64 @v_uaddsat_i64(i64 %lhs, i64 %rhs) {693; GFX6-LABEL: v_uaddsat_i64:694; GFX6: ; %bb.0:695; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)696; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v2697; GFX6-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc698; GFX6-NEXT: v_cndmask_b32_e64 v0, v0, -1, vcc699; GFX6-NEXT: v_cndmask_b32_e64 v1, v1, -1, vcc700; GFX6-NEXT: s_setpc_b64 s[30:31]701;702; GFX8-LABEL: v_uaddsat_i64:703; GFX8: ; %bb.0:704; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)705; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2706; GFX8-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc707; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, -1, vcc708; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, -1, vcc709; GFX8-NEXT: s_setpc_b64 s[30:31]710;711; GFX9-LABEL: v_uaddsat_i64:712; GFX9: ; %bb.0:713; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)714; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v2715; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, v1, v3, vcc716; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, -1, vcc717; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, -1, vcc718; GFX9-NEXT: s_setpc_b64 s[30:31]719;720; GFX10-LABEL: v_uaddsat_i64:721; GFX10: ; %bb.0:722; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)723; GFX10-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2724; GFX10-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo725; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, -1, vcc_lo726; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, -1, vcc_lo727; GFX10-NEXT: s_setpc_b64 s[30:31]728;729; GFX11-LABEL: v_uaddsat_i64:730; GFX11: ; %bb.0:731; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)732; GFX11-NEXT: v_add_co_u32 v0, vcc_lo, v0, v2733; GFX11-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo734; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)735; GFX11-NEXT: v_cndmask_b32_e64 v0, v0, -1, vcc_lo736; GFX11-NEXT: v_cndmask_b32_e64 v1, v1, -1, vcc_lo737; GFX11-NEXT: s_setpc_b64 s[30:31]738 %result = call i64 @llvm.uadd.sat.i64(i64 %lhs, i64 %rhs)739 ret i64 %result740}741 742declare i8 @llvm.uadd.sat.i8(i8, i8) #0743declare i16 @llvm.uadd.sat.i16(i16, i16) #0744declare <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16>, <2 x i16>) #0745declare <3 x i16> @llvm.uadd.sat.v3i16(<3 x i16>, <3 x i16>) #0746declare <4 x i16> @llvm.uadd.sat.v4i16(<4 x i16>, <4 x i16>) #0747declare i32 @llvm.uadd.sat.i32(i32, i32) #0748declare <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32>, <2 x i32>) #0749declare <3 x i32> @llvm.uadd.sat.v3i32(<3 x i32>, <3 x i32>) #0750declare <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32>, <4 x i32>) #0751declare <8 x i32> @llvm.uadd.sat.v8i32(<8 x i32>, <8 x i32>) #0752declare <16 x i32> @llvm.uadd.sat.v16i32(<16 x i32>, <16 x i32>) #0753declare i64 @llvm.uadd.sat.i64(i64, i64) #0754 755attributes #0 = { nounwind readnone speculatable willreturn }756