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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=verde < %s | FileCheck %s -check-prefixes=SI3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=VI4; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=fiji -denormal-fp-math-f32=ieee < %s | FileCheck %s -check-prefixes=GCN5; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=gfx1030 -denormal-fp-math-f32=ieee < %s | FileCheck %s -check-prefixes=GFX10306; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=r600 -mcpu=redwood < %s | FileCheck %s -check-prefixes=EG7 8define amdgpu_kernel void @udiv_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {9; SI-LABEL: udiv_i32:10; SI: ; %bb.0:11; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x912; SI-NEXT: s_mov_b32 s7, 0xf00013; SI-NEXT: s_mov_b32 s6, -114; SI-NEXT: s_mov_b32 s10, s615; SI-NEXT: s_mov_b32 s11, s716; SI-NEXT: s_waitcnt lgkmcnt(0)17; SI-NEXT: s_mov_b32 s8, s218; SI-NEXT: s_mov_b32 s9, s319; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 020; SI-NEXT: s_mov_b32 s4, s021; SI-NEXT: s_mov_b32 s5, s122; SI-NEXT: s_waitcnt vmcnt(0)23; SI-NEXT: v_cvt_f32_u32_e32 v2, v124; SI-NEXT: v_sub_i32_e32 v3, vcc, 0, v125; SI-NEXT: v_rcp_iflag_f32_e32 v2, v226; SI-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v227; SI-NEXT: v_cvt_u32_f32_e32 v2, v228; SI-NEXT: v_mul_lo_u32 v3, v3, v229; SI-NEXT: v_mul_hi_u32 v3, v2, v330; SI-NEXT: v_add_i32_e32 v2, vcc, v2, v331; SI-NEXT: v_mul_hi_u32 v2, v0, v232; SI-NEXT: v_mul_lo_u32 v3, v2, v133; SI-NEXT: v_add_i32_e32 v4, vcc, 1, v234; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v335; SI-NEXT: v_sub_i32_e32 v3, vcc, v0, v136; SI-NEXT: v_cmp_ge_u32_e32 vcc, v0, v137; SI-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc38; SI-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc39; SI-NEXT: v_add_i32_e32 v3, vcc, 1, v240; SI-NEXT: v_cmp_ge_u32_e32 vcc, v0, v141; SI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc42; SI-NEXT: buffer_store_dword v0, off, s[4:7], 043; SI-NEXT: s_endpgm44;45; VI-LABEL: udiv_i32:46; VI: ; %bb.0:47; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2448; VI-NEXT: s_mov_b32 s7, 0xf00049; VI-NEXT: s_mov_b32 s6, -150; VI-NEXT: s_mov_b32 s10, s651; VI-NEXT: s_mov_b32 s11, s752; VI-NEXT: s_waitcnt lgkmcnt(0)53; VI-NEXT: s_mov_b32 s8, s254; VI-NEXT: s_mov_b32 s9, s355; VI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 056; VI-NEXT: s_mov_b32 s4, s057; VI-NEXT: s_mov_b32 s5, s158; VI-NEXT: s_waitcnt vmcnt(0)59; VI-NEXT: v_cvt_f32_u32_e32 v2, v160; VI-NEXT: v_sub_u32_e32 v3, vcc, 0, v161; VI-NEXT: v_rcp_iflag_f32_e32 v2, v262; VI-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v263; VI-NEXT: v_cvt_u32_f32_e32 v2, v264; VI-NEXT: v_mul_lo_u32 v3, v3, v265; VI-NEXT: v_mul_hi_u32 v3, v2, v366; VI-NEXT: v_add_u32_e32 v2, vcc, v2, v367; VI-NEXT: v_mul_hi_u32 v2, v0, v268; VI-NEXT: v_mul_lo_u32 v3, v2, v169; VI-NEXT: v_add_u32_e32 v4, vcc, 1, v270; VI-NEXT: v_sub_u32_e32 v0, vcc, v0, v371; VI-NEXT: v_sub_u32_e32 v3, vcc, v0, v172; VI-NEXT: v_cmp_ge_u32_e32 vcc, v0, v173; VI-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc74; VI-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc75; VI-NEXT: v_add_u32_e32 v3, vcc, 1, v276; VI-NEXT: v_cmp_ge_u32_e32 vcc, v0, v177; VI-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc78; VI-NEXT: buffer_store_dword v0, off, s[4:7], 079; VI-NEXT: s_endpgm80;81; GCN-LABEL: udiv_i32:82; GCN: ; %bb.0:83; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x084; GCN-NEXT: s_add_i32 s12, s12, s1785; GCN-NEXT: s_mov_b32 flat_scratch_lo, s1386; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 887; GCN-NEXT: s_waitcnt lgkmcnt(0)88; GCN-NEXT: v_mov_b32_e32 v0, s289; GCN-NEXT: v_mov_b32_e32 v1, s390; GCN-NEXT: flat_load_dwordx2 v[0:1], v[0:1]91; GCN-NEXT: s_waitcnt vmcnt(0)92; GCN-NEXT: v_cvt_f32_u32_e32 v2, v193; GCN-NEXT: v_sub_u32_e32 v3, vcc, 0, v194; GCN-NEXT: v_rcp_iflag_f32_e32 v2, v295; GCN-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v296; GCN-NEXT: v_cvt_u32_f32_e32 v2, v297; GCN-NEXT: v_mul_lo_u32 v3, v3, v298; GCN-NEXT: v_mul_hi_u32 v3, v2, v399; GCN-NEXT: v_add_u32_e32 v2, vcc, v2, v3100; GCN-NEXT: v_mul_hi_u32 v4, v0, v2101; GCN-NEXT: v_mov_b32_e32 v2, s0102; GCN-NEXT: v_mov_b32_e32 v3, s1103; GCN-NEXT: v_mul_lo_u32 v5, v4, v1104; GCN-NEXT: v_add_u32_e32 v6, vcc, 1, v4105; GCN-NEXT: v_sub_u32_e32 v0, vcc, v0, v5106; GCN-NEXT: v_sub_u32_e32 v5, vcc, v0, v1107; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1108; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc109; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc110; GCN-NEXT: v_add_u32_e32 v5, vcc, 1, v4111; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1112; GCN-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc113; GCN-NEXT: flat_store_dword v[2:3], v0114; GCN-NEXT: s_endpgm115;116; GFX1030-LABEL: udiv_i32:117; GFX1030: ; %bb.0:118; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0119; GFX1030-NEXT: v_mov_b32_e32 v2, 0120; GFX1030-NEXT: s_waitcnt lgkmcnt(0)121; GFX1030-NEXT: global_load_dwordx2 v[0:1], v2, s[2:3]122; GFX1030-NEXT: s_waitcnt vmcnt(0)123; GFX1030-NEXT: v_readfirstlane_b32 s2, v1124; GFX1030-NEXT: v_readfirstlane_b32 s5, v0125; GFX1030-NEXT: v_cvt_f32_u32_e32 v1, s2126; GFX1030-NEXT: s_sub_i32 s4, 0, s2127; GFX1030-NEXT: v_rcp_iflag_f32_e32 v1, v1128; GFX1030-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1129; GFX1030-NEXT: v_cvt_u32_f32_e32 v1, v1130; GFX1030-NEXT: v_readfirstlane_b32 s3, v1131; GFX1030-NEXT: s_mul_i32 s4, s4, s3132; GFX1030-NEXT: s_mul_hi_u32 s4, s3, s4133; GFX1030-NEXT: s_add_i32 s3, s3, s4134; GFX1030-NEXT: s_mul_hi_u32 s3, s5, s3135; GFX1030-NEXT: s_mul_i32 s4, s3, s2136; GFX1030-NEXT: s_sub_i32 s4, s5, s4137; GFX1030-NEXT: s_add_i32 s5, s3, 1138; GFX1030-NEXT: s_sub_i32 s6, s4, s2139; GFX1030-NEXT: s_cmp_ge_u32 s4, s2140; GFX1030-NEXT: s_cselect_b32 s3, s5, s3141; GFX1030-NEXT: s_cselect_b32 s4, s6, s4142; GFX1030-NEXT: s_add_i32 s5, s3, 1143; GFX1030-NEXT: s_cmp_ge_u32 s4, s2144; GFX1030-NEXT: s_cselect_b32 s2, s5, s3145; GFX1030-NEXT: v_mov_b32_e32 v0, s2146; GFX1030-NEXT: global_store_dword v2, v0, s[0:1]147; GFX1030-NEXT: s_endpgm148;149; EG-LABEL: udiv_i32:150; EG: ; %bb.0:151; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]152; EG-NEXT: TEX 0 @6153; EG-NEXT: ALU 17, @9, KC0[CB0:0-32], KC1[]154; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1155; EG-NEXT: CF_END156; EG-NEXT: PAD157; EG-NEXT: Fetch clause starting at 6:158; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1159; EG-NEXT: ALU clause starting at 8:160; EG-NEXT: MOV * T0.X, KC0[2].Z,161; EG-NEXT: ALU clause starting at 9:162; EG-NEXT: SUB_INT T0.W, 0.0, T0.Y,163; EG-NEXT: RECIP_UINT * T0.Z, T0.Y,164; EG-NEXT: MULLO_INT * T0.W, PV.W, PS,165; EG-NEXT: MULHI * T0.W, T0.Z, PS,166; EG-NEXT: ADD_INT * T0.W, T0.Z, PS,167; EG-NEXT: MULHI * T0.Z, T0.X, PV.W,168; EG-NEXT: MULLO_INT * T0.W, PS, T0.Y,169; EG-NEXT: SUB_INT * T0.W, T0.X, PS,170; EG-NEXT: ADD_INT T1.Z, T0.Z, 1,171; EG-NEXT: SETGE_UINT T1.W, PV.W, T0.Y,172; EG-NEXT: SUB_INT * T2.W, PV.W, T0.Y,173; EG-NEXT: CNDE_INT T0.W, PV.W, T0.W, PS,174; EG-NEXT: CNDE_INT * T1.W, PV.W, T0.Z, PV.Z,175; EG-NEXT: ADD_INT T2.W, PS, 1,176; EG-NEXT: SETGE_UINT * T0.W, PV.W, T0.Y,177; EG-NEXT: CNDE_INT T0.X, PS, T1.W, PV.W,178; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,179; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)180 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1181 %a = load i32, ptr addrspace(1) %in182 %b = load i32, ptr addrspace(1) %b_ptr183 %result = udiv i32 %a, %b184 store i32 %result, ptr addrspace(1) %out185 ret void186}187 188define amdgpu_kernel void @s_udiv_i32(ptr addrspace(1) %out, i32 %a, i32 %b) {189; SI-LABEL: s_udiv_i32:190; SI: ; %bb.0:191; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9192; SI-NEXT: s_waitcnt lgkmcnt(0)193; SI-NEXT: s_mov_b64 s[4:5], s[2:3]194; SI-NEXT: v_cvt_f32_u32_e32 v0, s5195; SI-NEXT: s_sub_i32 s2, 0, s5196; SI-NEXT: s_mov_b32 s3, 0xf000197; SI-NEXT: v_rcp_iflag_f32_e32 v0, v0198; SI-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0199; SI-NEXT: v_cvt_u32_f32_e32 v0, v0200; SI-NEXT: v_mul_lo_u32 v1, s2, v0201; SI-NEXT: s_mov_b32 s2, -1202; SI-NEXT: v_mul_hi_u32 v1, v0, v1203; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v1204; SI-NEXT: v_mul_hi_u32 v0, s4, v0205; SI-NEXT: v_readfirstlane_b32 s6, v0206; SI-NEXT: s_mul_i32 s6, s6, s5207; SI-NEXT: s_sub_i32 s4, s4, s6208; SI-NEXT: s_sub_i32 s6, s4, s5209; SI-NEXT: v_add_i32_e32 v1, vcc, 1, v0210; SI-NEXT: s_cmp_ge_u32 s4, s5211; SI-NEXT: s_cselect_b64 vcc, -1, 0212; SI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc213; SI-NEXT: s_cselect_b32 s4, s6, s4214; SI-NEXT: v_add_i32_e32 v1, vcc, 1, v0215; SI-NEXT: s_cmp_ge_u32 s4, s5216; SI-NEXT: s_cselect_b64 vcc, -1, 0217; SI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc218; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0219; SI-NEXT: s_endpgm220;221; VI-LABEL: s_udiv_i32:222; VI: ; %bb.0:223; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24224; VI-NEXT: s_waitcnt lgkmcnt(0)225; VI-NEXT: s_mov_b64 s[4:5], s[2:3]226; VI-NEXT: v_cvt_f32_u32_e32 v0, s5227; VI-NEXT: s_sub_i32 s2, 0, s5228; VI-NEXT: s_mov_b32 s3, 0xf000229; VI-NEXT: v_rcp_iflag_f32_e32 v0, v0230; VI-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0231; VI-NEXT: v_cvt_u32_f32_e32 v0, v0232; VI-NEXT: v_mul_lo_u32 v1, s2, v0233; VI-NEXT: s_mov_b32 s2, -1234; VI-NEXT: v_mul_hi_u32 v1, v0, v1235; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v1236; VI-NEXT: v_mul_hi_u32 v0, s4, v0237; VI-NEXT: v_readfirstlane_b32 s6, v0238; VI-NEXT: s_mul_i32 s6, s6, s5239; VI-NEXT: s_sub_i32 s4, s4, s6240; VI-NEXT: s_sub_i32 s6, s4, s5241; VI-NEXT: v_add_u32_e32 v1, vcc, 1, v0242; VI-NEXT: s_cmp_ge_u32 s4, s5243; VI-NEXT: s_cselect_b64 vcc, -1, 0244; VI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc245; VI-NEXT: s_cselect_b32 s4, s6, s4246; VI-NEXT: v_add_u32_e32 v1, vcc, 1, v0247; VI-NEXT: s_cmp_ge_u32 s4, s5248; VI-NEXT: s_cselect_b64 vcc, -1, 0249; VI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc250; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0251; VI-NEXT: s_endpgm252;253; GCN-LABEL: s_udiv_i32:254; GCN: ; %bb.0:255; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0256; GCN-NEXT: s_add_i32 s12, s12, s17257; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8258; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13259; GCN-NEXT: s_waitcnt lgkmcnt(0)260; GCN-NEXT: v_cvt_f32_u32_e32 v0, s3261; GCN-NEXT: s_sub_i32 s4, 0, s3262; GCN-NEXT: v_rcp_iflag_f32_e32 v0, v0263; GCN-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0264; GCN-NEXT: v_cvt_u32_f32_e32 v0, v0265; GCN-NEXT: v_mul_lo_u32 v1, s4, v0266; GCN-NEXT: v_mul_hi_u32 v1, v0, v1267; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v1268; GCN-NEXT: v_mul_hi_u32 v0, s2, v0269; GCN-NEXT: v_readfirstlane_b32 s4, v0270; GCN-NEXT: s_mul_i32 s4, s4, s3271; GCN-NEXT: s_sub_i32 s2, s2, s4272; GCN-NEXT: s_sub_i32 s4, s2, s3273; GCN-NEXT: v_add_u32_e32 v1, vcc, 1, v0274; GCN-NEXT: s_cmp_ge_u32 s2, s3275; GCN-NEXT: s_cselect_b64 vcc, -1, 0276; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc277; GCN-NEXT: s_cselect_b32 s2, s4, s2278; GCN-NEXT: v_add_u32_e32 v1, vcc, 1, v0279; GCN-NEXT: s_cmp_ge_u32 s2, s3280; GCN-NEXT: s_cselect_b64 vcc, -1, 0281; GCN-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc282; GCN-NEXT: v_mov_b32_e32 v0, s0283; GCN-NEXT: v_mov_b32_e32 v1, s1284; GCN-NEXT: flat_store_dword v[0:1], v2285; GCN-NEXT: s_endpgm286;287; GFX1030-LABEL: s_udiv_i32:288; GFX1030: ; %bb.0:289; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0290; GFX1030-NEXT: s_waitcnt lgkmcnt(0)291; GFX1030-NEXT: v_cvt_f32_u32_e32 v0, s3292; GFX1030-NEXT: s_sub_i32 s5, 0, s3293; GFX1030-NEXT: v_rcp_iflag_f32_e32 v0, v0294; GFX1030-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0295; GFX1030-NEXT: v_cvt_u32_f32_e32 v0, v0296; GFX1030-NEXT: v_readfirstlane_b32 s4, v0297; GFX1030-NEXT: v_mov_b32_e32 v0, 0298; GFX1030-NEXT: s_mul_i32 s5, s5, s4299; GFX1030-NEXT: s_mul_hi_u32 s5, s4, s5300; GFX1030-NEXT: s_add_i32 s4, s4, s5301; GFX1030-NEXT: s_mul_hi_u32 s4, s2, s4302; GFX1030-NEXT: s_mul_i32 s5, s4, s3303; GFX1030-NEXT: s_sub_i32 s2, s2, s5304; GFX1030-NEXT: s_add_i32 s5, s4, 1305; GFX1030-NEXT: s_sub_i32 s6, s2, s3306; GFX1030-NEXT: s_cmp_ge_u32 s2, s3307; GFX1030-NEXT: s_cselect_b32 s4, s5, s4308; GFX1030-NEXT: s_cselect_b32 s2, s6, s2309; GFX1030-NEXT: s_add_i32 s5, s4, 1310; GFX1030-NEXT: s_cmp_ge_u32 s2, s3311; GFX1030-NEXT: s_cselect_b32 s2, s5, s4312; GFX1030-NEXT: v_mov_b32_e32 v1, s2313; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]314; GFX1030-NEXT: s_endpgm315;316; EG-LABEL: s_udiv_i32:317; EG: ; %bb.0:318; EG-NEXT: ALU 17, @4, KC0[CB0:0-32], KC1[]319; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1320; EG-NEXT: CF_END321; EG-NEXT: PAD322; EG-NEXT: ALU clause starting at 4:323; EG-NEXT: SUB_INT T0.W, 0.0, KC0[2].W,324; EG-NEXT: RECIP_UINT * T0.X, KC0[2].W,325; EG-NEXT: MULLO_INT * T0.Y, PV.W, PS,326; EG-NEXT: MULHI * T0.Y, T0.X, PS,327; EG-NEXT: ADD_INT * T0.W, T0.X, PS,328; EG-NEXT: MULHI * T0.X, KC0[2].Z, PV.W,329; EG-NEXT: MULLO_INT * T0.Y, PS, KC0[2].W,330; EG-NEXT: SUB_INT * T0.W, KC0[2].Z, PS,331; EG-NEXT: SUB_INT T0.Z, PV.W, KC0[2].W,332; EG-NEXT: SETGE_UINT T1.W, PV.W, KC0[2].W,333; EG-NEXT: ADD_INT * T2.W, T0.X, 1,334; EG-NEXT: CNDE_INT T2.W, PV.W, T0.X, PS,335; EG-NEXT: CNDE_INT * T0.W, PV.W, T0.W, PV.Z,336; EG-NEXT: SETGE_UINT T0.W, PS, KC0[2].W,337; EG-NEXT: ADD_INT * T1.W, PV.W, 1,338; EG-NEXT: CNDE_INT T0.X, PV.W, T2.W, PS,339; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,340; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)341 %result = udiv i32 %a, %b342 store i32 %result, ptr addrspace(1) %out343 ret void344}345 346 347; The code generated by udiv is long and complex and may frequently348; change. The goal of this test is to make sure the ISel doesn't fail349; when it gets a v4i32 udiv350define amdgpu_kernel void @udiv_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {351; SI-LABEL: udiv_v2i32:352; SI: ; %bb.0:353; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9354; SI-NEXT: s_mov_b32 s7, 0xf000355; SI-NEXT: s_mov_b32 s6, -1356; SI-NEXT: s_mov_b32 s10, s6357; SI-NEXT: s_mov_b32 s11, s7358; SI-NEXT: s_waitcnt lgkmcnt(0)359; SI-NEXT: s_mov_b32 s8, s2360; SI-NEXT: s_mov_b32 s9, s3361; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0362; SI-NEXT: s_mov_b32 s4, s0363; SI-NEXT: s_mov_b32 s5, s1364; SI-NEXT: s_waitcnt vmcnt(0)365; SI-NEXT: v_cvt_f32_u32_e32 v4, v2366; SI-NEXT: v_cvt_f32_u32_e32 v5, v3367; SI-NEXT: v_sub_i32_e32 v6, vcc, 0, v2368; SI-NEXT: v_rcp_iflag_f32_e32 v4, v4369; SI-NEXT: v_rcp_iflag_f32_e32 v5, v5370; SI-NEXT: v_sub_i32_e32 v7, vcc, 0, v3371; SI-NEXT: v_mul_f32_e32 v4, 0x4f7ffffe, v4372; SI-NEXT: v_mul_f32_e32 v5, 0x4f7ffffe, v5373; SI-NEXT: v_cvt_u32_f32_e32 v4, v4374; SI-NEXT: v_cvt_u32_f32_e32 v5, v5375; SI-NEXT: v_mul_lo_u32 v6, v6, v4376; SI-NEXT: v_mul_lo_u32 v7, v7, v5377; SI-NEXT: v_mul_hi_u32 v6, v4, v6378; SI-NEXT: v_mul_hi_u32 v7, v5, v7379; SI-NEXT: v_add_i32_e32 v4, vcc, v4, v6380; SI-NEXT: v_add_i32_e32 v5, vcc, v5, v7381; SI-NEXT: v_mul_hi_u32 v4, v0, v4382; SI-NEXT: v_mul_hi_u32 v5, v1, v5383; SI-NEXT: v_mul_lo_u32 v6, v4, v2384; SI-NEXT: v_mul_lo_u32 v8, v5, v3385; SI-NEXT: v_add_i32_e32 v7, vcc, 1, v4386; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v6387; SI-NEXT: v_sub_i32_e32 v1, vcc, v1, v8388; SI-NEXT: v_add_i32_e32 v9, vcc, 1, v5389; SI-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v2390; SI-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v3391; SI-NEXT: v_sub_i32_e32 v6, vcc, v0, v2392; SI-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[0:1]393; SI-NEXT: v_sub_i32_e32 v7, vcc, v1, v3394; SI-NEXT: v_cndmask_b32_e64 v5, v5, v9, s[2:3]395; SI-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1]396; SI-NEXT: v_add_i32_e32 v6, vcc, 1, v4397; SI-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[2:3]398; SI-NEXT: v_add_i32_e32 v7, vcc, 1, v5399; SI-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2400; SI-NEXT: v_cndmask_b32_e32 v0, v4, v6, vcc401; SI-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3402; SI-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc403; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0404; SI-NEXT: s_endpgm405;406; VI-LABEL: udiv_v2i32:407; VI: ; %bb.0:408; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24409; VI-NEXT: s_mov_b32 s7, 0xf000410; VI-NEXT: s_mov_b32 s6, -1411; VI-NEXT: s_mov_b32 s10, s6412; VI-NEXT: s_mov_b32 s11, s7413; VI-NEXT: s_waitcnt lgkmcnt(0)414; VI-NEXT: s_mov_b32 s8, s2415; VI-NEXT: s_mov_b32 s9, s3416; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[8:11], 0417; VI-NEXT: s_mov_b32 s4, s0418; VI-NEXT: s_mov_b32 s5, s1419; VI-NEXT: s_waitcnt vmcnt(0)420; VI-NEXT: v_cvt_f32_u32_e32 v4, v2421; VI-NEXT: v_cvt_f32_u32_e32 v5, v3422; VI-NEXT: v_sub_u32_e32 v6, vcc, 0, v2423; VI-NEXT: v_rcp_iflag_f32_e32 v4, v4424; VI-NEXT: v_rcp_iflag_f32_e32 v5, v5425; VI-NEXT: v_sub_u32_e32 v7, vcc, 0, v3426; VI-NEXT: v_mul_f32_e32 v4, 0x4f7ffffe, v4427; VI-NEXT: v_mul_f32_e32 v5, 0x4f7ffffe, v5428; VI-NEXT: v_cvt_u32_f32_e32 v4, v4429; VI-NEXT: v_cvt_u32_f32_e32 v5, v5430; VI-NEXT: v_mul_lo_u32 v6, v6, v4431; VI-NEXT: v_mul_lo_u32 v7, v7, v5432; VI-NEXT: v_mul_hi_u32 v6, v4, v6433; VI-NEXT: v_mul_hi_u32 v7, v5, v7434; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v6435; VI-NEXT: v_add_u32_e32 v5, vcc, v5, v7436; VI-NEXT: v_mul_hi_u32 v4, v0, v4437; VI-NEXT: v_mul_hi_u32 v5, v1, v5438; VI-NEXT: v_mul_lo_u32 v6, v4, v2439; VI-NEXT: v_mul_lo_u32 v8, v5, v3440; VI-NEXT: v_add_u32_e32 v7, vcc, 1, v4441; VI-NEXT: v_sub_u32_e32 v0, vcc, v0, v6442; VI-NEXT: v_sub_u32_e32 v1, vcc, v1, v8443; VI-NEXT: v_add_u32_e32 v9, vcc, 1, v5444; VI-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v2445; VI-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v3446; VI-NEXT: v_sub_u32_e32 v6, vcc, v0, v2447; VI-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[0:1]448; VI-NEXT: v_sub_u32_e32 v7, vcc, v1, v3449; VI-NEXT: v_cndmask_b32_e64 v5, v5, v9, s[2:3]450; VI-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1]451; VI-NEXT: v_add_u32_e32 v6, vcc, 1, v4452; VI-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[2:3]453; VI-NEXT: v_add_u32_e32 v7, vcc, 1, v5454; VI-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2455; VI-NEXT: v_cndmask_b32_e32 v0, v4, v6, vcc456; VI-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3457; VI-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc458; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0459; VI-NEXT: s_endpgm460;461; GCN-LABEL: udiv_v2i32:462; GCN: ; %bb.0:463; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0464; GCN-NEXT: s_add_i32 s12, s12, s17465; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13466; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8467; GCN-NEXT: s_waitcnt lgkmcnt(0)468; GCN-NEXT: v_mov_b32_e32 v0, s2469; GCN-NEXT: v_mov_b32_e32 v1, s3470; GCN-NEXT: flat_load_dwordx4 v[0:3], v[0:1]471; GCN-NEXT: s_waitcnt vmcnt(0)472; GCN-NEXT: v_cvt_f32_u32_e32 v4, v2473; GCN-NEXT: v_cvt_f32_u32_e32 v5, v3474; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v4475; GCN-NEXT: v_rcp_iflag_f32_e32 v5, v5476; GCN-NEXT: v_mul_f32_e32 v4, 0x4f7ffffe, v4477; GCN-NEXT: v_cvt_u32_f32_e32 v6, v4478; GCN-NEXT: v_mul_f32_e32 v5, 0x4f7ffffe, v5479; GCN-NEXT: v_cvt_u32_f32_e32 v7, v5480; GCN-NEXT: v_sub_u32_e32 v4, vcc, 0, v2481; GCN-NEXT: v_mul_lo_u32 v5, v4, v6482; GCN-NEXT: v_sub_u32_e32 v4, vcc, 0, v3483; GCN-NEXT: v_mul_lo_u32 v8, v4, v7484; GCN-NEXT: v_mul_hi_u32 v9, v6, v5485; GCN-NEXT: v_mov_b32_e32 v4, s0486; GCN-NEXT: v_mov_b32_e32 v5, s1487; GCN-NEXT: v_mul_hi_u32 v8, v7, v8488; GCN-NEXT: v_add_u32_e32 v6, vcc, v6, v9489; GCN-NEXT: v_mul_hi_u32 v6, v0, v6490; GCN-NEXT: v_add_u32_e32 v7, vcc, v7, v8491; GCN-NEXT: v_mul_hi_u32 v7, v1, v7492; GCN-NEXT: v_mul_lo_u32 v8, v6, v2493; GCN-NEXT: v_add_u32_e32 v9, vcc, 1, v6494; GCN-NEXT: v_mul_lo_u32 v10, v7, v3495; GCN-NEXT: v_sub_u32_e32 v0, vcc, v0, v8496; GCN-NEXT: v_add_u32_e32 v11, vcc, 1, v7497; GCN-NEXT: v_sub_u32_e32 v1, vcc, v1, v10498; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v0, v2499; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v1, v3500; GCN-NEXT: v_sub_u32_e32 v8, vcc, v0, v2501; GCN-NEXT: v_cndmask_b32_e64 v6, v6, v9, s[0:1]502; GCN-NEXT: v_sub_u32_e32 v9, vcc, v1, v3503; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v11, s[2:3]504; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v8, s[0:1]505; GCN-NEXT: v_add_u32_e32 v8, vcc, 1, v6506; GCN-NEXT: v_cndmask_b32_e64 v1, v1, v9, s[2:3]507; GCN-NEXT: v_add_u32_e32 v9, vcc, 1, v7508; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2509; GCN-NEXT: v_cndmask_b32_e32 v0, v6, v8, vcc510; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v1, v3511; GCN-NEXT: v_cndmask_b32_e32 v1, v7, v9, vcc512; GCN-NEXT: flat_store_dwordx2 v[4:5], v[0:1]513; GCN-NEXT: s_endpgm514;515; GFX1030-LABEL: udiv_v2i32:516; GFX1030: ; %bb.0:517; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0518; GFX1030-NEXT: v_mov_b32_e32 v4, 0519; GFX1030-NEXT: s_waitcnt lgkmcnt(0)520; GFX1030-NEXT: global_load_dwordx4 v[0:3], v4, s[2:3]521; GFX1030-NEXT: s_waitcnt vmcnt(0)522; GFX1030-NEXT: v_readfirstlane_b32 s2, v2523; GFX1030-NEXT: v_readfirstlane_b32 s3, v3524; GFX1030-NEXT: v_readfirstlane_b32 s6, v0525; GFX1030-NEXT: v_cvt_f32_u32_e32 v2, s2526; GFX1030-NEXT: v_cvt_f32_u32_e32 v3, s3527; GFX1030-NEXT: s_sub_i32 s5, 0, s2528; GFX1030-NEXT: v_rcp_iflag_f32_e32 v2, v2529; GFX1030-NEXT: v_rcp_iflag_f32_e32 v3, v3530; GFX1030-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2531; GFX1030-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v3532; GFX1030-NEXT: v_cvt_u32_f32_e32 v2, v2533; GFX1030-NEXT: v_cvt_u32_f32_e32 v0, v0534; GFX1030-NEXT: v_readfirstlane_b32 s4, v2535; GFX1030-NEXT: v_readfirstlane_b32 s8, v0536; GFX1030-NEXT: s_mul_i32 s5, s5, s4537; GFX1030-NEXT: s_mul_hi_u32 s5, s4, s5538; GFX1030-NEXT: s_add_i32 s4, s4, s5539; GFX1030-NEXT: s_mul_hi_u32 s4, s6, s4540; GFX1030-NEXT: s_mul_i32 s5, s4, s2541; GFX1030-NEXT: s_sub_i32 s5, s6, s5542; GFX1030-NEXT: s_add_i32 s6, s4, 1543; GFX1030-NEXT: s_sub_i32 s7, s5, s2544; GFX1030-NEXT: s_cmp_ge_u32 s5, s2545; GFX1030-NEXT: s_cselect_b32 s4, s6, s4546; GFX1030-NEXT: s_cselect_b32 s5, s7, s5547; GFX1030-NEXT: s_add_i32 s6, s4, 1548; GFX1030-NEXT: s_cmp_ge_u32 s5, s2549; GFX1030-NEXT: v_readfirstlane_b32 s5, v1550; GFX1030-NEXT: s_cselect_b32 s2, s6, s4551; GFX1030-NEXT: s_sub_i32 s4, 0, s3552; GFX1030-NEXT: v_mov_b32_e32 v0, s2553; GFX1030-NEXT: s_mul_i32 s4, s4, s8554; GFX1030-NEXT: s_mul_hi_u32 s4, s8, s4555; GFX1030-NEXT: s_add_i32 s8, s8, s4556; GFX1030-NEXT: s_mul_hi_u32 s4, s5, s8557; GFX1030-NEXT: s_mul_i32 s6, s4, s3558; GFX1030-NEXT: s_sub_i32 s5, s5, s6559; GFX1030-NEXT: s_add_i32 s6, s4, 1560; GFX1030-NEXT: s_sub_i32 s7, s5, s3561; GFX1030-NEXT: s_cmp_ge_u32 s5, s3562; GFX1030-NEXT: s_cselect_b32 s4, s6, s4563; GFX1030-NEXT: s_cselect_b32 s5, s7, s5564; GFX1030-NEXT: s_add_i32 s6, s4, 1565; GFX1030-NEXT: s_cmp_ge_u32 s5, s3566; GFX1030-NEXT: s_cselect_b32 s3, s6, s4567; GFX1030-NEXT: v_mov_b32_e32 v1, s3568; GFX1030-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1]569; GFX1030-NEXT: s_endpgm570;571; EG-LABEL: udiv_v2i32:572; EG: ; %bb.0:573; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]574; EG-NEXT: TEX 0 @6575; EG-NEXT: ALU 33, @9, KC0[CB0:0-32], KC1[]576; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XY, T0.X, 1577; EG-NEXT: CF_END578; EG-NEXT: PAD579; EG-NEXT: Fetch clause starting at 6:580; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1581; EG-NEXT: ALU clause starting at 8:582; EG-NEXT: MOV * T0.X, KC0[2].Z,583; EG-NEXT: ALU clause starting at 9:584; EG-NEXT: SUB_INT T1.W, 0.0, T0.W,585; EG-NEXT: RECIP_UINT * T1.X, T0.W,586; EG-NEXT: MULLO_INT * T1.Y, PV.W, PS,587; EG-NEXT: SUB_INT T1.W, 0.0, T0.Z,588; EG-NEXT: RECIP_UINT * T1.Z, T0.Z,589; EG-NEXT: MULLO_INT * T1.W, PV.W, PS,590; EG-NEXT: MULHI * T1.W, T1.Z, PS,591; EG-NEXT: ADD_INT T1.W, T1.Z, PS,592; EG-NEXT: MULHI * T1.Y, T1.X, T1.Y,593; EG-NEXT: ADD_INT T2.W, T1.X, PS,594; EG-NEXT: MULHI * T1.X, T0.X, PV.W,595; EG-NEXT: MULHI * T1.Y, T0.Y, PV.W,596; EG-NEXT: MULLO_INT * T1.Z, PS, T0.W,597; EG-NEXT: SUB_INT T1.W, T0.Y, PS,598; EG-NEXT: MULLO_INT * T0.Y, T1.X, T0.Z,599; EG-NEXT: SUB_INT T0.Y, T0.X, PS,600; EG-NEXT: ADD_INT T1.Z, T1.Y, 1,601; EG-NEXT: SETGE_UINT T2.W, PV.W, T0.W,602; EG-NEXT: SUB_INT * T3.W, PV.W, T0.W,603; EG-NEXT: CNDE_INT T0.X, PV.W, T1.W, PS,604; EG-NEXT: CNDE_INT T1.Y, PV.W, T1.Y, PV.Z,605; EG-NEXT: ADD_INT T1.Z, T1.X, 1,606; EG-NEXT: SETGE_UINT T1.W, PV.Y, T0.Z,607; EG-NEXT: SUB_INT * T2.W, PV.Y, T0.Z,608; EG-NEXT: CNDE_INT T0.Y, PV.W, T0.Y, PS,609; EG-NEXT: CNDE_INT T1.Z, PV.W, T1.X, PV.Z,610; EG-NEXT: ADD_INT T1.W, PV.Y, 1,611; EG-NEXT: SETGE_UINT * T0.W, PV.X, T0.W,612; EG-NEXT: CNDE_INT T1.Y, PS, T1.Y, PV.W,613; EG-NEXT: ADD_INT T0.W, PV.Z, 1,614; EG-NEXT: SETGE_UINT * T1.W, PV.Y, T0.Z,615; EG-NEXT: CNDE_INT T1.X, PS, T1.Z, PV.W,616; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,617; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)618 %b_ptr = getelementptr <2 x i32>, ptr addrspace(1) %in, i32 1619 %a = load <2 x i32>, ptr addrspace(1) %in620 %b = load <2 x i32>, ptr addrspace(1) %b_ptr621 %result = udiv <2 x i32> %a, %b622 store <2 x i32> %result, ptr addrspace(1) %out623 ret void624}625 626define amdgpu_kernel void @udiv_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {627; SI-LABEL: udiv_v4i32:628; SI: ; %bb.0:629; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9630; SI-NEXT: s_mov_b32 s11, 0xf000631; SI-NEXT: s_mov_b32 s10, -1632; SI-NEXT: s_mov_b32 s6, s10633; SI-NEXT: s_mov_b32 s7, s11634; SI-NEXT: s_waitcnt lgkmcnt(0)635; SI-NEXT: s_mov_b32 s4, s2636; SI-NEXT: s_mov_b32 s5, s3637; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 offset:16638; SI-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0639; SI-NEXT: s_mov_b32 s8, s0640; SI-NEXT: s_mov_b32 s9, s1641; SI-NEXT: s_waitcnt vmcnt(1)642; SI-NEXT: v_cvt_f32_u32_e32 v8, v0643; SI-NEXT: v_cvt_f32_u32_e32 v10, v1644; SI-NEXT: v_cvt_f32_u32_e32 v12, v2645; SI-NEXT: v_cvt_f32_u32_e32 v14, v3646; SI-NEXT: v_rcp_iflag_f32_e32 v8, v8647; SI-NEXT: v_rcp_iflag_f32_e32 v10, v10648; SI-NEXT: v_rcp_iflag_f32_e32 v12, v12649; SI-NEXT: v_rcp_iflag_f32_e32 v14, v14650; SI-NEXT: v_mul_f32_e32 v8, 0x4f7ffffe, v8651; SI-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10652; SI-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12653; SI-NEXT: v_mul_f32_e32 v14, 0x4f7ffffe, v14654; SI-NEXT: v_cvt_u32_f32_e32 v8, v8655; SI-NEXT: v_cvt_u32_f32_e32 v10, v10656; SI-NEXT: v_cvt_u32_f32_e32 v12, v12657; SI-NEXT: v_cvt_u32_f32_e32 v14, v14658; SI-NEXT: v_sub_i32_e32 v9, vcc, 0, v0659; SI-NEXT: v_sub_i32_e32 v11, vcc, 0, v1660; SI-NEXT: v_sub_i32_e32 v13, vcc, 0, v2661; SI-NEXT: v_sub_i32_e32 v15, vcc, 0, v3662; SI-NEXT: v_mul_lo_u32 v9, v9, v8663; SI-NEXT: v_mul_lo_u32 v11, v11, v10664; SI-NEXT: v_mul_lo_u32 v13, v13, v12665; SI-NEXT: v_mul_lo_u32 v15, v15, v14666; SI-NEXT: v_mul_hi_u32 v9, v8, v9667; SI-NEXT: v_mul_hi_u32 v11, v10, v11668; SI-NEXT: v_mul_hi_u32 v13, v12, v13669; SI-NEXT: v_mul_hi_u32 v15, v14, v15670; SI-NEXT: v_add_i32_e32 v8, vcc, v8, v9671; SI-NEXT: v_add_i32_e32 v9, vcc, v10, v11672; SI-NEXT: v_add_i32_e32 v10, vcc, v12, v13673; SI-NEXT: v_add_i32_e32 v11, vcc, v14, v15674; SI-NEXT: s_waitcnt vmcnt(0)675; SI-NEXT: v_mul_hi_u32 v8, v4, v8676; SI-NEXT: v_mul_hi_u32 v9, v5, v9677; SI-NEXT: v_mul_hi_u32 v10, v6, v10678; SI-NEXT: v_mul_hi_u32 v11, v7, v11679; SI-NEXT: v_mul_lo_u32 v12, v8, v0680; SI-NEXT: v_mul_lo_u32 v14, v9, v1681; SI-NEXT: v_mul_lo_u32 v16, v10, v2682; SI-NEXT: v_mul_lo_u32 v18, v11, v3683; SI-NEXT: v_sub_i32_e32 v4, vcc, v4, v12684; SI-NEXT: v_sub_i32_e32 v5, vcc, v5, v14685; SI-NEXT: v_sub_i32_e32 v6, vcc, v6, v16686; SI-NEXT: v_sub_i32_e32 v7, vcc, v7, v18687; SI-NEXT: v_add_i32_e32 v13, vcc, 1, v8688; SI-NEXT: v_add_i32_e32 v15, vcc, 1, v9689; SI-NEXT: v_add_i32_e32 v17, vcc, 1, v10690; SI-NEXT: v_add_i32_e32 v19, vcc, 1, v11691; SI-NEXT: v_cmp_ge_u32_e64 s[0:1], v4, v0692; SI-NEXT: v_cmp_ge_u32_e64 s[2:3], v5, v1693; SI-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v2694; SI-NEXT: v_cmp_ge_u32_e64 s[6:7], v7, v3695; SI-NEXT: v_sub_i32_e32 v12, vcc, v4, v0696; SI-NEXT: v_cndmask_b32_e64 v8, v8, v13, s[0:1]697; SI-NEXT: v_sub_i32_e32 v13, vcc, v5, v1698; SI-NEXT: v_cndmask_b32_e64 v9, v9, v15, s[2:3]699; SI-NEXT: v_sub_i32_e32 v14, vcc, v6, v2700; SI-NEXT: v_cndmask_b32_e64 v10, v10, v17, s[4:5]701; SI-NEXT: v_sub_i32_e32 v15, vcc, v7, v3702; SI-NEXT: v_cndmask_b32_e64 v11, v11, v19, s[6:7]703; SI-NEXT: v_cndmask_b32_e64 v4, v4, v12, s[0:1]704; SI-NEXT: v_add_i32_e32 v12, vcc, 1, v8705; SI-NEXT: v_cndmask_b32_e64 v5, v5, v13, s[2:3]706; SI-NEXT: v_add_i32_e32 v13, vcc, 1, v9707; SI-NEXT: v_cndmask_b32_e64 v6, v6, v14, s[4:5]708; SI-NEXT: v_add_i32_e32 v14, vcc, 1, v10709; SI-NEXT: v_cndmask_b32_e64 v7, v7, v15, s[6:7]710; SI-NEXT: v_add_i32_e32 v15, vcc, 1, v11711; SI-NEXT: v_cmp_ge_u32_e32 vcc, v4, v0712; SI-NEXT: v_cndmask_b32_e32 v0, v8, v12, vcc713; SI-NEXT: v_cmp_ge_u32_e32 vcc, v5, v1714; SI-NEXT: v_cndmask_b32_e32 v1, v9, v13, vcc715; SI-NEXT: v_cmp_ge_u32_e32 vcc, v6, v2716; SI-NEXT: v_cndmask_b32_e32 v2, v10, v14, vcc717; SI-NEXT: v_cmp_ge_u32_e32 vcc, v7, v3718; SI-NEXT: v_cndmask_b32_e32 v3, v11, v15, vcc719; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0720; SI-NEXT: s_endpgm721;722; VI-LABEL: udiv_v4i32:723; VI: ; %bb.0:724; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24725; VI-NEXT: s_mov_b32 s11, 0xf000726; VI-NEXT: s_mov_b32 s10, -1727; VI-NEXT: s_mov_b32 s6, s10728; VI-NEXT: s_mov_b32 s7, s11729; VI-NEXT: s_waitcnt lgkmcnt(0)730; VI-NEXT: s_mov_b32 s4, s2731; VI-NEXT: s_mov_b32 s5, s3732; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0 offset:16733; VI-NEXT: buffer_load_dwordx4 v[4:7], off, s[4:7], 0734; VI-NEXT: s_mov_b32 s8, s0735; VI-NEXT: s_mov_b32 s9, s1736; VI-NEXT: s_waitcnt vmcnt(1)737; VI-NEXT: v_cvt_f32_u32_e32 v8, v0738; VI-NEXT: v_cvt_f32_u32_e32 v10, v1739; VI-NEXT: v_cvt_f32_u32_e32 v12, v2740; VI-NEXT: v_cvt_f32_u32_e32 v14, v3741; VI-NEXT: v_rcp_iflag_f32_e32 v8, v8742; VI-NEXT: v_rcp_iflag_f32_e32 v10, v10743; VI-NEXT: v_rcp_iflag_f32_e32 v12, v12744; VI-NEXT: v_rcp_iflag_f32_e32 v14, v14745; VI-NEXT: v_mul_f32_e32 v8, 0x4f7ffffe, v8746; VI-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10747; VI-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12748; VI-NEXT: v_mul_f32_e32 v14, 0x4f7ffffe, v14749; VI-NEXT: v_cvt_u32_f32_e32 v8, v8750; VI-NEXT: v_cvt_u32_f32_e32 v10, v10751; VI-NEXT: v_cvt_u32_f32_e32 v12, v12752; VI-NEXT: v_cvt_u32_f32_e32 v14, v14753; VI-NEXT: v_sub_u32_e32 v9, vcc, 0, v0754; VI-NEXT: v_sub_u32_e32 v11, vcc, 0, v1755; VI-NEXT: v_sub_u32_e32 v13, vcc, 0, v2756; VI-NEXT: v_sub_u32_e32 v15, vcc, 0, v3757; VI-NEXT: v_mul_lo_u32 v9, v9, v8758; VI-NEXT: v_mul_lo_u32 v11, v11, v10759; VI-NEXT: v_mul_lo_u32 v13, v13, v12760; VI-NEXT: v_mul_lo_u32 v15, v15, v14761; VI-NEXT: v_mul_hi_u32 v9, v8, v9762; VI-NEXT: v_mul_hi_u32 v11, v10, v11763; VI-NEXT: v_mul_hi_u32 v13, v12, v13764; VI-NEXT: v_mul_hi_u32 v15, v14, v15765; VI-NEXT: v_add_u32_e32 v8, vcc, v8, v9766; VI-NEXT: v_add_u32_e32 v9, vcc, v10, v11767; VI-NEXT: v_add_u32_e32 v10, vcc, v12, v13768; VI-NEXT: v_add_u32_e32 v11, vcc, v14, v15769; VI-NEXT: s_waitcnt vmcnt(0)770; VI-NEXT: v_mul_hi_u32 v8, v4, v8771; VI-NEXT: v_mul_hi_u32 v9, v5, v9772; VI-NEXT: v_mul_hi_u32 v10, v6, v10773; VI-NEXT: v_mul_hi_u32 v11, v7, v11774; VI-NEXT: v_mul_lo_u32 v12, v8, v0775; VI-NEXT: v_mul_lo_u32 v14, v9, v1776; VI-NEXT: v_mul_lo_u32 v16, v10, v2777; VI-NEXT: v_mul_lo_u32 v18, v11, v3778; VI-NEXT: v_sub_u32_e32 v4, vcc, v4, v12779; VI-NEXT: v_sub_u32_e32 v5, vcc, v5, v14780; VI-NEXT: v_sub_u32_e32 v6, vcc, v6, v16781; VI-NEXT: v_sub_u32_e32 v7, vcc, v7, v18782; VI-NEXT: v_add_u32_e32 v13, vcc, 1, v8783; VI-NEXT: v_add_u32_e32 v15, vcc, 1, v9784; VI-NEXT: v_add_u32_e32 v17, vcc, 1, v10785; VI-NEXT: v_add_u32_e32 v19, vcc, 1, v11786; VI-NEXT: v_cmp_ge_u32_e64 s[0:1], v4, v0787; VI-NEXT: v_cmp_ge_u32_e64 s[2:3], v5, v1788; VI-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v2789; VI-NEXT: v_cmp_ge_u32_e64 s[6:7], v7, v3790; VI-NEXT: v_sub_u32_e32 v12, vcc, v4, v0791; VI-NEXT: v_cndmask_b32_e64 v8, v8, v13, s[0:1]792; VI-NEXT: v_sub_u32_e32 v13, vcc, v5, v1793; VI-NEXT: v_cndmask_b32_e64 v9, v9, v15, s[2:3]794; VI-NEXT: v_sub_u32_e32 v14, vcc, v6, v2795; VI-NEXT: v_cndmask_b32_e64 v10, v10, v17, s[4:5]796; VI-NEXT: v_sub_u32_e32 v15, vcc, v7, v3797; VI-NEXT: v_cndmask_b32_e64 v11, v11, v19, s[6:7]798; VI-NEXT: v_cndmask_b32_e64 v4, v4, v12, s[0:1]799; VI-NEXT: v_add_u32_e32 v12, vcc, 1, v8800; VI-NEXT: v_cndmask_b32_e64 v5, v5, v13, s[2:3]801; VI-NEXT: v_add_u32_e32 v13, vcc, 1, v9802; VI-NEXT: v_cndmask_b32_e64 v6, v6, v14, s[4:5]803; VI-NEXT: v_add_u32_e32 v14, vcc, 1, v10804; VI-NEXT: v_cndmask_b32_e64 v7, v7, v15, s[6:7]805; VI-NEXT: v_add_u32_e32 v15, vcc, 1, v11806; VI-NEXT: v_cmp_ge_u32_e32 vcc, v4, v0807; VI-NEXT: v_cndmask_b32_e32 v0, v8, v12, vcc808; VI-NEXT: v_cmp_ge_u32_e32 vcc, v5, v1809; VI-NEXT: v_cndmask_b32_e32 v1, v9, v13, vcc810; VI-NEXT: v_cmp_ge_u32_e32 vcc, v6, v2811; VI-NEXT: v_cndmask_b32_e32 v2, v10, v14, vcc812; VI-NEXT: v_cmp_ge_u32_e32 vcc, v7, v3813; VI-NEXT: v_cndmask_b32_e32 v3, v11, v15, vcc814; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0815; VI-NEXT: s_endpgm816;817; GCN-LABEL: udiv_v4i32:818; GCN: ; %bb.0:819; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0820; GCN-NEXT: s_add_i32 s12, s12, s17821; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8822; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13823; GCN-NEXT: s_waitcnt lgkmcnt(0)824; GCN-NEXT: s_add_u32 s4, s2, 16825; GCN-NEXT: s_addc_u32 s5, s3, 0826; GCN-NEXT: v_mov_b32_e32 v0, s4827; GCN-NEXT: v_mov_b32_e32 v1, s5828; GCN-NEXT: flat_load_dwordx4 v[0:3], v[0:1]829; GCN-NEXT: v_mov_b32_e32 v5, s3830; GCN-NEXT: v_mov_b32_e32 v4, s2831; GCN-NEXT: flat_load_dwordx4 v[6:9], v[4:5]832; GCN-NEXT: v_mov_b32_e32 v4, s0833; GCN-NEXT: v_mov_b32_e32 v5, s1834; GCN-NEXT: s_waitcnt vmcnt(1)835; GCN-NEXT: v_cvt_f32_u32_e32 v10, v0836; GCN-NEXT: v_cvt_f32_u32_e32 v12, v1837; GCN-NEXT: v_cvt_f32_u32_e32 v14, v2838; GCN-NEXT: v_cvt_f32_u32_e32 v16, v3839; GCN-NEXT: v_rcp_iflag_f32_e32 v10, v10840; GCN-NEXT: v_rcp_iflag_f32_e32 v12, v12841; GCN-NEXT: v_rcp_iflag_f32_e32 v14, v14842; GCN-NEXT: v_rcp_iflag_f32_e32 v16, v16843; GCN-NEXT: v_mul_f32_e32 v10, 0x4f7ffffe, v10844; GCN-NEXT: v_mul_f32_e32 v12, 0x4f7ffffe, v12845; GCN-NEXT: v_mul_f32_e32 v14, 0x4f7ffffe, v14846; GCN-NEXT: v_mul_f32_e32 v16, 0x4f7ffffe, v16847; GCN-NEXT: v_cvt_u32_f32_e32 v10, v10848; GCN-NEXT: v_cvt_u32_f32_e32 v12, v12849; GCN-NEXT: v_cvt_u32_f32_e32 v14, v14850; GCN-NEXT: v_cvt_u32_f32_e32 v16, v16851; GCN-NEXT: v_sub_u32_e32 v11, vcc, 0, v0852; GCN-NEXT: v_sub_u32_e32 v13, vcc, 0, v1853; GCN-NEXT: v_sub_u32_e32 v15, vcc, 0, v2854; GCN-NEXT: v_sub_u32_e32 v17, vcc, 0, v3855; GCN-NEXT: v_mul_lo_u32 v11, v11, v10856; GCN-NEXT: v_mul_lo_u32 v13, v13, v12857; GCN-NEXT: v_mul_lo_u32 v15, v15, v14858; GCN-NEXT: v_mul_lo_u32 v17, v17, v16859; GCN-NEXT: v_mul_hi_u32 v11, v10, v11860; GCN-NEXT: v_mul_hi_u32 v13, v12, v13861; GCN-NEXT: v_mul_hi_u32 v15, v14, v15862; GCN-NEXT: v_mul_hi_u32 v17, v16, v17863; GCN-NEXT: v_add_u32_e32 v10, vcc, v10, v11864; GCN-NEXT: v_add_u32_e32 v11, vcc, v12, v13865; GCN-NEXT: v_add_u32_e32 v12, vcc, v14, v15866; GCN-NEXT: v_add_u32_e32 v13, vcc, v16, v17867; GCN-NEXT: s_waitcnt vmcnt(0)868; GCN-NEXT: v_mul_hi_u32 v10, v6, v10869; GCN-NEXT: v_mul_hi_u32 v11, v7, v11870; GCN-NEXT: v_mul_hi_u32 v12, v8, v12871; GCN-NEXT: v_mul_hi_u32 v13, v9, v13872; GCN-NEXT: v_mul_lo_u32 v14, v10, v0873; GCN-NEXT: v_mul_lo_u32 v16, v11, v1874; GCN-NEXT: v_mul_lo_u32 v18, v12, v2875; GCN-NEXT: v_mul_lo_u32 v19, v13, v3876; GCN-NEXT: v_sub_u32_e32 v6, vcc, v6, v14877; GCN-NEXT: v_sub_u32_e32 v7, vcc, v7, v16878; GCN-NEXT: v_sub_u32_e32 v8, vcc, v8, v18879; GCN-NEXT: v_sub_u32_e32 v9, vcc, v9, v19880; GCN-NEXT: v_add_u32_e32 v15, vcc, 1, v10881; GCN-NEXT: v_add_u32_e32 v17, vcc, 1, v11882; GCN-NEXT: v_add_u32_e32 v14, vcc, 1, v12883; GCN-NEXT: v_add_u32_e32 v16, vcc, 1, v13884; GCN-NEXT: v_cmp_ge_u32_e64 s[0:1], v6, v0885; GCN-NEXT: v_cmp_ge_u32_e64 s[2:3], v7, v1886; GCN-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v2887; GCN-NEXT: v_cmp_ge_u32_e64 s[6:7], v9, v3888; GCN-NEXT: v_sub_u32_e32 v18, vcc, v6, v0889; GCN-NEXT: v_cndmask_b32_e64 v10, v10, v15, s[0:1]890; GCN-NEXT: v_sub_u32_e32 v15, vcc, v7, v1891; GCN-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[2:3]892; GCN-NEXT: v_sub_u32_e32 v17, vcc, v8, v2893; GCN-NEXT: v_cndmask_b32_e64 v12, v12, v14, s[4:5]894; GCN-NEXT: v_sub_u32_e32 v14, vcc, v9, v3895; GCN-NEXT: v_cndmask_b32_e64 v13, v13, v16, s[6:7]896; GCN-NEXT: v_cndmask_b32_e64 v6, v6, v18, s[0:1]897; GCN-NEXT: v_add_u32_e32 v16, vcc, 1, v10898; GCN-NEXT: v_cndmask_b32_e64 v7, v7, v15, s[2:3]899; GCN-NEXT: v_add_u32_e32 v15, vcc, 1, v11900; GCN-NEXT: v_cndmask_b32_e64 v8, v8, v17, s[4:5]901; GCN-NEXT: v_add_u32_e32 v17, vcc, 1, v12902; GCN-NEXT: v_cndmask_b32_e64 v9, v9, v14, s[6:7]903; GCN-NEXT: v_add_u32_e32 v14, vcc, 1, v13904; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v6, v0905; GCN-NEXT: v_cndmask_b32_e32 v0, v10, v16, vcc906; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v7, v1907; GCN-NEXT: v_cndmask_b32_e32 v1, v11, v15, vcc908; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v8, v2909; GCN-NEXT: v_cndmask_b32_e32 v2, v12, v17, vcc910; GCN-NEXT: v_cmp_ge_u32_e32 vcc, v9, v3911; GCN-NEXT: v_cndmask_b32_e32 v3, v13, v14, vcc912; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]913; GCN-NEXT: s_endpgm914;915; GFX1030-LABEL: udiv_v4i32:916; GFX1030: ; %bb.0:917; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0918; GFX1030-NEXT: v_mov_b32_e32 v8, 0919; GFX1030-NEXT: s_waitcnt lgkmcnt(0)920; GFX1030-NEXT: s_clause 0x1921; GFX1030-NEXT: global_load_dwordx4 v[0:3], v8, s[2:3] offset:16922; GFX1030-NEXT: global_load_dwordx4 v[4:7], v8, s[2:3]923; GFX1030-NEXT: s_waitcnt vmcnt(1)924; GFX1030-NEXT: v_readfirstlane_b32 s2, v0925; GFX1030-NEXT: v_readfirstlane_b32 s3, v1926; GFX1030-NEXT: s_waitcnt vmcnt(0)927; GFX1030-NEXT: v_readfirstlane_b32 s7, v4928; GFX1030-NEXT: v_readfirstlane_b32 s5, v2929; GFX1030-NEXT: v_cvt_f32_u32_e32 v0, s2930; GFX1030-NEXT: v_cvt_f32_u32_e32 v1, s3931; GFX1030-NEXT: s_sub_i32 s6, 0, s2932; GFX1030-NEXT: v_rcp_iflag_f32_e32 v0, v0933; GFX1030-NEXT: v_rcp_iflag_f32_e32 v1, v1934; GFX1030-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0935; GFX1030-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1936; GFX1030-NEXT: v_cvt_u32_f32_e32 v0, v0937; GFX1030-NEXT: v_cvt_u32_f32_e32 v1, v1938; GFX1030-NEXT: v_readfirstlane_b32 s4, v0939; GFX1030-NEXT: v_cvt_f32_u32_e32 v0, s5940; GFX1030-NEXT: v_readfirstlane_b32 s9, v1941; GFX1030-NEXT: s_mul_i32 s6, s6, s4942; GFX1030-NEXT: v_rcp_iflag_f32_e32 v0, v0943; GFX1030-NEXT: s_mul_hi_u32 s6, s4, s6944; GFX1030-NEXT: s_add_i32 s4, s4, s6945; GFX1030-NEXT: s_mul_hi_u32 s4, s7, s4946; GFX1030-NEXT: s_mul_i32 s6, s4, s2947; GFX1030-NEXT: s_sub_i32 s6, s7, s6948; GFX1030-NEXT: s_add_i32 s7, s4, 1949; GFX1030-NEXT: s_sub_i32 s8, s6, s2950; GFX1030-NEXT: s_cmp_ge_u32 s6, s2951; GFX1030-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0952; GFX1030-NEXT: s_cselect_b32 s4, s7, s4953; GFX1030-NEXT: s_cselect_b32 s6, s8, s6954; GFX1030-NEXT: s_add_i32 s7, s4, 1955; GFX1030-NEXT: s_cmp_ge_u32 s6, s2956; GFX1030-NEXT: v_readfirstlane_b32 s2, v3957; GFX1030-NEXT: s_cselect_b32 s4, s7, s4958; GFX1030-NEXT: s_sub_i32 s6, 0, s3959; GFX1030-NEXT: v_readfirstlane_b32 s7, v5960; GFX1030-NEXT: s_mul_i32 s6, s6, s9961; GFX1030-NEXT: v_cvt_u32_f32_e32 v0, v0962; GFX1030-NEXT: s_mul_hi_u32 s6, s9, s6963; GFX1030-NEXT: v_cvt_f32_u32_e32 v1, s2964; GFX1030-NEXT: s_add_i32 s9, s9, s6965; GFX1030-NEXT: s_mul_hi_u32 s6, s7, s9966; GFX1030-NEXT: v_readfirstlane_b32 s10, v0967; GFX1030-NEXT: s_mul_i32 s8, s6, s3968; GFX1030-NEXT: v_rcp_iflag_f32_e32 v1, v1969; GFX1030-NEXT: s_sub_i32 s7, s7, s8970; GFX1030-NEXT: s_add_i32 s8, s6, 1971; GFX1030-NEXT: s_sub_i32 s9, s7, s3972; GFX1030-NEXT: s_cmp_ge_u32 s7, s3973; GFX1030-NEXT: s_cselect_b32 s6, s8, s6974; GFX1030-NEXT: s_cselect_b32 s7, s9, s7975; GFX1030-NEXT: s_add_i32 s8, s6, 1976; GFX1030-NEXT: s_cmp_ge_u32 s7, s3977; GFX1030-NEXT: v_readfirstlane_b32 s7, v6978; GFX1030-NEXT: s_cselect_b32 s3, s8, s6979; GFX1030-NEXT: s_sub_i32 s6, 0, s5980; GFX1030-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v1981; GFX1030-NEXT: s_mul_i32 s6, s6, s10982; GFX1030-NEXT: v_mov_b32_e32 v1, s3983; GFX1030-NEXT: s_mul_hi_u32 s6, s10, s6984; GFX1030-NEXT: s_add_i32 s10, s10, s6985; GFX1030-NEXT: v_cvt_u32_f32_e32 v0, v0986; GFX1030-NEXT: s_mul_hi_u32 s6, s7, s10987; GFX1030-NEXT: s_mul_i32 s8, s6, s5988; GFX1030-NEXT: s_sub_i32 s7, s7, s8989; GFX1030-NEXT: s_add_i32 s8, s6, 1990; GFX1030-NEXT: s_sub_i32 s9, s7, s5991; GFX1030-NEXT: s_cmp_ge_u32 s7, s5992; GFX1030-NEXT: v_readfirstlane_b32 s10, v0993; GFX1030-NEXT: s_cselect_b32 s6, s8, s6994; GFX1030-NEXT: s_cselect_b32 s7, s9, s7995; GFX1030-NEXT: s_add_i32 s8, s6, 1996; GFX1030-NEXT: s_cmp_ge_u32 s7, s5997; GFX1030-NEXT: v_readfirstlane_b32 s7, v7998; GFX1030-NEXT: s_cselect_b32 s5, s8, s6999; GFX1030-NEXT: s_sub_i32 s6, 0, s21000; GFX1030-NEXT: v_mov_b32_e32 v0, s41001; GFX1030-NEXT: s_mul_i32 s6, s6, s101002; GFX1030-NEXT: v_mov_b32_e32 v2, s51003; GFX1030-NEXT: s_mul_hi_u32 s6, s10, s61004; GFX1030-NEXT: s_add_i32 s10, s10, s61005; GFX1030-NEXT: s_mul_hi_u32 s6, s7, s101006; GFX1030-NEXT: s_mul_i32 s8, s6, s21007; GFX1030-NEXT: s_sub_i32 s7, s7, s81008; GFX1030-NEXT: s_add_i32 s8, s6, 11009; GFX1030-NEXT: s_sub_i32 s9, s7, s21010; GFX1030-NEXT: s_cmp_ge_u32 s7, s21011; GFX1030-NEXT: s_cselect_b32 s6, s8, s61012; GFX1030-NEXT: s_cselect_b32 s7, s9, s71013; GFX1030-NEXT: s_add_i32 s8, s6, 11014; GFX1030-NEXT: s_cmp_ge_u32 s7, s21015; GFX1030-NEXT: s_cselect_b32 s2, s8, s61016; GFX1030-NEXT: v_mov_b32_e32 v3, s21017; GFX1030-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]1018; GFX1030-NEXT: s_endpgm1019;1020; EG-LABEL: udiv_v4i32:1021; EG: ; %bb.0:1022; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]1023; EG-NEXT: TEX 1 @61024; EG-NEXT: ALU 65, @11, KC0[CB0:0-32], KC1[]1025; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T0.X, 11026; EG-NEXT: CF_END1027; EG-NEXT: PAD1028; EG-NEXT: Fetch clause starting at 6:1029; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #11030; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #11031; EG-NEXT: ALU clause starting at 10:1032; EG-NEXT: MOV * T0.X, KC0[2].Z,1033; EG-NEXT: ALU clause starting at 11:1034; EG-NEXT: SUB_INT T2.W, 0.0, T1.W,1035; EG-NEXT: RECIP_UINT * T2.X, T1.W,1036; EG-NEXT: MULLO_INT * T2.Y, PV.W, PS,1037; EG-NEXT: MULHI * T2.Y, T2.X, PS,1038; EG-NEXT: ADD_INT * T2.W, T2.X, PS,1039; EG-NEXT: MULHI * T2.X, T0.W, PV.W,1040; EG-NEXT: MULLO_INT * T2.Y, PS, T1.W,1041; EG-NEXT: SUB_INT T2.W, 0.0, T1.X,1042; EG-NEXT: RECIP_UINT * T2.Z, T1.X,1043; EG-NEXT: MULLO_INT * T2.W, PV.W, PS,1044; EG-NEXT: SUB_INT T3.W, 0.0, T1.Y,1045; EG-NEXT: RECIP_UINT * T3.X, T1.Y,1046; EG-NEXT: MULLO_INT * T3.Y, PV.W, PS,1047; EG-NEXT: SUB_INT T3.W, 0.0, T1.Z,1048; EG-NEXT: RECIP_UINT * T3.Z, T1.Z,1049; EG-NEXT: MULLO_INT * T3.W, PV.W, PS,1050; EG-NEXT: MULHI * T3.W, T3.Z, PS,1051; EG-NEXT: ADD_INT T3.W, T3.Z, PS,1052; EG-NEXT: MULHI * T3.Y, T3.X, T3.Y,1053; EG-NEXT: ADD_INT T4.W, T3.X, PS,1054; EG-NEXT: MULHI * T3.X, T0.Z, PV.W,1055; EG-NEXT: MULHI * T3.Y, T0.Y, PV.W,1056; EG-NEXT: MULLO_INT * T3.Z, PS, T1.Y,1057; EG-NEXT: SUB_INT T3.W, T0.Y, PS,1058; EG-NEXT: MULLO_INT * T0.Y, T3.X, T1.Z,1059; EG-NEXT: SUB_INT T4.X, T0.Z, PS,1060; EG-NEXT: ADD_INT T0.Y, T3.Y, 1,1061; EG-NEXT: SETGE_UINT T0.Z, PV.W, T1.Y,1062; EG-NEXT: SUB_INT T4.W, PV.W, T1.Y,1063; EG-NEXT: MULHI * T2.W, T2.Z, T2.W,1064; EG-NEXT: CNDE_INT T5.X, PV.Z, T3.W, PV.W,1065; EG-NEXT: CNDE_INT T0.Y, PV.Z, T3.Y, PV.Y, BS:VEC_021/SCL_1221066; EG-NEXT: SETGE_UINT T0.Z, PV.X, T1.Z,1067; EG-NEXT: ADD_INT T2.W, T2.Z, PS,1068; EG-NEXT: SUB_INT * T0.W, T0.W, T2.Y,1069; EG-NEXT: ADD_INT T6.X, T3.X, 1,1070; EG-NEXT: ADD_INT T2.Y, T2.X, 1, BS:VEC_120/SCL_2121071; EG-NEXT: SETGE_UINT T2.Z, PS, T1.W,1072; EG-NEXT: SUB_INT T3.W, PS, T1.W,1073; EG-NEXT: MULHI * T2.W, T0.X, PV.W,1074; EG-NEXT: SUB_INT T7.X, T4.X, T1.Z,1075; EG-NEXT: CNDE_INT T3.Y, PV.Z, T0.W, PV.W,1076; EG-NEXT: CNDE_INT T2.Z, PV.Z, T2.X, PV.Y,1077; EG-NEXT: CNDE_INT * T0.W, T0.Z, T3.X, PV.X, BS:VEC_021/SCL_1221078; EG-NEXT: MULLO_INT * T2.X, T2.W, T1.X,1079; EG-NEXT: ADD_INT T3.X, T0.W, 1,1080; EG-NEXT: ADD_INT T2.Y, T2.Z, 1,1081; EG-NEXT: SETGE_UINT T3.Z, T3.Y, T1.W,1082; EG-NEXT: SUB_INT T1.W, T0.X, PS, BS:VEC_2011083; EG-NEXT: CNDE_INT * T3.W, T0.Z, T4.X, T7.X,1084; EG-NEXT: SETGE_UINT T0.X, PS, T1.Z, BS:VEC_021/SCL_1221085; EG-NEXT: ADD_INT T3.Y, T2.W, 1,1086; EG-NEXT: SETGE_UINT T0.Z, PV.W, T1.X,1087; EG-NEXT: SUB_INT T3.W, PV.W, T1.X,1088; EG-NEXT: CNDE_INT * T4.W, PV.Z, T2.Z, PV.Y,1089; EG-NEXT: CNDE_INT T2.X, PV.Z, T1.W, PV.W,1090; EG-NEXT: CNDE_INT T2.Y, PV.Z, T2.W, PV.Y, BS:VEC_021/SCL_1221091; EG-NEXT: CNDE_INT T4.Z, PV.X, T0.W, T3.X, BS:VEC_2011092; EG-NEXT: ADD_INT T0.W, T0.Y, 1,1093; EG-NEXT: SETGE_UINT * T1.W, T5.X, T1.Y,1094; EG-NEXT: CNDE_INT T4.Y, PS, T0.Y, PV.W,1095; EG-NEXT: ADD_INT T0.W, PV.Y, 1,1096; EG-NEXT: SETGE_UINT * T1.W, PV.X, T1.X,1097; EG-NEXT: CNDE_INT T4.X, PS, T2.Y, PV.W,1098; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,1099; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1100 %b_ptr = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 11101 %a = load <4 x i32>, ptr addrspace(1) %in1102 %b = load <4 x i32>, ptr addrspace(1) %b_ptr1103 %result = udiv <4 x i32> %a, %b1104 store <4 x i32> %result, ptr addrspace(1) %out1105 ret void1106}1107 1108define amdgpu_kernel void @udiv_i32_div_pow2(ptr addrspace(1) %out, ptr addrspace(1) %in) {1109; SI-LABEL: udiv_i32_div_pow2:1110; SI: ; %bb.0:1111; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91112; SI-NEXT: s_mov_b32 s7, 0xf0001113; SI-NEXT: s_mov_b32 s6, -11114; SI-NEXT: s_mov_b32 s10, s61115; SI-NEXT: s_mov_b32 s11, s71116; SI-NEXT: s_waitcnt lgkmcnt(0)1117; SI-NEXT: s_mov_b32 s8, s21118; SI-NEXT: s_mov_b32 s9, s31119; SI-NEXT: buffer_load_dword v0, off, s[8:11], 01120; SI-NEXT: s_mov_b32 s4, s01121; SI-NEXT: s_mov_b32 s5, s11122; SI-NEXT: s_waitcnt vmcnt(0)1123; SI-NEXT: v_lshrrev_b32_e32 v0, 4, v01124; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01125; SI-NEXT: s_endpgm1126;1127; VI-LABEL: udiv_i32_div_pow2:1128; VI: ; %bb.0:1129; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241130; VI-NEXT: s_mov_b32 s7, 0xf0001131; VI-NEXT: s_mov_b32 s6, -11132; VI-NEXT: s_mov_b32 s10, s61133; VI-NEXT: s_mov_b32 s11, s71134; VI-NEXT: s_waitcnt lgkmcnt(0)1135; VI-NEXT: s_mov_b32 s8, s21136; VI-NEXT: s_mov_b32 s9, s31137; VI-NEXT: buffer_load_dword v0, off, s[8:11], 01138; VI-NEXT: s_mov_b32 s4, s01139; VI-NEXT: s_mov_b32 s5, s11140; VI-NEXT: s_waitcnt vmcnt(0)1141; VI-NEXT: v_lshrrev_b32_e32 v0, 4, v01142; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01143; VI-NEXT: s_endpgm1144;1145; GCN-LABEL: udiv_i32_div_pow2:1146; GCN: ; %bb.0:1147; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01148; GCN-NEXT: s_add_i32 s12, s12, s171149; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131150; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81151; GCN-NEXT: s_waitcnt lgkmcnt(0)1152; GCN-NEXT: v_mov_b32_e32 v0, s21153; GCN-NEXT: v_mov_b32_e32 v1, s31154; GCN-NEXT: flat_load_dword v2, v[0:1]1155; GCN-NEXT: v_mov_b32_e32 v0, s01156; GCN-NEXT: v_mov_b32_e32 v1, s11157; GCN-NEXT: s_waitcnt vmcnt(0)1158; GCN-NEXT: v_lshrrev_b32_e32 v2, 4, v21159; GCN-NEXT: flat_store_dword v[0:1], v21160; GCN-NEXT: s_endpgm1161;1162; GFX1030-LABEL: udiv_i32_div_pow2:1163; GFX1030: ; %bb.0:1164; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01165; GFX1030-NEXT: v_mov_b32_e32 v0, 01166; GFX1030-NEXT: s_waitcnt lgkmcnt(0)1167; GFX1030-NEXT: global_load_dword v1, v0, s[2:3]1168; GFX1030-NEXT: s_waitcnt vmcnt(0)1169; GFX1030-NEXT: v_lshrrev_b32_e32 v1, 4, v11170; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]1171; GFX1030-NEXT: s_endpgm1172;1173; EG-LABEL: udiv_i32_div_pow2:1174; EG: ; %bb.0:1175; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1176; EG-NEXT: TEX 0 @61177; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]1178; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11179; EG-NEXT: CF_END1180; EG-NEXT: PAD1181; EG-NEXT: Fetch clause starting at 6:1182; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #11183; EG-NEXT: ALU clause starting at 8:1184; EG-NEXT: MOV * T0.X, KC0[2].Z,1185; EG-NEXT: ALU clause starting at 9:1186; EG-NEXT: LSHR T0.X, T0.X, literal.x,1187; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,1188; EG-NEXT: 4(5.605194e-45), 2(2.802597e-45)1189 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 11190 %a = load i32, ptr addrspace(1) %in1191 %result = udiv i32 %a, 161192 store i32 %result, ptr addrspace(1) %out1193 ret void1194}1195 1196define amdgpu_kernel void @udiv_i32_div_k_even(ptr addrspace(1) %out, ptr addrspace(1) %in) {1197; SI-LABEL: udiv_i32_div_k_even:1198; SI: ; %bb.0:1199; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91200; SI-NEXT: s_mov_b32 s7, 0xf0001201; SI-NEXT: s_mov_b32 s6, -11202; SI-NEXT: s_mov_b32 s10, s61203; SI-NEXT: s_mov_b32 s11, s71204; SI-NEXT: s_waitcnt lgkmcnt(0)1205; SI-NEXT: s_mov_b32 s8, s21206; SI-NEXT: s_mov_b32 s9, s31207; SI-NEXT: buffer_load_dword v0, off, s[8:11], 01208; SI-NEXT: s_mov_b32 s2, 0xfabbd9c11209; SI-NEXT: s_mov_b32 s4, s01210; SI-NEXT: s_mov_b32 s5, s11211; SI-NEXT: s_waitcnt vmcnt(0)1212; SI-NEXT: v_mul_hi_u32 v0, v0, s21213; SI-NEXT: v_lshrrev_b32_e32 v0, 25, v01214; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01215; SI-NEXT: s_endpgm1216;1217; VI-LABEL: udiv_i32_div_k_even:1218; VI: ; %bb.0:1219; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241220; VI-NEXT: s_mov_b32 s7, 0xf0001221; VI-NEXT: s_mov_b32 s6, -11222; VI-NEXT: s_mov_b32 s10, s61223; VI-NEXT: s_mov_b32 s11, s71224; VI-NEXT: s_waitcnt lgkmcnt(0)1225; VI-NEXT: s_mov_b32 s8, s21226; VI-NEXT: s_mov_b32 s9, s31227; VI-NEXT: buffer_load_dword v0, off, s[8:11], 01228; VI-NEXT: s_mov_b32 s2, 0xfabbd9c11229; VI-NEXT: s_mov_b32 s4, s01230; VI-NEXT: s_mov_b32 s5, s11231; VI-NEXT: s_waitcnt vmcnt(0)1232; VI-NEXT: v_mul_hi_u32 v0, v0, s21233; VI-NEXT: v_lshrrev_b32_e32 v0, 25, v01234; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01235; VI-NEXT: s_endpgm1236;1237; GCN-LABEL: udiv_i32_div_k_even:1238; GCN: ; %bb.0:1239; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01240; GCN-NEXT: s_add_i32 s12, s12, s171241; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131242; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81243; GCN-NEXT: s_waitcnt lgkmcnt(0)1244; GCN-NEXT: v_mov_b32_e32 v0, s21245; GCN-NEXT: v_mov_b32_e32 v1, s31246; GCN-NEXT: flat_load_dword v0, v[0:1]1247; GCN-NEXT: s_mov_b32 s2, 0xfabbd9c11248; GCN-NEXT: v_mov_b32_e32 v1, s11249; GCN-NEXT: s_waitcnt vmcnt(0)1250; GCN-NEXT: v_mul_hi_u32 v2, v0, s21251; GCN-NEXT: v_mov_b32_e32 v0, s01252; GCN-NEXT: v_lshrrev_b32_e32 v2, 25, v21253; GCN-NEXT: flat_store_dword v[0:1], v21254; GCN-NEXT: s_endpgm1255;1256; GFX1030-LABEL: udiv_i32_div_k_even:1257; GFX1030: ; %bb.0:1258; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01259; GFX1030-NEXT: v_mov_b32_e32 v0, 01260; GFX1030-NEXT: s_waitcnt lgkmcnt(0)1261; GFX1030-NEXT: global_load_dword v1, v0, s[2:3]1262; GFX1030-NEXT: s_waitcnt vmcnt(0)1263; GFX1030-NEXT: v_mul_hi_u32 v1, 0xfabbd9c1, v11264; GFX1030-NEXT: v_lshrrev_b32_e32 v1, 25, v11265; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]1266; GFX1030-NEXT: s_endpgm1267;1268; EG-LABEL: udiv_i32_div_k_even:1269; EG: ; %bb.0:1270; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1271; EG-NEXT: TEX 0 @61272; EG-NEXT: ALU 4, @9, KC0[CB0:0-32], KC1[]1273; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11274; EG-NEXT: CF_END1275; EG-NEXT: PAD1276; EG-NEXT: Fetch clause starting at 6:1277; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #11278; EG-NEXT: ALU clause starting at 8:1279; EG-NEXT: MOV * T0.X, KC0[2].Z,1280; EG-NEXT: ALU clause starting at 9:1281; EG-NEXT: MULHI * T0.X, T0.X, literal.x,1282; EG-NEXT: -88352319(-4.876880e+35), 0(0.000000e+00)1283; EG-NEXT: LSHR T0.X, PS, literal.x,1284; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,1285; EG-NEXT: 25(3.503246e-44), 2(2.802597e-45)1286 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 11287 %a = load i32, ptr addrspace(1) %in1288 %result = udiv i32 %a, 342591821289 store i32 %result, ptr addrspace(1) %out1290 ret void1291}1292 1293define amdgpu_kernel void @udiv_i32_div_k_odd(ptr addrspace(1) %out, ptr addrspace(1) %in) {1294; SI-LABEL: udiv_i32_div_k_odd:1295; SI: ; %bb.0:1296; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91297; SI-NEXT: s_mov_b32 s7, 0xf0001298; SI-NEXT: s_mov_b32 s6, -11299; SI-NEXT: s_mov_b32 s10, s61300; SI-NEXT: s_mov_b32 s11, s71301; SI-NEXT: s_waitcnt lgkmcnt(0)1302; SI-NEXT: s_mov_b32 s8, s21303; SI-NEXT: s_mov_b32 s9, s31304; SI-NEXT: buffer_load_dword v0, off, s[8:11], 01305; SI-NEXT: s_mov_b32 s2, 0x7d5deca31306; SI-NEXT: s_mov_b32 s4, s01307; SI-NEXT: s_mov_b32 s5, s11308; SI-NEXT: s_waitcnt vmcnt(0)1309; SI-NEXT: v_mul_hi_u32 v0, v0, s21310; SI-NEXT: v_lshrrev_b32_e32 v0, 24, v01311; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01312; SI-NEXT: s_endpgm1313;1314; VI-LABEL: udiv_i32_div_k_odd:1315; VI: ; %bb.0:1316; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241317; VI-NEXT: s_mov_b32 s7, 0xf0001318; VI-NEXT: s_mov_b32 s6, -11319; VI-NEXT: s_mov_b32 s10, s61320; VI-NEXT: s_mov_b32 s11, s71321; VI-NEXT: s_waitcnt lgkmcnt(0)1322; VI-NEXT: s_mov_b32 s8, s21323; VI-NEXT: s_mov_b32 s9, s31324; VI-NEXT: buffer_load_dword v0, off, s[8:11], 01325; VI-NEXT: s_mov_b32 s2, 0x7d5deca31326; VI-NEXT: s_mov_b32 s4, s01327; VI-NEXT: s_mov_b32 s5, s11328; VI-NEXT: s_waitcnt vmcnt(0)1329; VI-NEXT: v_mul_hi_u32 v0, v0, s21330; VI-NEXT: v_lshrrev_b32_e32 v0, 24, v01331; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01332; VI-NEXT: s_endpgm1333;1334; GCN-LABEL: udiv_i32_div_k_odd:1335; GCN: ; %bb.0:1336; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01337; GCN-NEXT: s_add_i32 s12, s12, s171338; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131339; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81340; GCN-NEXT: s_waitcnt lgkmcnt(0)1341; GCN-NEXT: v_mov_b32_e32 v0, s21342; GCN-NEXT: v_mov_b32_e32 v1, s31343; GCN-NEXT: flat_load_dword v0, v[0:1]1344; GCN-NEXT: s_mov_b32 s2, 0x7d5deca31345; GCN-NEXT: v_mov_b32_e32 v1, s11346; GCN-NEXT: s_waitcnt vmcnt(0)1347; GCN-NEXT: v_mul_hi_u32 v2, v0, s21348; GCN-NEXT: v_mov_b32_e32 v0, s01349; GCN-NEXT: v_lshrrev_b32_e32 v2, 24, v21350; GCN-NEXT: flat_store_dword v[0:1], v21351; GCN-NEXT: s_endpgm1352;1353; GFX1030-LABEL: udiv_i32_div_k_odd:1354; GFX1030: ; %bb.0:1355; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01356; GFX1030-NEXT: v_mov_b32_e32 v0, 01357; GFX1030-NEXT: s_waitcnt lgkmcnt(0)1358; GFX1030-NEXT: global_load_dword v1, v0, s[2:3]1359; GFX1030-NEXT: s_waitcnt vmcnt(0)1360; GFX1030-NEXT: v_mul_hi_u32 v1, 0x7d5deca3, v11361; GFX1030-NEXT: v_lshrrev_b32_e32 v1, 24, v11362; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]1363; GFX1030-NEXT: s_endpgm1364;1365; EG-LABEL: udiv_i32_div_k_odd:1366; EG: ; %bb.0:1367; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]1368; EG-NEXT: TEX 0 @61369; EG-NEXT: ALU 4, @9, KC0[CB0:0-32], KC1[]1370; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11371; EG-NEXT: CF_END1372; EG-NEXT: PAD1373; EG-NEXT: Fetch clause starting at 6:1374; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #11375; EG-NEXT: ALU clause starting at 8:1376; EG-NEXT: MOV * T0.X, KC0[2].Z,1377; EG-NEXT: ALU clause starting at 9:1378; EG-NEXT: MULHI * T0.X, T0.X, literal.x,1379; EG-NEXT: 2103307427(1.843675e+37), 0(0.000000e+00)1380; EG-NEXT: LSHR T0.X, PS, literal.x,1381; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,1382; EG-NEXT: 24(3.363116e-44), 2(2.802597e-45)1383 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 11384 %a = load i32, ptr addrspace(1) %in1385 %result = udiv i32 %a, 342591831386 store i32 %result, ptr addrspace(1) %out1387 ret void1388}1389 1390define amdgpu_kernel void @v_udiv_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {1391; SI-LABEL: v_udiv_i8:1392; SI: ; %bb.0:1393; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91394; SI-NEXT: s_mov_b32 s7, 0xf0001395; SI-NEXT: s_mov_b32 s6, -11396; SI-NEXT: s_mov_b32 s10, s61397; SI-NEXT: s_mov_b32 s11, s71398; SI-NEXT: s_waitcnt lgkmcnt(0)1399; SI-NEXT: s_mov_b32 s8, s21400; SI-NEXT: s_mov_b32 s9, s31401; SI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:11402; SI-NEXT: buffer_load_ubyte v1, off, s[8:11], 01403; SI-NEXT: s_mov_b32 s4, s01404; SI-NEXT: s_mov_b32 s5, s11405; SI-NEXT: s_waitcnt vmcnt(1)1406; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01407; SI-NEXT: v_rcp_iflag_f32_e32 v2, v01408; SI-NEXT: s_waitcnt vmcnt(0)1409; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v11410; SI-NEXT: v_mul_f32_e32 v2, v1, v21411; SI-NEXT: v_trunc_f32_e32 v2, v21412; SI-NEXT: v_cvt_u32_f32_e32 v3, v21413; SI-NEXT: v_mad_f32 v1, -v2, v0, v11414; SI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01415; SI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1416; SI-NEXT: v_and_b32_e32 v0, 0xff, v01417; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01418; SI-NEXT: s_endpgm1419;1420; VI-LABEL: v_udiv_i8:1421; VI: ; %bb.0:1422; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241423; VI-NEXT: s_mov_b32 s7, 0xf0001424; VI-NEXT: s_mov_b32 s6, -11425; VI-NEXT: s_mov_b32 s10, s61426; VI-NEXT: s_mov_b32 s11, s71427; VI-NEXT: s_waitcnt lgkmcnt(0)1428; VI-NEXT: s_mov_b32 s8, s21429; VI-NEXT: s_mov_b32 s9, s31430; VI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:11431; VI-NEXT: buffer_load_ubyte v1, off, s[8:11], 01432; VI-NEXT: s_mov_b32 s4, s01433; VI-NEXT: s_mov_b32 s5, s11434; VI-NEXT: s_waitcnt vmcnt(1)1435; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01436; VI-NEXT: v_rcp_iflag_f32_e32 v2, v01437; VI-NEXT: s_waitcnt vmcnt(0)1438; VI-NEXT: v_cvt_f32_ubyte0_e32 v1, v11439; VI-NEXT: v_mul_f32_e32 v2, v1, v21440; VI-NEXT: v_trunc_f32_e32 v2, v21441; VI-NEXT: v_cvt_u32_f32_e32 v3, v21442; VI-NEXT: v_mad_f32 v1, -v2, v0, v11443; VI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01444; VI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1445; VI-NEXT: v_and_b32_e32 v0, 0xff, v01446; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01447; VI-NEXT: s_endpgm1448;1449; GCN-LABEL: v_udiv_i8:1450; GCN: ; %bb.0:1451; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01452; GCN-NEXT: s_add_i32 s12, s12, s171453; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131454; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81455; GCN-NEXT: s_waitcnt lgkmcnt(0)1456; GCN-NEXT: v_mov_b32_e32 v0, s21457; GCN-NEXT: v_mov_b32_e32 v1, s31458; GCN-NEXT: flat_load_ushort v2, v[0:1]1459; GCN-NEXT: v_mov_b32_e32 v0, s01460; GCN-NEXT: v_mov_b32_e32 v1, s11461; GCN-NEXT: s_waitcnt vmcnt(0)1462; GCN-NEXT: v_cvt_f32_ubyte1_e32 v3, v21463; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v31464; GCN-NEXT: v_cvt_f32_ubyte0_e32 v2, v21465; GCN-NEXT: v_mul_f32_e32 v4, v2, v41466; GCN-NEXT: v_trunc_f32_e32 v4, v41467; GCN-NEXT: v_cvt_u32_f32_e32 v5, v41468; GCN-NEXT: v_mad_f32 v2, -v4, v3, v21469; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v2|, v31470; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc1471; GCN-NEXT: v_and_b32_e32 v2, 0xff, v21472; GCN-NEXT: flat_store_dword v[0:1], v21473; GCN-NEXT: s_endpgm1474;1475; GFX1030-LABEL: v_udiv_i8:1476; GFX1030: ; %bb.0:1477; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01478; GFX1030-NEXT: v_mov_b32_e32 v0, 01479; GFX1030-NEXT: s_waitcnt lgkmcnt(0)1480; GFX1030-NEXT: global_load_ushort v1, v0, s[2:3]1481; GFX1030-NEXT: s_waitcnt vmcnt(0)1482; GFX1030-NEXT: v_cvt_f32_ubyte1_e32 v2, v11483; GFX1030-NEXT: v_cvt_f32_ubyte0_e32 v1, v11484; GFX1030-NEXT: v_rcp_iflag_f32_e32 v3, v21485; GFX1030-NEXT: v_mul_f32_e32 v3, v1, v31486; GFX1030-NEXT: v_trunc_f32_e32 v3, v31487; GFX1030-NEXT: v_fma_f32 v1, -v3, v2, v11488; GFX1030-NEXT: v_cvt_u32_f32_e32 v3, v31489; GFX1030-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v1|, v21490; GFX1030-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo1491; GFX1030-NEXT: v_and_b32_e32 v1, 0xff, v11492; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]1493; GFX1030-NEXT: s_endpgm1494;1495; EG-LABEL: v_udiv_i8:1496; EG: ; %bb.0:1497; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]1498; EG-NEXT: TEX 1 @61499; EG-NEXT: ALU 14, @11, KC0[CB0:0-32], KC1[]1500; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11501; EG-NEXT: CF_END1502; EG-NEXT: PAD1503; EG-NEXT: Fetch clause starting at 6:1504; EG-NEXT: VTX_READ_8 T1.X, T0.X, 1, #11505; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #11506; EG-NEXT: ALU clause starting at 10:1507; EG-NEXT: MOV * T0.X, KC0[2].Z,1508; EG-NEXT: ALU clause starting at 11:1509; EG-NEXT: UINT_TO_FLT * T0.Y, T1.X,1510; EG-NEXT: RECIP_IEEE * T0.Z, PS,1511; EG-NEXT: UINT_TO_FLT * T0.X, T0.X,1512; EG-NEXT: MUL_IEEE * T0.W, PS, T0.Z,1513; EG-NEXT: TRUNC * T0.W, PV.W,1514; EG-NEXT: MULADD_IEEE T1.W, -PV.W, T0.Y, T0.X,1515; EG-NEXT: TRUNC * T0.W, PV.W,1516; EG-NEXT: SETGE * T1.W, |PV.W|, T0.Y,1517; EG-NEXT: CNDE T1.W, PV.W, 0.0, literal.x,1518; EG-NEXT: FLT_TO_UINT * T0.X, T0.W,1519; EG-NEXT: 1(1.401298e-45), 0(0.000000e+00)1520; EG-NEXT: ADD_INT * T0.W, PS, PV.W,1521; EG-NEXT: AND_INT T0.X, PV.W, literal.x,1522; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,1523; EG-NEXT: 255(3.573311e-43), 2(2.802597e-45)1524 %den_ptr = getelementptr i8, ptr addrspace(1) %in, i8 11525 %num = load i8, ptr addrspace(1) %in1526 %den = load i8, ptr addrspace(1) %den_ptr1527 %result = udiv i8 %num, %den1528 %result.ext = zext i8 %result to i321529 store i32 %result.ext, ptr addrspace(1) %out1530 ret void1531}1532 1533define amdgpu_kernel void @v_udiv_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {1534; SI-LABEL: v_udiv_i16:1535; SI: ; %bb.0:1536; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91537; SI-NEXT: s_mov_b32 s7, 0xf0001538; SI-NEXT: s_mov_b32 s6, -11539; SI-NEXT: s_mov_b32 s10, s61540; SI-NEXT: s_mov_b32 s11, s71541; SI-NEXT: s_waitcnt lgkmcnt(0)1542; SI-NEXT: s_mov_b32 s8, s21543; SI-NEXT: s_mov_b32 s9, s31544; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 offset:21545; SI-NEXT: buffer_load_ushort v1, off, s[8:11], 01546; SI-NEXT: s_mov_b32 s4, s01547; SI-NEXT: s_mov_b32 s5, s11548; SI-NEXT: s_waitcnt vmcnt(1)1549; SI-NEXT: v_cvt_f32_u32_e32 v0, v01550; SI-NEXT: s_waitcnt vmcnt(0)1551; SI-NEXT: v_cvt_f32_u32_e32 v1, v11552; SI-NEXT: v_rcp_iflag_f32_e32 v2, v01553; SI-NEXT: v_mul_f32_e32 v2, v1, v21554; SI-NEXT: v_trunc_f32_e32 v2, v21555; SI-NEXT: v_cvt_u32_f32_e32 v3, v21556; SI-NEXT: v_mad_f32 v1, -v2, v0, v11557; SI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01558; SI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1559; SI-NEXT: v_and_b32_e32 v0, 0xffff, v01560; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01561; SI-NEXT: s_endpgm1562;1563; VI-LABEL: v_udiv_i16:1564; VI: ; %bb.0:1565; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241566; VI-NEXT: s_mov_b32 s7, 0xf0001567; VI-NEXT: s_mov_b32 s6, -11568; VI-NEXT: s_mov_b32 s10, s61569; VI-NEXT: s_mov_b32 s11, s71570; VI-NEXT: s_waitcnt lgkmcnt(0)1571; VI-NEXT: s_mov_b32 s8, s21572; VI-NEXT: s_mov_b32 s9, s31573; VI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 offset:21574; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 01575; VI-NEXT: s_mov_b32 s4, s01576; VI-NEXT: s_mov_b32 s5, s11577; VI-NEXT: s_waitcnt vmcnt(1)1578; VI-NEXT: v_cvt_f32_u32_e32 v0, v01579; VI-NEXT: s_waitcnt vmcnt(0)1580; VI-NEXT: v_cvt_f32_u32_e32 v1, v11581; VI-NEXT: v_rcp_iflag_f32_e32 v2, v01582; VI-NEXT: v_mul_f32_e32 v2, v1, v21583; VI-NEXT: v_trunc_f32_e32 v2, v21584; VI-NEXT: v_cvt_u32_f32_e32 v3, v21585; VI-NEXT: v_mad_f32 v1, -v2, v0, v11586; VI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01587; VI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1588; VI-NEXT: v_and_b32_e32 v0, 0xffff, v01589; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01590; VI-NEXT: s_endpgm1591;1592; GCN-LABEL: v_udiv_i16:1593; GCN: ; %bb.0:1594; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01595; GCN-NEXT: s_add_i32 s12, s12, s171596; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131597; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81598; GCN-NEXT: s_waitcnt lgkmcnt(0)1599; GCN-NEXT: v_mov_b32_e32 v0, s21600; GCN-NEXT: v_mov_b32_e32 v1, s31601; GCN-NEXT: flat_load_dword v0, v[0:1]1602; GCN-NEXT: v_mov_b32_e32 v1, s11603; GCN-NEXT: s_waitcnt vmcnt(0)1604; GCN-NEXT: v_cvt_f32_u32_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11605; GCN-NEXT: v_cvt_f32_u32_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_01606; GCN-NEXT: v_mov_b32_e32 v0, s01607; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v21608; GCN-NEXT: v_mul_f32_e32 v4, v3, v41609; GCN-NEXT: v_trunc_f32_e32 v4, v41610; GCN-NEXT: v_cvt_u32_f32_e32 v5, v41611; GCN-NEXT: v_mad_f32 v3, -v4, v2, v31612; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v21613; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc1614; GCN-NEXT: v_and_b32_e32 v2, 0xffff, v21615; GCN-NEXT: flat_store_dword v[0:1], v21616; GCN-NEXT: s_endpgm1617;1618; GFX1030-LABEL: v_udiv_i16:1619; GFX1030: ; %bb.0:1620; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01621; GFX1030-NEXT: v_mov_b32_e32 v0, 01622; GFX1030-NEXT: s_waitcnt lgkmcnt(0)1623; GFX1030-NEXT: global_load_dword v1, v0, s[2:3]1624; GFX1030-NEXT: s_waitcnt vmcnt(0)1625; GFX1030-NEXT: v_cvt_f32_u32_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_11626; GFX1030-NEXT: v_cvt_f32_u32_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_01627; GFX1030-NEXT: v_rcp_iflag_f32_e32 v3, v21628; GFX1030-NEXT: v_mul_f32_e32 v3, v1, v31629; GFX1030-NEXT: v_trunc_f32_e32 v3, v31630; GFX1030-NEXT: v_fma_f32 v1, -v3, v2, v11631; GFX1030-NEXT: v_cvt_u32_f32_e32 v3, v31632; GFX1030-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v1|, v21633; GFX1030-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo1634; GFX1030-NEXT: v_and_b32_e32 v1, 0xffff, v11635; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]1636; GFX1030-NEXT: s_endpgm1637;1638; EG-LABEL: v_udiv_i16:1639; EG: ; %bb.0:1640; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]1641; EG-NEXT: TEX 1 @61642; EG-NEXT: ALU 14, @11, KC0[CB0:0-32], KC1[]1643; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11644; EG-NEXT: CF_END1645; EG-NEXT: PAD1646; EG-NEXT: Fetch clause starting at 6:1647; EG-NEXT: VTX_READ_16 T1.X, T0.X, 2, #11648; EG-NEXT: VTX_READ_16 T0.X, T0.X, 0, #11649; EG-NEXT: ALU clause starting at 10:1650; EG-NEXT: MOV * T0.X, KC0[2].Z,1651; EG-NEXT: ALU clause starting at 11:1652; EG-NEXT: UINT_TO_FLT * T0.Y, T1.X,1653; EG-NEXT: RECIP_IEEE * T0.Z, PS,1654; EG-NEXT: UINT_TO_FLT * T0.X, T0.X,1655; EG-NEXT: MUL_IEEE * T0.W, PS, T0.Z,1656; EG-NEXT: TRUNC * T0.W, PV.W,1657; EG-NEXT: MULADD_IEEE T1.W, -PV.W, T0.Y, T0.X,1658; EG-NEXT: TRUNC * T0.W, PV.W,1659; EG-NEXT: SETGE * T1.W, |PV.W|, T0.Y,1660; EG-NEXT: CNDE T1.W, PV.W, 0.0, literal.x,1661; EG-NEXT: FLT_TO_UINT * T0.X, T0.W,1662; EG-NEXT: 1(1.401298e-45), 0(0.000000e+00)1663; EG-NEXT: ADD_INT * T0.W, PS, PV.W,1664; EG-NEXT: AND_INT T0.X, PV.W, literal.x,1665; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,1666; EG-NEXT: 65535(9.183409e-41), 2(2.802597e-45)1667 %den_ptr = getelementptr i16, ptr addrspace(1) %in, i16 11668 %num = load i16, ptr addrspace(1) %in1669 %den = load i16, ptr addrspace(1) %den_ptr1670 %result = udiv i16 %num, %den1671 %result.ext = zext i16 %result to i321672 store i32 %result.ext, ptr addrspace(1) %out1673 ret void1674}1675 1676define amdgpu_kernel void @v_udiv_i23(ptr addrspace(1) %out, ptr addrspace(1) %in) {1677; SI-LABEL: v_udiv_i23:1678; SI: ; %bb.0:1679; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91680; SI-NEXT: s_mov_b32 s7, 0xf0001681; SI-NEXT: s_mov_b32 s6, -11682; SI-NEXT: s_mov_b32 s10, s61683; SI-NEXT: s_mov_b32 s11, s71684; SI-NEXT: s_waitcnt lgkmcnt(0)1685; SI-NEXT: s_mov_b32 s8, s21686; SI-NEXT: s_mov_b32 s9, s31687; SI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:61688; SI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:41689; SI-NEXT: buffer_load_ubyte v2, off, s[8:11], 0 offset:21690; SI-NEXT: buffer_load_ushort v3, off, s[8:11], 01691; SI-NEXT: s_mov_b32 s4, s01692; SI-NEXT: s_mov_b32 s5, s11693; SI-NEXT: s_waitcnt vmcnt(3)1694; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v01695; SI-NEXT: s_waitcnt vmcnt(2)1696; SI-NEXT: v_or_b32_e32 v0, v1, v01697; SI-NEXT: v_cvt_f32_u32_e32 v0, v01698; SI-NEXT: s_waitcnt vmcnt(1)1699; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v21700; SI-NEXT: s_waitcnt vmcnt(0)1701; SI-NEXT: v_or_b32_e32 v1, v3, v11702; SI-NEXT: v_cvt_f32_u32_e32 v1, v11703; SI-NEXT: v_rcp_iflag_f32_e32 v2, v01704; SI-NEXT: v_mul_f32_e32 v2, v1, v21705; SI-NEXT: v_trunc_f32_e32 v2, v21706; SI-NEXT: v_cvt_u32_f32_e32 v3, v21707; SI-NEXT: v_mad_f32 v1, -v2, v0, v11708; SI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01709; SI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1710; SI-NEXT: v_and_b32_e32 v0, 0x7fffff, v01711; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01712; SI-NEXT: s_endpgm1713;1714; VI-LABEL: v_udiv_i23:1715; VI: ; %bb.0:1716; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241717; VI-NEXT: s_mov_b32 s7, 0xf0001718; VI-NEXT: s_mov_b32 s6, -11719; VI-NEXT: s_mov_b32 s10, s61720; VI-NEXT: s_mov_b32 s11, s71721; VI-NEXT: s_waitcnt lgkmcnt(0)1722; VI-NEXT: s_mov_b32 s8, s21723; VI-NEXT: s_mov_b32 s9, s31724; VI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:61725; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:41726; VI-NEXT: buffer_load_ubyte v2, off, s[8:11], 0 offset:21727; VI-NEXT: buffer_load_ushort v3, off, s[8:11], 01728; VI-NEXT: s_mov_b32 s4, s01729; VI-NEXT: s_mov_b32 s5, s11730; VI-NEXT: s_waitcnt vmcnt(3)1731; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v01732; VI-NEXT: s_waitcnt vmcnt(2)1733; VI-NEXT: v_or_b32_e32 v0, v1, v01734; VI-NEXT: v_cvt_f32_u32_e32 v0, v01735; VI-NEXT: s_waitcnt vmcnt(1)1736; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v21737; VI-NEXT: s_waitcnt vmcnt(0)1738; VI-NEXT: v_or_b32_e32 v1, v3, v11739; VI-NEXT: v_cvt_f32_u32_e32 v1, v11740; VI-NEXT: v_rcp_iflag_f32_e32 v2, v01741; VI-NEXT: v_mul_f32_e32 v2, v1, v21742; VI-NEXT: v_trunc_f32_e32 v2, v21743; VI-NEXT: v_cvt_u32_f32_e32 v3, v21744; VI-NEXT: v_mad_f32 v1, -v2, v0, v11745; VI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01746; VI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1747; VI-NEXT: v_and_b32_e32 v0, 0x7fffff, v01748; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01749; VI-NEXT: s_endpgm1750;1751; GCN-LABEL: v_udiv_i23:1752; GCN: ; %bb.0:1753; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01754; GCN-NEXT: s_add_i32 s12, s12, s171755; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81756; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131757; GCN-NEXT: s_waitcnt lgkmcnt(0)1758; GCN-NEXT: s_add_u32 s4, s2, 41759; GCN-NEXT: s_addc_u32 s5, s3, 01760; GCN-NEXT: s_add_u32 s6, s2, 21761; GCN-NEXT: s_addc_u32 s7, s3, 01762; GCN-NEXT: v_mov_b32_e32 v0, s61763; GCN-NEXT: v_mov_b32_e32 v1, s71764; GCN-NEXT: s_add_u32 s6, s2, 61765; GCN-NEXT: s_addc_u32 s7, s3, 01766; GCN-NEXT: v_mov_b32_e32 v2, s61767; GCN-NEXT: v_mov_b32_e32 v3, s71768; GCN-NEXT: v_mov_b32_e32 v4, s41769; GCN-NEXT: v_mov_b32_e32 v5, s51770; GCN-NEXT: flat_load_ubyte v6, v[2:3]1771; GCN-NEXT: flat_load_ushort v4, v[4:5]1772; GCN-NEXT: v_mov_b32_e32 v2, s21773; GCN-NEXT: v_mov_b32_e32 v3, s31774; GCN-NEXT: flat_load_ubyte v0, v[0:1]1775; GCN-NEXT: flat_load_ushort v1, v[2:3]1776; GCN-NEXT: s_waitcnt vmcnt(3)1777; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v61778; GCN-NEXT: s_waitcnt vmcnt(2)1779; GCN-NEXT: v_or_b32_e32 v2, v4, v21780; GCN-NEXT: v_cvt_f32_u32_e32 v2, v21781; GCN-NEXT: s_waitcnt vmcnt(1)1782; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v01783; GCN-NEXT: s_waitcnt vmcnt(0)1784; GCN-NEXT: v_or_b32_e32 v0, v1, v01785; GCN-NEXT: v_cvt_f32_u32_e32 v3, v01786; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v21787; GCN-NEXT: v_mov_b32_e32 v0, s01788; GCN-NEXT: v_mov_b32_e32 v1, s11789; GCN-NEXT: v_mul_f32_e32 v4, v3, v41790; GCN-NEXT: v_trunc_f32_e32 v4, v41791; GCN-NEXT: v_cvt_u32_f32_e32 v5, v41792; GCN-NEXT: v_mad_f32 v3, -v4, v2, v31793; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v21794; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc1795; GCN-NEXT: v_and_b32_e32 v2, 0x7fffff, v21796; GCN-NEXT: flat_store_dword v[0:1], v21797; GCN-NEXT: s_endpgm1798;1799; GFX1030-LABEL: v_udiv_i23:1800; GFX1030: ; %bb.0:1801; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01802; GFX1030-NEXT: v_mov_b32_e32 v0, 01803; GFX1030-NEXT: s_waitcnt lgkmcnt(0)1804; GFX1030-NEXT: s_clause 0x31805; GFX1030-NEXT: global_load_ubyte v1, v0, s[2:3] offset:61806; GFX1030-NEXT: global_load_ushort v2, v0, s[2:3] offset:41807; GFX1030-NEXT: global_load_ubyte v3, v0, s[2:3] offset:21808; GFX1030-NEXT: global_load_ushort v4, v0, s[2:3]1809; GFX1030-NEXT: s_waitcnt vmcnt(3)1810; GFX1030-NEXT: v_lshlrev_b32_e32 v1, 16, v11811; GFX1030-NEXT: s_waitcnt vmcnt(2)1812; GFX1030-NEXT: v_or_b32_e32 v1, v2, v11813; GFX1030-NEXT: s_waitcnt vmcnt(1)1814; GFX1030-NEXT: v_lshlrev_b32_e32 v2, 16, v31815; GFX1030-NEXT: v_cvt_f32_u32_e32 v1, v11816; GFX1030-NEXT: s_waitcnt vmcnt(0)1817; GFX1030-NEXT: v_or_b32_e32 v2, v4, v21818; GFX1030-NEXT: v_rcp_iflag_f32_e32 v3, v11819; GFX1030-NEXT: v_cvt_f32_u32_e32 v2, v21820; GFX1030-NEXT: v_mul_f32_e32 v3, v2, v31821; GFX1030-NEXT: v_trunc_f32_e32 v3, v31822; GFX1030-NEXT: v_fma_f32 v2, -v3, v1, v21823; GFX1030-NEXT: v_cvt_u32_f32_e32 v3, v31824; GFX1030-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v2|, v11825; GFX1030-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo1826; GFX1030-NEXT: v_and_b32_e32 v1, 0x7fffff, v11827; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]1828; GFX1030-NEXT: s_endpgm1829;1830; EG-LABEL: v_udiv_i23:1831; EG: ; %bb.0:1832; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]1833; EG-NEXT: TEX 3 @61834; EG-NEXT: ALU 20, @15, KC0[CB0:0-32], KC1[]1835; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 11836; EG-NEXT: CF_END1837; EG-NEXT: PAD1838; EG-NEXT: Fetch clause starting at 6:1839; EG-NEXT: VTX_READ_8 T1.X, T0.X, 6, #11840; EG-NEXT: VTX_READ_16 T2.X, T0.X, 0, #11841; EG-NEXT: VTX_READ_8 T3.X, T0.X, 2, #11842; EG-NEXT: VTX_READ_16 T0.X, T0.X, 4, #11843; EG-NEXT: ALU clause starting at 14:1844; EG-NEXT: MOV * T0.X, KC0[2].Z,1845; EG-NEXT: ALU clause starting at 15:1846; EG-NEXT: LSHL * T0.W, T1.X, literal.x,1847; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)1848; EG-NEXT: OR_INT T0.W, T0.X, PV.W,1849; EG-NEXT: LSHL * T1.W, T3.X, literal.x,1850; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)1851; EG-NEXT: UINT_TO_FLT * T0.X, PV.W,1852; EG-NEXT: OR_INT T0.W, T2.X, T1.W,1853; EG-NEXT: RECIP_IEEE * T0.Y, PS,1854; EG-NEXT: UINT_TO_FLT * T0.Z, PV.W,1855; EG-NEXT: MUL_IEEE * T0.W, PS, T0.Y,1856; EG-NEXT: TRUNC * T0.W, PV.W,1857; EG-NEXT: MULADD_IEEE T1.W, -PV.W, T0.X, T0.Z,1858; EG-NEXT: TRUNC * T0.W, PV.W,1859; EG-NEXT: SETGE * T1.W, |PV.W|, T0.X,1860; EG-NEXT: CNDE T1.W, PV.W, 0.0, literal.x,1861; EG-NEXT: FLT_TO_UINT * T0.X, T0.W,1862; EG-NEXT: 1(1.401298e-45), 0(0.000000e+00)1863; EG-NEXT: ADD_INT * T0.W, PS, PV.W,1864; EG-NEXT: AND_INT T0.X, PV.W, literal.x,1865; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.y,1866; EG-NEXT: 8388607(1.175494e-38), 2(2.802597e-45)1867 %den_ptr = getelementptr i23, ptr addrspace(1) %in, i23 11868 %num = load i23, ptr addrspace(1) %in1869 %den = load i23, ptr addrspace(1) %den_ptr1870 %result = udiv i23 %num, %den1871 %result.ext = zext i23 %result to i321872 store i32 %result.ext, ptr addrspace(1) %out1873 ret void1874}1875 1876define amdgpu_kernel void @v_udiv_i24(ptr addrspace(1) %out, ptr addrspace(1) %in) {1877; SI-LABEL: v_udiv_i24:1878; SI: ; %bb.0:1879; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91880; SI-NEXT: s_mov_b32 s7, 0xf0001881; SI-NEXT: s_mov_b32 s6, -11882; SI-NEXT: s_mov_b32 s10, s61883; SI-NEXT: s_mov_b32 s11, s71884; SI-NEXT: s_waitcnt lgkmcnt(0)1885; SI-NEXT: s_mov_b32 s8, s21886; SI-NEXT: s_mov_b32 s9, s31887; SI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:61888; SI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:41889; SI-NEXT: buffer_load_ubyte v2, off, s[8:11], 0 offset:21890; SI-NEXT: buffer_load_ushort v3, off, s[8:11], 01891; SI-NEXT: s_mov_b32 s4, s01892; SI-NEXT: s_mov_b32 s5, s11893; SI-NEXT: s_waitcnt vmcnt(3)1894; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v01895; SI-NEXT: s_waitcnt vmcnt(2)1896; SI-NEXT: v_or_b32_e32 v0, v1, v01897; SI-NEXT: v_cvt_f32_u32_e32 v0, v01898; SI-NEXT: s_waitcnt vmcnt(1)1899; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v21900; SI-NEXT: s_waitcnt vmcnt(0)1901; SI-NEXT: v_or_b32_e32 v1, v3, v11902; SI-NEXT: v_cvt_f32_u32_e32 v1, v11903; SI-NEXT: v_rcp_iflag_f32_e32 v2, v01904; SI-NEXT: v_mul_f32_e32 v2, v1, v21905; SI-NEXT: v_trunc_f32_e32 v2, v21906; SI-NEXT: v_cvt_u32_f32_e32 v3, v21907; SI-NEXT: v_mad_f32 v1, -v2, v0, v11908; SI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01909; SI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1910; SI-NEXT: v_and_b32_e32 v0, 0xffffff, v01911; SI-NEXT: buffer_store_dword v0, off, s[4:7], 01912; SI-NEXT: s_endpgm1913;1914; VI-LABEL: v_udiv_i24:1915; VI: ; %bb.0:1916; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241917; VI-NEXT: s_mov_b32 s7, 0xf0001918; VI-NEXT: s_mov_b32 s6, -11919; VI-NEXT: s_mov_b32 s10, s61920; VI-NEXT: s_mov_b32 s11, s71921; VI-NEXT: s_waitcnt lgkmcnt(0)1922; VI-NEXT: s_mov_b32 s8, s21923; VI-NEXT: s_mov_b32 s9, s31924; VI-NEXT: buffer_load_ubyte v0, off, s[8:11], 0 offset:61925; VI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 offset:41926; VI-NEXT: buffer_load_ubyte v2, off, s[8:11], 0 offset:21927; VI-NEXT: buffer_load_ushort v3, off, s[8:11], 01928; VI-NEXT: s_mov_b32 s4, s01929; VI-NEXT: s_mov_b32 s5, s11930; VI-NEXT: s_waitcnt vmcnt(3)1931; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v01932; VI-NEXT: s_waitcnt vmcnt(2)1933; VI-NEXT: v_or_b32_e32 v0, v1, v01934; VI-NEXT: v_cvt_f32_u32_e32 v0, v01935; VI-NEXT: s_waitcnt vmcnt(1)1936; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v21937; VI-NEXT: s_waitcnt vmcnt(0)1938; VI-NEXT: v_or_b32_e32 v1, v3, v11939; VI-NEXT: v_cvt_f32_u32_e32 v1, v11940; VI-NEXT: v_rcp_iflag_f32_e32 v2, v01941; VI-NEXT: v_mul_f32_e32 v2, v1, v21942; VI-NEXT: v_trunc_f32_e32 v2, v21943; VI-NEXT: v_cvt_u32_f32_e32 v3, v21944; VI-NEXT: v_mad_f32 v1, -v2, v0, v11945; VI-NEXT: v_cmp_ge_f32_e64 vcc, |v1|, v01946; VI-NEXT: v_addc_u32_e32 v0, vcc, 0, v3, vcc1947; VI-NEXT: v_and_b32_e32 v0, 0xffffff, v01948; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01949; VI-NEXT: s_endpgm1950;1951; GCN-LABEL: v_udiv_i24:1952; GCN: ; %bb.0:1953; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x01954; GCN-NEXT: s_add_i32 s12, s12, s171955; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 81956; GCN-NEXT: s_mov_b32 flat_scratch_lo, s131957; GCN-NEXT: s_waitcnt lgkmcnt(0)1958; GCN-NEXT: s_add_u32 s4, s2, 41959; GCN-NEXT: s_addc_u32 s5, s3, 01960; GCN-NEXT: s_add_u32 s6, s2, 21961; GCN-NEXT: s_addc_u32 s7, s3, 01962; GCN-NEXT: v_mov_b32_e32 v0, s61963; GCN-NEXT: v_mov_b32_e32 v1, s71964; GCN-NEXT: s_add_u32 s6, s2, 61965; GCN-NEXT: s_addc_u32 s7, s3, 01966; GCN-NEXT: v_mov_b32_e32 v2, s61967; GCN-NEXT: v_mov_b32_e32 v3, s71968; GCN-NEXT: v_mov_b32_e32 v4, s41969; GCN-NEXT: v_mov_b32_e32 v5, s51970; GCN-NEXT: flat_load_ubyte v6, v[2:3]1971; GCN-NEXT: flat_load_ushort v4, v[4:5]1972; GCN-NEXT: v_mov_b32_e32 v2, s21973; GCN-NEXT: v_mov_b32_e32 v3, s31974; GCN-NEXT: flat_load_ubyte v0, v[0:1]1975; GCN-NEXT: flat_load_ushort v1, v[2:3]1976; GCN-NEXT: s_waitcnt vmcnt(3)1977; GCN-NEXT: v_lshlrev_b32_e32 v2, 16, v61978; GCN-NEXT: s_waitcnt vmcnt(2)1979; GCN-NEXT: v_or_b32_e32 v2, v4, v21980; GCN-NEXT: v_cvt_f32_u32_e32 v2, v21981; GCN-NEXT: s_waitcnt vmcnt(1)1982; GCN-NEXT: v_lshlrev_b32_e32 v0, 16, v01983; GCN-NEXT: s_waitcnt vmcnt(0)1984; GCN-NEXT: v_or_b32_e32 v0, v1, v01985; GCN-NEXT: v_cvt_f32_u32_e32 v3, v01986; GCN-NEXT: v_rcp_iflag_f32_e32 v4, v21987; GCN-NEXT: v_mov_b32_e32 v0, s01988; GCN-NEXT: v_mov_b32_e32 v1, s11989; GCN-NEXT: v_mul_f32_e32 v4, v3, v41990; GCN-NEXT: v_trunc_f32_e32 v4, v41991; GCN-NEXT: v_cvt_u32_f32_e32 v5, v41992; GCN-NEXT: v_mad_f32 v3, -v4, v2, v31993; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, v21994; GCN-NEXT: v_addc_u32_e32 v2, vcc, 0, v5, vcc1995; GCN-NEXT: v_and_b32_e32 v2, 0xffffff, v21996; GCN-NEXT: flat_store_dword v[0:1], v21997; GCN-NEXT: s_endpgm1998;1999; GFX1030-LABEL: v_udiv_i24:2000; GFX1030: ; %bb.0:2001; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x02002; GFX1030-NEXT: v_mov_b32_e32 v0, 02003; GFX1030-NEXT: s_waitcnt lgkmcnt(0)2004; GFX1030-NEXT: s_clause 0x32005; GFX1030-NEXT: global_load_ubyte v1, v0, s[2:3] offset:62006; GFX1030-NEXT: global_load_ushort v2, v0, s[2:3] offset:42007; GFX1030-NEXT: global_load_ubyte v3, v0, s[2:3] offset:22008; GFX1030-NEXT: global_load_ushort v4, v0, s[2:3]2009; GFX1030-NEXT: s_waitcnt vmcnt(3)2010; GFX1030-NEXT: v_lshlrev_b32_e32 v1, 16, v12011; GFX1030-NEXT: s_waitcnt vmcnt(2)2012; GFX1030-NEXT: v_or_b32_e32 v1, v2, v12013; GFX1030-NEXT: s_waitcnt vmcnt(1)2014; GFX1030-NEXT: v_lshlrev_b32_e32 v2, 16, v32015; GFX1030-NEXT: v_cvt_f32_u32_e32 v1, v12016; GFX1030-NEXT: s_waitcnt vmcnt(0)2017; GFX1030-NEXT: v_or_b32_e32 v2, v4, v22018; GFX1030-NEXT: v_rcp_iflag_f32_e32 v3, v12019; GFX1030-NEXT: v_cvt_f32_u32_e32 v2, v22020; GFX1030-NEXT: v_mul_f32_e32 v3, v2, v32021; GFX1030-NEXT: v_trunc_f32_e32 v3, v32022; GFX1030-NEXT: v_fma_f32 v2, -v3, v1, v22023; GFX1030-NEXT: v_cvt_u32_f32_e32 v3, v32024; GFX1030-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v2|, v12025; GFX1030-NEXT: v_add_co_ci_u32_e64 v1, null, 0, v3, vcc_lo2026; GFX1030-NEXT: v_and_b32_e32 v1, 0xffffff, v12027; GFX1030-NEXT: global_store_dword v0, v1, s[0:1]2028; GFX1030-NEXT: s_endpgm2029;2030; EG-LABEL: v_udiv_i24:2031; EG: ; %bb.0:2032; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]2033; EG-NEXT: TEX 3 @62034; EG-NEXT: ALU 23, @15, KC0[CB0:0-32], KC1[]2035; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 12036; EG-NEXT: CF_END2037; EG-NEXT: PAD2038; EG-NEXT: Fetch clause starting at 6:2039; EG-NEXT: VTX_READ_8 T1.X, T0.X, 6, #12040; EG-NEXT: VTX_READ_16 T2.X, T0.X, 0, #12041; EG-NEXT: VTX_READ_8 T3.X, T0.X, 2, #12042; EG-NEXT: VTX_READ_16 T0.X, T0.X, 4, #12043; EG-NEXT: ALU clause starting at 14:2044; EG-NEXT: MOV * T0.X, KC0[2].Z,2045; EG-NEXT: ALU clause starting at 15:2046; EG-NEXT: LSHL * T0.W, T1.X, literal.x,2047; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)2048; EG-NEXT: OR_INT * T0.W, T0.X, PV.W,2049; EG-NEXT: SUB_INT T1.W, 0.0, PV.W,2050; EG-NEXT: RECIP_UINT * T0.X, PV.W,2051; EG-NEXT: MULLO_INT * T0.Y, PV.W, PS,2052; EG-NEXT: LSHL T1.W, T3.X, literal.x,2053; EG-NEXT: MULHI * T0.Y, T0.X, PS,2054; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)2055; EG-NEXT: ADD_INT T2.W, T0.X, PS,2056; EG-NEXT: OR_INT * T1.W, T2.X, PV.W,2057; EG-NEXT: MULHI * T0.X, PS, PV.W,2058; EG-NEXT: MULLO_INT * T0.Y, PS, T0.W,2059; EG-NEXT: SUB_INT * T1.W, T1.W, PS,2060; EG-NEXT: ADD_INT T0.Z, T0.X, 1,2061; EG-NEXT: SETGE_UINT T2.W, PV.W, T0.W,2062; EG-NEXT: SUB_INT * T3.W, PV.W, T0.W,2063; EG-NEXT: CNDE_INT T1.W, PV.W, T1.W, PS,2064; EG-NEXT: CNDE_INT * T2.W, PV.W, T0.X, PV.Z,2065; EG-NEXT: ADD_INT T3.W, PS, 1,2066; EG-NEXT: SETGE_UINT * T0.W, PV.W, T0.W,2067; EG-NEXT: CNDE_INT T0.X, PS, T2.W, PV.W,2068; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,2069; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2070 %den_ptr = getelementptr i24, ptr addrspace(1) %in, i24 12071 %num = load i24, ptr addrspace(1) %in2072 %den = load i24, ptr addrspace(1) %den_ptr2073 %result = udiv i24 %num, %den2074 %result.ext = zext i24 %result to i322075 store i32 %result.ext, ptr addrspace(1) %out2076 ret void2077}2078 2079define amdgpu_kernel void @scalarize_mulhu_4xi32(ptr addrspace(1) nocapture readonly %in, ptr addrspace(1) nocapture %out) {2080; SI-LABEL: scalarize_mulhu_4xi32:2081; SI: ; %bb.0:2082; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92083; SI-NEXT: s_mov_b32 s7, 0xf0002084; SI-NEXT: s_mov_b32 s6, -12085; SI-NEXT: s_waitcnt lgkmcnt(0)2086; SI-NEXT: s_mov_b32 s4, s02087; SI-NEXT: s_mov_b32 s5, s12088; SI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 02089; SI-NEXT: s_mov_b32 s0, 0x1389c7552090; SI-NEXT: s_mov_b32 s4, s22091; SI-NEXT: s_mov_b32 s5, s32092; SI-NEXT: s_waitcnt vmcnt(0)2093; SI-NEXT: v_lshrrev_b32_e32 v0, 2, v02094; SI-NEXT: v_lshrrev_b32_e32 v1, 2, v12095; SI-NEXT: v_lshrrev_b32_e32 v2, 2, v22096; SI-NEXT: v_lshrrev_b32_e32 v3, 2, v32097; SI-NEXT: v_mul_hi_u32 v0, v0, s02098; SI-NEXT: v_mul_hi_u32 v1, v1, s02099; SI-NEXT: v_mul_hi_u32 v2, v2, s02100; SI-NEXT: v_mul_hi_u32 v3, v3, s02101; SI-NEXT: v_lshrrev_b32_e32 v0, 10, v02102; SI-NEXT: v_lshrrev_b32_e32 v1, 10, v12103; SI-NEXT: v_lshrrev_b32_e32 v2, 10, v22104; SI-NEXT: v_lshrrev_b32_e32 v3, 10, v32105; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 02106; SI-NEXT: s_endpgm2107;2108; VI-LABEL: scalarize_mulhu_4xi32:2109; VI: ; %bb.0:2110; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242111; VI-NEXT: s_mov_b32 s7, 0xf0002112; VI-NEXT: s_mov_b32 s6, -12113; VI-NEXT: s_waitcnt lgkmcnt(0)2114; VI-NEXT: s_mov_b32 s4, s02115; VI-NEXT: s_mov_b32 s5, s12116; VI-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 02117; VI-NEXT: s_mov_b32 s0, 0x1389c7552118; VI-NEXT: s_mov_b32 s4, s22119; VI-NEXT: s_mov_b32 s5, s32120; VI-NEXT: s_waitcnt vmcnt(0)2121; VI-NEXT: v_lshrrev_b32_e32 v0, 2, v02122; VI-NEXT: v_lshrrev_b32_e32 v1, 2, v12123; VI-NEXT: v_lshrrev_b32_e32 v2, 2, v22124; VI-NEXT: v_lshrrev_b32_e32 v3, 2, v32125; VI-NEXT: v_mul_hi_u32 v0, v0, s02126; VI-NEXT: v_mul_hi_u32 v1, v1, s02127; VI-NEXT: v_mul_hi_u32 v2, v2, s02128; VI-NEXT: v_mul_hi_u32 v3, v3, s02129; VI-NEXT: v_lshrrev_b32_e32 v0, 10, v02130; VI-NEXT: v_lshrrev_b32_e32 v1, 10, v12131; VI-NEXT: v_lshrrev_b32_e32 v2, 10, v22132; VI-NEXT: v_lshrrev_b32_e32 v3, 10, v32133; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 02134; VI-NEXT: s_endpgm2135;2136; GCN-LABEL: scalarize_mulhu_4xi32:2137; GCN: ; %bb.0:2138; GCN-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x02139; GCN-NEXT: s_add_i32 s12, s12, s172140; GCN-NEXT: s_mov_b32 flat_scratch_lo, s132141; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 82142; GCN-NEXT: s_waitcnt lgkmcnt(0)2143; GCN-NEXT: v_mov_b32_e32 v0, s02144; GCN-NEXT: v_mov_b32_e32 v1, s12145; GCN-NEXT: flat_load_dwordx4 v[0:3], v[0:1]2146; GCN-NEXT: s_mov_b32 s0, 0x1389c7552147; GCN-NEXT: v_mov_b32_e32 v4, s22148; GCN-NEXT: v_mov_b32_e32 v5, s32149; GCN-NEXT: s_waitcnt vmcnt(0)2150; GCN-NEXT: v_lshrrev_b32_e32 v0, 2, v02151; GCN-NEXT: v_lshrrev_b32_e32 v1, 2, v12152; GCN-NEXT: v_lshrrev_b32_e32 v2, 2, v22153; GCN-NEXT: v_lshrrev_b32_e32 v3, 2, v32154; GCN-NEXT: v_mul_hi_u32 v0, v0, s02155; GCN-NEXT: v_mul_hi_u32 v1, v1, s02156; GCN-NEXT: v_mul_hi_u32 v2, v2, s02157; GCN-NEXT: v_mul_hi_u32 v3, v3, s02158; GCN-NEXT: v_lshrrev_b32_e32 v0, 10, v02159; GCN-NEXT: v_lshrrev_b32_e32 v1, 10, v12160; GCN-NEXT: v_lshrrev_b32_e32 v2, 10, v22161; GCN-NEXT: v_lshrrev_b32_e32 v3, 10, v32162; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]2163; GCN-NEXT: s_endpgm2164;2165; GFX1030-LABEL: scalarize_mulhu_4xi32:2166; GFX1030: ; %bb.0:2167; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x02168; GFX1030-NEXT: v_mov_b32_e32 v4, 02169; GFX1030-NEXT: s_waitcnt lgkmcnt(0)2170; GFX1030-NEXT: global_load_dwordx4 v[0:3], v4, s[0:1]2171; GFX1030-NEXT: s_waitcnt vmcnt(0)2172; GFX1030-NEXT: v_lshrrev_b32_e32 v0, 2, v02173; GFX1030-NEXT: v_lshrrev_b32_e32 v1, 2, v12174; GFX1030-NEXT: v_lshrrev_b32_e32 v2, 2, v22175; GFX1030-NEXT: v_lshrrev_b32_e32 v3, 2, v32176; GFX1030-NEXT: v_mul_hi_u32 v0, 0x1389c755, v02177; GFX1030-NEXT: v_mul_hi_u32 v1, 0x1389c755, v12178; GFX1030-NEXT: v_mul_hi_u32 v2, 0x1389c755, v22179; GFX1030-NEXT: v_mul_hi_u32 v3, 0x1389c755, v32180; GFX1030-NEXT: v_lshrrev_b32_e32 v0, 10, v02181; GFX1030-NEXT: v_lshrrev_b32_e32 v1, 10, v12182; GFX1030-NEXT: v_lshrrev_b32_e32 v2, 10, v22183; GFX1030-NEXT: v_lshrrev_b32_e32 v3, 10, v32184; GFX1030-NEXT: global_store_dwordx4 v4, v[0:3], s[2:3]2185; GFX1030-NEXT: s_endpgm2186;2187; EG-LABEL: scalarize_mulhu_4xi32:2188; EG: ; %bb.0:2189; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]2190; EG-NEXT: TEX 0 @62191; EG-NEXT: ALU 20, @9, KC0[CB0:0-32], KC1[]2192; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 12193; EG-NEXT: CF_END2194; EG-NEXT: PAD2195; EG-NEXT: Fetch clause starting at 6:2196; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #12197; EG-NEXT: ALU clause starting at 8:2198; EG-NEXT: MOV * T0.X, KC0[2].Y,2199; EG-NEXT: ALU clause starting at 9:2200; EG-NEXT: LSHR T0.W, T0.W, literal.x,2201; EG-NEXT: LSHR * T1.W, T0.Z, literal.x,2202; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2203; EG-NEXT: MULHI * T0.Z, PV.W, literal.x,2204; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)2205; EG-NEXT: LSHR T1.Z, T0.Y, literal.x,2206; EG-NEXT: LSHR T0.W, PS, literal.y,2207; EG-NEXT: MULHI * T0.Y, T1.W, literal.z,2208; EG-NEXT: 2(2.802597e-45), 10(1.401298e-44)2209; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)2210; EG-NEXT: LSHR T0.Z, PS, literal.x,2211; EG-NEXT: LSHR T1.W, T0.X, literal.y,2212; EG-NEXT: MULHI * T0.X, PV.Z, literal.z,2213; EG-NEXT: 10(1.401298e-44), 2(2.802597e-45)2214; EG-NEXT: 327796565(3.478022e-27), 0(0.000000e+00)2215; EG-NEXT: LSHR T0.Y, PS, literal.x,2216; EG-NEXT: MULHI * T0.X, PV.W, literal.y,2217; EG-NEXT: 10(1.401298e-44), 327796565(3.478022e-27)2218; EG-NEXT: LSHR T0.X, PS, literal.x,2219; EG-NEXT: LSHR * T1.X, KC0[2].Z, literal.y,2220; EG-NEXT: 10(1.401298e-44), 2(2.802597e-45)2221 %1 = load <4 x i32>, ptr addrspace(1) %in, align 162222 %2 = udiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668>2223 store <4 x i32> %2, ptr addrspace(1) %out, align 162224 ret void2225}2226 2227define amdgpu_kernel void @test_udiv2(i32 %p) {2228; SI-LABEL: test_udiv2:2229; SI: ; %bb.0:2230; SI-NEXT: s_load_dword s0, s[4:5], 0x92231; SI-NEXT: s_mov_b32 s3, 0xf0002232; SI-NEXT: s_mov_b32 s2, -12233; SI-NEXT: s_waitcnt lgkmcnt(0)2234; SI-NEXT: s_lshr_b32 s0, s0, 12235; SI-NEXT: v_mov_b32_e32 v0, s02236; SI-NEXT: buffer_store_dword v0, off, s[0:3], 02237; SI-NEXT: s_waitcnt vmcnt(0)2238; SI-NEXT: s_endpgm2239;2240; VI-LABEL: test_udiv2:2241; VI: ; %bb.0:2242; VI-NEXT: s_load_dword s0, s[4:5], 0x242243; VI-NEXT: s_mov_b32 s3, 0xf0002244; VI-NEXT: s_mov_b32 s2, -12245; VI-NEXT: s_waitcnt lgkmcnt(0)2246; VI-NEXT: s_lshr_b32 s0, s0, 12247; VI-NEXT: v_mov_b32_e32 v0, s02248; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02249; VI-NEXT: s_waitcnt vmcnt(0)2250; VI-NEXT: s_endpgm2251;2252; GCN-LABEL: test_udiv2:2253; GCN: ; %bb.0:2254; GCN-NEXT: s_load_dword s0, s[8:9], 0x02255; GCN-NEXT: s_add_i32 s12, s12, s172256; GCN-NEXT: s_mov_b32 flat_scratch_lo, s132257; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 82258; GCN-NEXT: s_waitcnt lgkmcnt(0)2259; GCN-NEXT: s_lshr_b32 s0, s0, 12260; GCN-NEXT: v_mov_b32_e32 v0, s02261; GCN-NEXT: flat_store_dword v[0:1], v02262; GCN-NEXT: s_waitcnt vmcnt(0)2263; GCN-NEXT: s_endpgm2264;2265; GFX1030-LABEL: test_udiv2:2266; GFX1030: ; %bb.0:2267; GFX1030-NEXT: s_load_dword s0, s[8:9], 0x02268; GFX1030-NEXT: s_waitcnt lgkmcnt(0)2269; GFX1030-NEXT: s_lshr_b32 s0, s0, 12270; GFX1030-NEXT: v_mov_b32_e32 v0, s02271; GFX1030-NEXT: global_store_dword v[0:1], v0, off2272; GFX1030-NEXT: s_waitcnt_vscnt null, 0x02273; GFX1030-NEXT: s_endpgm2274;2275; EG-LABEL: test_udiv2:2276; EG: ; %bb.0:2277; EG-NEXT: ALU 2, @4, KC0[CB0:0-32], KC1[]2278; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.X, T0.X, 12279; EG-NEXT: CF_END2280; EG-NEXT: PAD2281; EG-NEXT: ALU clause starting at 4:2282; EG-NEXT: MOV T0.X, literal.x,2283; EG-NEXT: LSHR * T1.X, KC0[2].Y, 1,2284; EG-NEXT: 0(0.000000e+00), 0(0.000000e+00)2285 %i = udiv i32 %p, 22286 store volatile i32 %i, ptr addrspace(1) poison2287 ret void2288}2289 2290define amdgpu_kernel void @test_udiv_3_mulhu(i32 %p) {2291; SI-LABEL: test_udiv_3_mulhu:2292; SI: ; %bb.0:2293; SI-NEXT: s_load_dword s0, s[4:5], 0x92294; SI-NEXT: v_mov_b32_e32 v0, 0xaaaaaaab2295; SI-NEXT: s_mov_b32 s3, 0xf0002296; SI-NEXT: s_mov_b32 s2, -12297; SI-NEXT: s_waitcnt lgkmcnt(0)2298; SI-NEXT: v_mul_hi_u32 v0, s0, v02299; SI-NEXT: v_lshrrev_b32_e32 v0, 1, v02300; SI-NEXT: buffer_store_dword v0, off, s[0:3], 02301; SI-NEXT: s_waitcnt vmcnt(0)2302; SI-NEXT: s_endpgm2303;2304; VI-LABEL: test_udiv_3_mulhu:2305; VI: ; %bb.0:2306; VI-NEXT: s_load_dword s0, s[4:5], 0x242307; VI-NEXT: v_mov_b32_e32 v0, 0xaaaaaaab2308; VI-NEXT: s_mov_b32 s3, 0xf0002309; VI-NEXT: s_mov_b32 s2, -12310; VI-NEXT: s_waitcnt lgkmcnt(0)2311; VI-NEXT: v_mul_hi_u32 v0, s0, v02312; VI-NEXT: v_lshrrev_b32_e32 v0, 1, v02313; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02314; VI-NEXT: s_waitcnt vmcnt(0)2315; VI-NEXT: s_endpgm2316;2317; GCN-LABEL: test_udiv_3_mulhu:2318; GCN: ; %bb.0:2319; GCN-NEXT: s_load_dword s0, s[8:9], 0x02320; GCN-NEXT: v_mov_b32_e32 v0, 0xaaaaaaab2321; GCN-NEXT: s_add_i32 s12, s12, s172322; GCN-NEXT: s_mov_b32 flat_scratch_lo, s132323; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 82324; GCN-NEXT: s_waitcnt lgkmcnt(0)2325; GCN-NEXT: v_mul_hi_u32 v0, s0, v02326; GCN-NEXT: v_lshrrev_b32_e32 v0, 1, v02327; GCN-NEXT: flat_store_dword v[0:1], v02328; GCN-NEXT: s_waitcnt vmcnt(0)2329; GCN-NEXT: s_endpgm2330;2331; GFX1030-LABEL: test_udiv_3_mulhu:2332; GFX1030: ; %bb.0:2333; GFX1030-NEXT: s_load_dword s0, s[8:9], 0x02334; GFX1030-NEXT: s_waitcnt lgkmcnt(0)2335; GFX1030-NEXT: s_mul_hi_u32 s0, s0, 0xaaaaaaab2336; GFX1030-NEXT: s_lshr_b32 s0, s0, 12337; GFX1030-NEXT: v_mov_b32_e32 v0, s02338; GFX1030-NEXT: global_store_dword v[0:1], v0, off2339; GFX1030-NEXT: s_waitcnt_vscnt null, 0x02340; GFX1030-NEXT: s_endpgm2341;2342; EG-LABEL: test_udiv_3_mulhu:2343; EG: ; %bb.0:2344; EG-NEXT: ALU 4, @4, KC0[CB0:0-32], KC1[]2345; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 12346; EG-NEXT: CF_END2347; EG-NEXT: PAD2348; EG-NEXT: ALU clause starting at 4:2349; EG-NEXT: MULHI * T0.X, KC0[2].Y, literal.x,2350; EG-NEXT: -1431655765(-3.031649e-13), 0(0.000000e+00)2351; EG-NEXT: LSHR T0.X, PS, 1,2352; EG-NEXT: MOV * T1.X, literal.x,2353; EG-NEXT: 0(0.000000e+00), 0(0.000000e+00)2354 %i = udiv i32 %p, 32355 store volatile i32 %i, ptr addrspace(1) poison2356 ret void2357}2358 2359define amdgpu_kernel void @fdiv_test_denormals(ptr addrspace(1) nocapture readonly %arg) {2360; SI-LABEL: fdiv_test_denormals:2361; SI: ; %bb.0: ; %bb2362; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92363; SI-NEXT: s_mov_b32 s3, 0xf0002364; SI-NEXT: s_mov_b32 s2, -12365; SI-NEXT: s_mov_b64 s[4:5], 02366; SI-NEXT: s_mov_b32 s6, s22367; SI-NEXT: s_waitcnt lgkmcnt(0)2368; SI-NEXT: buffer_load_sbyte v0, off, s[0:3], 02369; SI-NEXT: s_mov_b32 s7, s32370; SI-NEXT: buffer_load_sbyte v1, off, s[4:7], 02371; SI-NEXT: s_waitcnt vmcnt(1)2372; SI-NEXT: v_cvt_f32_i32_e32 v2, v02373; SI-NEXT: s_waitcnt vmcnt(0)2374; SI-NEXT: v_cvt_f32_i32_e32 v3, v12375; SI-NEXT: v_xor_b32_e32 v0, v1, v02376; SI-NEXT: v_rcp_iflag_f32_e32 v4, v22377; SI-NEXT: v_ashrrev_i32_e32 v0, 30, v02378; SI-NEXT: v_or_b32_e32 v0, 1, v02379; SI-NEXT: v_mul_f32_e32 v1, v3, v42380; SI-NEXT: v_trunc_f32_e32 v1, v12381; SI-NEXT: v_mad_f32 v3, -v1, v2, v32382; SI-NEXT: v_cvt_i32_f32_e32 v1, v12383; SI-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|2384; SI-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc2385; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v12386; SI-NEXT: buffer_store_byte v0, off, s[4:7], 02387; SI-NEXT: s_endpgm2388;2389; VI-LABEL: fdiv_test_denormals:2390; VI: ; %bb.0: ; %bb2391; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242392; VI-NEXT: s_mov_b32 s3, 0xf0002393; VI-NEXT: s_mov_b32 s2, -12394; VI-NEXT: s_mov_b64 s[4:5], 02395; VI-NEXT: s_mov_b32 s6, s22396; VI-NEXT: s_waitcnt lgkmcnt(0)2397; VI-NEXT: buffer_load_sbyte v0, off, s[0:3], 02398; VI-NEXT: s_mov_b32 s7, s32399; VI-NEXT: buffer_load_sbyte v1, off, s[4:7], 02400; VI-NEXT: s_waitcnt vmcnt(1)2401; VI-NEXT: v_cvt_f32_i32_e32 v2, v02402; VI-NEXT: s_waitcnt vmcnt(0)2403; VI-NEXT: v_cvt_f32_i32_e32 v3, v12404; VI-NEXT: v_xor_b32_e32 v0, v1, v02405; VI-NEXT: v_rcp_iflag_f32_e32 v4, v22406; VI-NEXT: v_ashrrev_i32_e32 v0, 30, v02407; VI-NEXT: v_or_b32_e32 v0, 1, v02408; VI-NEXT: v_mul_f32_e32 v1, v3, v42409; VI-NEXT: v_trunc_f32_e32 v1, v12410; VI-NEXT: v_mad_f32 v3, -v1, v2, v32411; VI-NEXT: v_cvt_i32_f32_e32 v1, v12412; VI-NEXT: v_cmp_ge_f32_e64 vcc, |v3|, |v2|2413; VI-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc2414; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v12415; VI-NEXT: buffer_store_byte v0, off, s[4:7], 02416; VI-NEXT: s_endpgm2417;2418; GCN-LABEL: fdiv_test_denormals:2419; GCN: ; %bb.0: ; %bb2420; GCN-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x02421; GCN-NEXT: s_add_i32 s12, s12, s172422; GCN-NEXT: s_mov_b32 flat_scratch_lo, s132423; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 82424; GCN-NEXT: s_waitcnt lgkmcnt(0)2425; GCN-NEXT: v_mov_b32_e32 v0, s02426; GCN-NEXT: v_mov_b32_e32 v1, s12427; GCN-NEXT: flat_load_sbyte v2, v[0:1]2428; GCN-NEXT: v_mov_b32_e32 v0, 02429; GCN-NEXT: v_mov_b32_e32 v1, 02430; GCN-NEXT: flat_load_sbyte v3, v[0:1]2431; GCN-NEXT: s_waitcnt vmcnt(1)2432; GCN-NEXT: v_cvt_f32_i32_e32 v4, v22433; GCN-NEXT: s_waitcnt vmcnt(0)2434; GCN-NEXT: v_cvt_f32_i32_e32 v5, v32435; GCN-NEXT: v_rcp_iflag_f32_e32 v6, v42436; GCN-NEXT: v_xor_b32_e32 v2, v3, v22437; GCN-NEXT: v_ashrrev_i32_e32 v2, 30, v22438; GCN-NEXT: v_or_b32_e32 v2, 1, v22439; GCN-NEXT: v_mul_f32_e32 v3, v5, v62440; GCN-NEXT: v_trunc_f32_e32 v3, v32441; GCN-NEXT: v_mad_f32 v5, -v3, v4, v52442; GCN-NEXT: v_cvt_i32_f32_e32 v3, v32443; GCN-NEXT: v_cmp_ge_f32_e64 vcc, |v5|, |v4|2444; GCN-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc2445; GCN-NEXT: v_add_u32_e32 v2, vcc, v2, v32446; GCN-NEXT: flat_store_byte v[0:1], v22447; GCN-NEXT: s_endpgm2448;2449; GFX1030-LABEL: fdiv_test_denormals:2450; GFX1030: ; %bb.0: ; %bb2451; GFX1030-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x02452; GFX1030-NEXT: v_mov_b32_e32 v0, 02453; GFX1030-NEXT: s_waitcnt lgkmcnt(0)2454; GFX1030-NEXT: global_load_sbyte v2, v0, s[0:1]2455; GFX1030-NEXT: v_mov_b32_e32 v0, 02456; GFX1030-NEXT: v_mov_b32_e32 v1, 02457; GFX1030-NEXT: global_load_sbyte v3, v[0:1], off2458; GFX1030-NEXT: s_waitcnt vmcnt(1)2459; GFX1030-NEXT: v_cvt_f32_i32_e32 v4, v22460; GFX1030-NEXT: v_rcp_iflag_f32_e32 v5, v42461; GFX1030-NEXT: s_waitcnt vmcnt(0)2462; GFX1030-NEXT: v_cvt_f32_i32_e32 v6, v32463; GFX1030-NEXT: v_xor_b32_e32 v2, v3, v22464; GFX1030-NEXT: v_ashrrev_i32_e32 v2, 30, v22465; GFX1030-NEXT: v_mul_f32_e32 v5, v6, v52466; GFX1030-NEXT: v_or_b32_e32 v2, 1, v22467; GFX1030-NEXT: v_trunc_f32_e32 v3, v52468; GFX1030-NEXT: v_fma_f32 v5, -v3, v4, v62469; GFX1030-NEXT: v_cvt_i32_f32_e32 v3, v32470; GFX1030-NEXT: v_cmp_ge_f32_e64 vcc_lo, |v5|, |v4|2471; GFX1030-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc_lo2472; GFX1030-NEXT: v_add_nc_u32_e32 v2, v3, v22473; GFX1030-NEXT: global_store_byte v[0:1], v2, off2474; GFX1030-NEXT: s_endpgm2475;2476; EG-LABEL: fdiv_test_denormals:2477; EG: ; %bb.0: ; %bb2478; EG-NEXT: ALU 0, @12, KC0[CB0:0-32], KC1[]2479; EG-NEXT: TEX 0 @82480; EG-NEXT: ALU 0, @13, KC0[], KC1[]2481; EG-NEXT: TEX 0 @102482; EG-NEXT: ALU 25, @14, KC0[], KC1[]2483; EG-NEXT: MEM_RAT MSKOR T0.XW, T1.X2484; EG-NEXT: CF_END2485; EG-NEXT: PAD2486; EG-NEXT: Fetch clause starting at 8:2487; EG-NEXT: VTX_READ_8 T0.X, T0.X, 0, #12488; EG-NEXT: Fetch clause starting at 10:2489; EG-NEXT: VTX_READ_8 T1.X, T1.X, 0, #12490; EG-NEXT: ALU clause starting at 12:2491; EG-NEXT: MOV * T0.X, KC0[2].Y,2492; EG-NEXT: ALU clause starting at 13:2493; EG-NEXT: MOV * T1.X, 0.0,2494; EG-NEXT: ALU clause starting at 14:2495; EG-NEXT: BFE_INT * T0.W, T0.X, 0.0, literal.x,2496; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)2497; EG-NEXT: INT_TO_FLT * T0.X, PV.W,2498; EG-NEXT: BFE_INT T1.W, T1.X, 0.0, literal.x,2499; EG-NEXT: RECIP_IEEE * T0.Y, PS,2500; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)2501; EG-NEXT: INT_TO_FLT * T0.Z, PV.W,2502; EG-NEXT: MUL_IEEE * T2.W, PS, T0.Y,2503; EG-NEXT: TRUNC T2.W, PV.W,2504; EG-NEXT: XOR_INT * T0.W, T1.W, T0.W,2505; EG-NEXT: ASHR T0.W, PS, literal.x,2506; EG-NEXT: MULADD_IEEE * T1.W, -PV.W, T0.X, T0.Z,2507; EG-NEXT: 30(4.203895e-44), 0(0.000000e+00)2508; EG-NEXT: TRUNC T0.Z, T2.W,2509; EG-NEXT: SETGE T1.W, |PS|, |T0.X|,2510; EG-NEXT: OR_INT * T0.W, PV.W, 1,2511; EG-NEXT: CNDE T0.W, PV.W, 0.0, PS,2512; EG-NEXT: FLT_TO_INT * T1.W, PV.Z,2513; EG-NEXT: ADD_INT * T0.W, PS, PV.W,2514; EG-NEXT: AND_INT T0.X, PV.W, literal.x,2515; EG-NEXT: MOV * T0.W, literal.x,2516; EG-NEXT: 255(3.573311e-43), 0(0.000000e+00)2517; EG-NEXT: MOV T0.Y, 0.0,2518; EG-NEXT: MOV * T0.Z, 0.0,2519; EG-NEXT: MOV * T1.X, literal.x,2520; EG-NEXT: 0(0.000000e+00), 0(0.000000e+00)2521bb:2522 %tmp = load i8, ptr addrspace(1) null, align 12523 %tmp1 = sext i8 %tmp to i322524 %tmp2 = getelementptr inbounds i8, ptr addrspace(1) %arg, i64 02525 %tmp3 = load i8, ptr addrspace(1) %tmp2, align 12526 %tmp4 = sext i8 %tmp3 to i322527 %tmp5 = sdiv i32 %tmp1, %tmp42528 %tmp6 = trunc i32 %tmp5 to i82529 store i8 %tmp6, ptr addrspace(1) null, align 12530 ret void2531}2532 2533define i64 @v_test_udiv64_mulhi_fold(i64 %arg) {2534; SI-LABEL: v_test_udiv64_mulhi_fold:2535; SI: ; %bb.0:2536; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2537; SI-NEXT: v_alignbit_b32 v0, v1, v0, 52538; SI-NEXT: s_mov_b32 s4, 0x71b478432539; SI-NEXT: v_lshrrev_b32_e32 v1, 5, v12540; SI-NEXT: v_mul_hi_u32 v3, v0, s42541; SI-NEXT: v_mul_lo_u32 v4, v1, s42542; SI-NEXT: s_mov_b32 s6, 0xa7c5ac42543; SI-NEXT: v_mul_hi_u32 v5, v1, s42544; SI-NEXT: v_mul_hi_u32 v2, v0, s62545; SI-NEXT: v_mul_lo_u32 v0, v0, s62546; SI-NEXT: v_add_i32_e32 v3, vcc, v4, v32547; SI-NEXT: v_addc_u32_e32 v4, vcc, 0, v5, vcc2548; SI-NEXT: v_add_i32_e32 v0, vcc, v0, v32549; SI-NEXT: v_addc_u32_e32 v0, vcc, 0, v2, vcc2550; SI-NEXT: v_mul_lo_u32 v2, v1, s62551; SI-NEXT: v_mul_hi_u32 v1, v1, s62552; SI-NEXT: v_add_i32_e32 v0, vcc, v4, v02553; SI-NEXT: v_addc_u32_e64 v3, s[4:5], 0, 0, vcc2554; SI-NEXT: v_add_i32_e32 v0, vcc, v2, v02555; SI-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc2556; SI-NEXT: v_alignbit_b32 v0, v1, v0, 72557; SI-NEXT: v_lshrrev_b32_e32 v1, 7, v12558; SI-NEXT: s_setpc_b64 s[30:31]2559;2560; VI-LABEL: v_test_udiv64_mulhi_fold:2561; VI: ; %bb.0:2562; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2563; VI-NEXT: v_alignbit_b32 v4, v1, v0, 52564; VI-NEXT: s_mov_b32 s4, 0x71b478432565; VI-NEXT: v_mul_hi_u32 v2, v4, s42566; VI-NEXT: v_mov_b32_e32 v3, 02567; VI-NEXT: v_lshrrev_b32_e32 v5, 5, v12568; VI-NEXT: s_mov_b32 s6, 0xa7c5ac42569; VI-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, s4, v[2:3]2570; VI-NEXT: v_mov_b32_e32 v2, v02571; VI-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v4, s6, v[2:3]2572; VI-NEXT: v_add_u32_e32 v0, vcc, v1, v32573; VI-NEXT: v_addc_u32_e64 v1, s[4:5], 0, 0, vcc2574; VI-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, s6, v[0:1]2575; VI-NEXT: v_alignbit_b32 v0, v1, v0, 72576; VI-NEXT: v_lshrrev_b32_e32 v1, 7, v12577; VI-NEXT: s_setpc_b64 s[30:31]2578;2579; GCN-LABEL: v_test_udiv64_mulhi_fold:2580; GCN: ; %bb.0:2581; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2582; GCN-NEXT: v_alignbit_b32 v4, v1, v0, 52583; GCN-NEXT: s_mov_b32 s4, 0x71b478432584; GCN-NEXT: v_mul_hi_u32 v2, v4, s42585; GCN-NEXT: v_mov_b32_e32 v3, 02586; GCN-NEXT: v_lshrrev_b32_e32 v5, 5, v12587; GCN-NEXT: s_mov_b32 s6, 0xa7c5ac42588; GCN-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, s4, v[2:3]2589; GCN-NEXT: v_mov_b32_e32 v2, v02590; GCN-NEXT: v_mad_u64_u32 v[2:3], s[4:5], v4, s6, v[2:3]2591; GCN-NEXT: v_add_u32_e32 v0, vcc, v1, v32592; GCN-NEXT: v_addc_u32_e64 v1, s[4:5], 0, 0, vcc2593; GCN-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v5, s6, v[0:1]2594; GCN-NEXT: v_alignbit_b32 v0, v1, v0, 72595; GCN-NEXT: v_lshrrev_b32_e32 v1, 7, v12596; GCN-NEXT: s_setpc_b64 s[30:31]2597;2598; GFX1030-LABEL: v_test_udiv64_mulhi_fold:2599; GFX1030: ; %bb.0:2600; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2601; GFX1030-NEXT: v_alignbit_b32 v4, v1, v0, 52602; GFX1030-NEXT: v_mov_b32_e32 v3, 02603; GFX1030-NEXT: v_lshrrev_b32_e32 v5, 5, v12604; GFX1030-NEXT: v_mul_hi_u32 v2, 0x71b47843, v42605; GFX1030-NEXT: v_mad_u64_u32 v[0:1], null, 0x71b47843, v5, v[2:3]2606; GFX1030-NEXT: v_mov_b32_e32 v2, v02607; GFX1030-NEXT: v_mad_u64_u32 v[2:3], null, 0xa7c5ac4, v4, v[2:3]2608; GFX1030-NEXT: v_add_co_u32 v0, s4, v1, v32609; GFX1030-NEXT: v_add_co_ci_u32_e64 v1, null, 0, 0, s42610; GFX1030-NEXT: v_mad_u64_u32 v[0:1], null, 0xa7c5ac4, v5, v[0:1]2611; GFX1030-NEXT: v_alignbit_b32 v0, v1, v0, 72612; GFX1030-NEXT: v_lshrrev_b32_e32 v1, 7, v12613; GFX1030-NEXT: s_setpc_b64 s[30:31]2614;2615; EG-LABEL: v_test_udiv64_mulhi_fold:2616; EG: ; %bb.0:2617; EG-NEXT: CF_END2618; EG-NEXT: PAD2619 %d = udiv i64 %arg, 1000002620 ret i64 %d2621}2622