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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a %s -o - | FileCheck %s3 4declare ptr @G()5 6define amdgpu_kernel void @foo(ptr addrspace(5) %ptr5, ptr %p0, double %v0, <4 x i32> %vec) {7; CHECK-LABEL: foo:8; CHECK: ; %bb.0: ; %entry9; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s1710; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 011; CHECK-NEXT: v_pk_mov_b32 v[44:45], 0, 012; CHECK-NEXT: flat_load_dword v42, v[44:45]13; CHECK-NEXT: s_mov_b64 s[34:35], s[8:9]14; CHECK-NEXT: s_load_dwordx4 s[64:67], s[34:35], 0x815; CHECK-NEXT: s_load_dword s68, s[34:35], 0x016; CHECK-NEXT: s_add_u32 s0, s0, s1717; CHECK-NEXT: s_addc_u32 s1, s1, 018; CHECK-NEXT: s_mov_b64 s[8:9], src_private_base19; CHECK-NEXT: s_mov_b64 s[38:39], s[6:7]20; CHECK-NEXT: s_waitcnt lgkmcnt(0)21; CHECK-NEXT: s_cmp_lg_u32 s68, -122; CHECK-NEXT: s_mov_b64 s[48:49], s[4:5]23; CHECK-NEXT: s_mov_b32 s4, 024; CHECK-NEXT: s_cselect_b32 s5, s9, 025; CHECK-NEXT: s_cselect_b32 s6, s68, 026; CHECK-NEXT: s_add_u32 s50, s34, 4827; CHECK-NEXT: v_mov_b32_e32 v47, s528; CHECK-NEXT: s_mov_b32 s5, s429; CHECK-NEXT: s_addc_u32 s51, s35, 030; CHECK-NEXT: v_pk_mov_b32 v[62:63], s[4:5], s[4:5] op_sel:[0,1]31; CHECK-NEXT: s_getpc_b64 s[4:5]32; CHECK-NEXT: s_add_u32 s4, s4, G@gotpcrel32@lo+433; CHECK-NEXT: s_addc_u32 s5, s5, G@gotpcrel32@hi+1234; CHECK-NEXT: s_load_dwordx2 s[54:55], s[4:5], 0x035; CHECK-NEXT: s_mov_b32 s53, s1436; CHECK-NEXT: v_mov_b32_e32 v46, s637; CHECK-NEXT: v_pk_mov_b32 v[56:57], s[64:65], s[64:65] op_sel:[0,1]38; CHECK-NEXT: s_mov_b64 s[4:5], s[48:49]39; CHECK-NEXT: s_mov_b64 s[6:7], s[38:39]40; CHECK-NEXT: s_mov_b64 s[8:9], s[50:51]41; CHECK-NEXT: s_mov_b32 s12, s1442; CHECK-NEXT: s_mov_b32 s13, s1543; CHECK-NEXT: s_mov_b32 s14, s1644; CHECK-NEXT: v_mov_b32_e32 v31, v045; CHECK-NEXT: s_mov_b32 s32, 046; CHECK-NEXT: s_mov_b32 s33, s1647; CHECK-NEXT: s_mov_b32 s52, s1548; CHECK-NEXT: s_mov_b64 s[36:37], s[10:11]49; CHECK-NEXT: v_mov_b32_e32 v40, v050; CHECK-NEXT: v_mov_b32_e32 v60, s6651; CHECK-NEXT: v_mov_b32_e32 v61, s6752; CHECK-NEXT: flat_store_dwordx2 v[56:57], v[62:63]53; CHECK-NEXT: ; kill: def $sgpr15 killed $sgpr1554; CHECK-NEXT: s_waitcnt lgkmcnt(0)55; CHECK-NEXT: s_swappc_b64 s[30:31], s[54:55]56; CHECK-NEXT: flat_load_dwordx2 a[32:33], v[56:57]57; CHECK-NEXT: v_mov_b32_e32 v58, 058; CHECK-NEXT: v_mov_b32_e32 v59, 0x3ff0000059; CHECK-NEXT: s_mov_b64 s[4:5], s[48:49]60; CHECK-NEXT: s_mov_b64 s[6:7], s[38:39]61; CHECK-NEXT: s_mov_b64 s[8:9], s[50:51]62; CHECK-NEXT: s_mov_b64 s[10:11], s[36:37]63; CHECK-NEXT: s_mov_b32 s12, s5364; CHECK-NEXT: s_mov_b32 s13, s5265; CHECK-NEXT: s_mov_b32 s14, s3366; CHECK-NEXT: v_mov_b32_e32 v31, v4067; CHECK-NEXT: flat_store_dwordx2 v[44:45], v[58:59]68; CHECK-NEXT: flat_store_dwordx2 v[56:57], v[62:63]69; CHECK-NEXT: s_waitcnt vmcnt(0)70; CHECK-NEXT: ; kill: def $sgpr15 killed $sgpr1571; CHECK-NEXT: s_swappc_b64 s[30:31], s[54:55]72; CHECK-NEXT: flat_load_dwordx2 v[0:1], v[46:47] glc73; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)74; CHECK-NEXT: v_mov_b32_e32 v1, s6775; CHECK-NEXT: v_mov_b32_e32 v0, s6876; CHECK-NEXT: v_cmp_lt_i32_e32 vcc, 0, v4277; CHECK-NEXT: flat_store_dwordx2 v[56:57], a[32:33]78; CHECK-NEXT: s_waitcnt vmcnt(0)79; CHECK-NEXT: flat_store_dwordx2 v[56:57], v[60:61]80; CHECK-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:481; CHECK-NEXT: buffer_store_dword v58, v0, s[0:3], 0 offen82; CHECK-NEXT: ; implicit-def: $vgpr483; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc84; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[4:5]85; CHECK-NEXT: s_cbranch_execz .LBB0_486; CHECK-NEXT: ; %bb.1: ; %LeafBlock587; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4288; CHECK-NEXT: v_mov_b32_e32 v4, 089; CHECK-NEXT: s_and_saveexec_b64 s[6:7], vcc90; CHECK-NEXT: ; %bb.2: ; %sw.bb17.i.i.i.i91; CHECK-NEXT: v_mov_b32_e32 v4, 192; CHECK-NEXT: ; %bb.3: ; %Flow93; CHECK-NEXT: s_or_b64 exec, exec, s[6:7]94; CHECK-NEXT: .LBB0_4: ; %Flow895; CHECK-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]96; CHECK-NEXT: v_pk_mov_b32 v[0:1], v[42:43], v[42:43] op_sel:[0,1]97; CHECK-NEXT: v_pk_mov_b32 v[2:3], v[44:45], v[44:45] op_sel:[0,1]98; CHECK-NEXT: s_xor_b64 exec, exec, s[4:5]99; CHECK-NEXT: s_cbranch_execz .LBB0_8100; CHECK-NEXT: ; %bb.5: ; %LeafBlock101; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v42102; CHECK-NEXT: v_pk_mov_b32 v[0:1], v[42:43], v[42:43] op_sel:[0,1]103; CHECK-NEXT: v_pk_mov_b32 v[2:3], v[44:45], v[44:45] op_sel:[0,1]104; CHECK-NEXT: s_and_saveexec_b64 s[6:7], vcc105; CHECK-NEXT: ; %bb.6: ; %sw.bb.i.i.i.i106; CHECK-NEXT: v_mov_b32_e32 v0, 0107; CHECK-NEXT: ; %bb.7: ; %Flow7108; CHECK-NEXT: s_or_b64 exec, exec, s[6:7]109; CHECK-NEXT: v_mov_b32_e32 v4, 0110; CHECK-NEXT: .LBB0_8: ; %bb.1111; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]112; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4113; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc114; CHECK-NEXT: s_cbranch_execz .LBB0_10115; CHECK-NEXT: ; %bb.9: ; %sw.bb.i.i.i.i.i116; CHECK-NEXT: s_load_dwordx4 s[8:11], s[34:35], 0x20117; CHECK-NEXT: s_waitcnt lgkmcnt(0)118; CHECK-NEXT: v_pk_mov_b32 v[0:1], s[8:9], s[8:9] op_sel:[0,1]119; CHECK-NEXT: v_pk_mov_b32 v[2:3], s[10:11], s[10:11] op_sel:[0,1]120; CHECK-NEXT: .LBB0_10: ; %bb.2121; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]122; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0123; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc124; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]125; CHECK-NEXT: buffer_store_dword v42, off, s[0:3], 0126; CHECK-NEXT: s_endpgm127entry:128 %load.null = load i32, ptr null, align 8129 %insert = insertelement <4 x i32> zeroinitializer, i32 %load.null, i64 0130 %cast = addrspacecast ptr addrspace(5) %ptr5 to ptr131 store double 0.000000e+00, ptr %p0, align 8132 %call = tail call ptr @G()133 store double 1.000000e+00, ptr null, align 8134 %load.0 = load double, ptr %p0, align 8135 store volatile double 0.000000e+00, ptr %p0, align 8136 %call.1 = tail call ptr @G()137 %load.1 = load volatile double, ptr %cast, align 8138 store volatile double %load.0, ptr %p0, align 8139 store double %v0, ptr %p0, align 8140 %load.2 = load double, ptr %p0, align 8141 store double %load.2, ptr addrspace(5) %ptr5, align 8142 store i32 0, ptr addrspace(5) %ptr5, align 4143 switch i32 %load.null, label %bb.1 [144 i32 0, label %sw.bb.i.i.i.i145 i32 1, label %sw.bb17.i.i.i.i146 ]147 148sw.bb.i.i.i.i: ; preds = %entry149 br label %bb.1150 151sw.bb17.i.i.i.i: ; preds = %entry152 br label %bb.1153 154bb.1: ; preds = %sw.bb17.i.i.i.i, %sw.bb.i.i.i.i, %entry155 %phi.0 = phi i32 [ 0, %entry ], [ 0, %sw.bb.i.i.i.i ], [ 1, %sw.bb17.i.i.i.i ]156 %phi.1 = phi <4 x i32> [ %insert, %entry ], [ zeroinitializer, %sw.bb.i.i.i.i ], [ %insert, %sw.bb17.i.i.i.i ]157 switch i32 %phi.0, label %bb.2 [158 i32 0, label %sw.bb.i.i.i.i.i159 ]160 161sw.bb.i.i.i.i.i: ; preds = %bb.1162 br label %bb.2163 164bb.2: ; preds = %sw.bb.i.i.i.i.i, %bb.1165 %phi.2 = phi <4 x i32> [ %phi.1, %bb.1 ], [ %vec, %sw.bb.i.i.i.i.i ]166 %extract.1 = extractelement <4 x i32> %phi.2, i64 0167 switch i32 1, label %bb.3 [168 i32 0, label %sw.bb.i.i5.i.i169 ]170 171sw.bb.i.i5.i.i: ; preds = %bb.2172 br label %bb.3173 174bb.3: ; preds = %sw.bb.i.i5.i.i, %bb.2175 %phi.3 = phi <4 x i32> [ zeroinitializer, %sw.bb.i.i5.i.i ], [ %insert, %bb.2 ]176 switch i32 %extract.1, label %bb.4 [177 i32 0, label %sw.bb7.i.i.i3.i.i178 ]179 180sw.bb7.i.i.i3.i.i: ; preds = %bb.3181 %insert.0 = insertelement <4 x i32> %insert, i32 0, i64 1182 br label %bb.4183 184bb.4: ; preds = %sw.bb7.i.i.i3.i.i, %bb.3185 %phi.4 = phi <4 x i32> [ %phi.3, %bb.3 ], [ %insert.0, %sw.bb7.i.i.i3.i.i ]186 %extract = extractelement <4 x i32> %phi.4, i64 0187 store i32 %extract, ptr addrspace(5) null, align 4188 ret void189}190