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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=amdgcn-- -S -amdgpu-unify-divergent-exit-nodes -verify -simplifycfg-require-and-preserve-domtree=1 %s | FileCheck -check-prefix=IR %s3 4; Make sure that the phi in n28 is updated when the block is split by unify5; divergent exit nodes.6 7define amdgpu_ps void @_amdgpu_ps_main() local_unnamed_addr #3 {8; IR-LABEL: @_amdgpu_ps_main(9; IR-NEXT:  .entry:10; IR-NEXT:    br label [[DOTLOOPEXIT:%.*]]11; IR:       .loopexit:12; IR-NEXT:    br label [[N28:%.*]]13; IR:       n28:14; IR-NEXT:    [[DOT01:%.*]] = phi float [ 0.000000e+00, [[DOTLOOPEXIT]] ], [ [[N29:%.*]], [[TRANSITIONBLOCK:%.*]] ]15; IR-NEXT:    [[N29]] = fadd float [[DOT01]], 1.000000e+0016; IR-NEXT:    [[N30:%.*]] = fcmp ogt float [[N29]], 4.000000e+0017; IR-NEXT:    br i1 true, label [[TRANSITIONBLOCK]], label [[DUMMYRETURNBLOCK:%.*]]18; IR:       TransitionBlock:19; IR-NEXT:    br i1 [[N30]], label [[DOTLOOPEXIT]], label [[N28]]20; IR:       n31:21; IR-NEXT:    ret void22; IR:       DummyReturnBlock:23; IR-NEXT:    ret void24;25.entry:26  br label %.loopexit27 28.loopexit:                                        ; preds = %n28, %.entry29  br label %n2830 31n28:                                               ; preds = %.loopexit, %n2832  %.01 = phi float [ 0.000000e+00, %.loopexit ], [ %n29, %n28 ]33  %n29 = fadd float %.01, 1.034  %n30 = fcmp ogt float %n29, 4.000000e+0035  br i1 %n30, label %.loopexit, label %n2836 37n31:                                               ; preds =38  ret void39}40 41define amdgpu_ps void @_amdgpu_ps_main_callbr() local_unnamed_addr #3 {42; IR-LABEL: @_amdgpu_ps_main_callbr(43; IR-NEXT:  .entry:44; IR-NEXT:    callbr void asm "", ""()45; IR-NEXT:            to label [[DOTLOOPEXIT:%.*]] []46; IR:       .loopexit:47; IR-NEXT:    callbr void asm "", ""()48; IR-NEXT:            to label [[N28:%.*]] []49; IR:       n28:50; IR-NEXT:    [[DOT01:%.*]] = phi float [ 0.000000e+00, [[DOTLOOPEXIT]] ], [ [[N29:%.*]], [[TRANSITIONBLOCK:%.*]] ]51; IR-NEXT:    [[N29]] = fadd float [[DOT01]], 1.000000e+0052; IR-NEXT:    [[N30:%.*]] = fcmp ogt float [[N29]], 4.000000e+0053; IR-NEXT:    [[N30_32:%.*]] = zext i1 [[N30]] to i3254; IR-NEXT:    br i1 true, label [[TRANSITIONBLOCK]], label [[DUMMYRETURNBLOCK:%.*]]55; IR:       TransitionBlock:56; IR-NEXT:    callbr void asm "", "r,!i"(i32 [[N30_32]])57; IR-NEXT:            to label [[DOTLOOPEXIT]] [label %n28]58; IR:       n31:59; IR-NEXT:    ret void60; IR:       DummyReturnBlock:61; IR-NEXT:    ret void62;63.entry:64  callbr void asm "", ""() to label %.loopexit []65 66.loopexit:                                        ; preds = %n28, %.entry67  callbr void asm "", ""() to label %n28 []68 69n28:                                               ; preds = %.loopexit, %n2870  %.01 = phi float [ 0.000000e+00, %.loopexit ], [ %n29, %n28 ]71  %n29 = fadd float %.01, 1.072  %n30 = fcmp ogt float %n29, 4.000000e+0073  %n30.32 = zext i1 %n30 to i3274  callbr void asm "", "r,!i"(i32 %n30.32) to label %.loopexit [label %n28]75 76n31:                                               ; preds =77  ret void78}79