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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck --check-prefix=MUBUF %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=prologepilog -mattr=+enable-flat-scratch %s -o - | FileCheck --check-prefix=FLATSCR %s4 5---6name: use_restore_frame_reg7tracksRegLiveness: true8 9stack:10 - { id: 0, type: default, offset: 0, size: 4, alignment: 8192 }11 - { id: 1, type: default, offset: 0, size: 4, alignment: 8192 }12 - { id: 2, type: default, offset: 0, size: 4, alignment: 8192 }13 - { id: 3, type: default, offset: 0, size: 4, alignment: 8192 }14 - { id: 4, type: default, offset: 0, size: 4, alignment: 8192 }15 - { id: 5, type: default, offset: 0, size: 4, alignment: 8192 }16 - { id: 6, type: default, offset: 0, size: 4, alignment: 8192 }17 - { id: 7, type: default, offset: 0, size: 4, alignment: 8192 }18 - { id: 8, type: default, offset: 0, size: 4, alignment: 8192 }19 - { id: 9, type: default, offset: 0, size: 4, alignment: 8192 }20 - { id: 10, type: default, offset: 0, size: 4, alignment: 8192 }21 - { id: 11, type: default, offset: 0, size: 4, alignment: 8192 }22 - { id: 12, type: default, offset: 0, size: 4, alignment: 8192 }23 - { id: 13, type: default, offset: 0, size: 4, alignment: 8192 }24 - { id: 14, type: default, offset: 0, size: 4, alignment: 8192 }25 - { id: 15, type: default, offset: 0, size: 4, alignment: 8192 }26 - { id: 16, type: default, offset: 0, size: 4, alignment: 8192 }27 - { id: 17, type: default, offset: 0, size: 4, alignment: 8192 }28 - { id: 18, type: default, offset: 0, size: 4, alignment: 8192 }29 30machineFunctionInfo:31 isEntryFunction: false32 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr333 frameOffsetReg: $sgpr3334 stackPtrOffsetReg: $sgpr3235 36body: |37 ; MUBUF-LABEL: name: use_restore_frame_reg38 ; MUBUF: bb.0:39 ; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)40 ; MUBUF-NEXT: liveins: $sgpr40, $sgpr41, $vgpr141 ; MUBUF-NEXT: {{ $}}42 ; MUBUF-NEXT: $sgpr40 = frame-setup COPY $sgpr3343 ; MUBUF-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc44 ; MUBUF-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc45 ; MUBUF-NEXT: $sgpr41 = frame-setup COPY $sgpr3446 ; MUBUF-NEXT: $sgpr34 = frame-setup COPY $sgpr3247 ; MUBUF-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 11010048, implicit-def dead $scc48 ; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc49 ; MUBUF-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc50 ; MUBUF-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec51 ; MUBUF-NEXT: $vgpr0 = V_ADD_U32_e32 8192, killed $vgpr0, implicit $exec52 ; MUBUF-NEXT: $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec53 ; MUBUF-NEXT: $vgpr2 = V_ADD_U32_e32 155648, killed $vgpr2, implicit $exec54 ; MUBUF-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr3155 ; MUBUF-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc56 ; MUBUF-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc57 ; MUBUF-NEXT: {{ $}}58 ; MUBUF-NEXT: bb.1:59 ; MUBUF-NEXT: successors: %bb.2(0x80000000)60 ; MUBUF-NEXT: liveins: $sgpr40, $sgpr4161 ; MUBUF-NEXT: {{ $}}62 ; MUBUF-NEXT: S_NOP 063 ; MUBUF-NEXT: {{ $}}64 ; MUBUF-NEXT: bb.2:65 ; MUBUF-NEXT: liveins: $sgpr40, $sgpr4166 ; MUBUF-NEXT: {{ $}}67 ; MUBUF-NEXT: $sgpr32 = frame-destroy COPY $sgpr3468 ; MUBUF-NEXT: $sgpr34 = frame-destroy COPY $sgpr4169 ; MUBUF-NEXT: $sgpr33 = frame-destroy COPY $sgpr4070 ; MUBUF-NEXT: S_ENDPGM 071 ;72 ; FLATSCR-LABEL: name: use_restore_frame_reg73 ; FLATSCR: bb.0:74 ; FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)75 ; FLATSCR-NEXT: liveins: $sgpr40, $sgpr41, $vgpr176 ; FLATSCR-NEXT: {{ $}}77 ; FLATSCR-NEXT: $sgpr40 = frame-setup COPY $sgpr3378 ; FLATSCR-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc79 ; FLATSCR-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc80 ; FLATSCR-NEXT: $sgpr41 = frame-setup COPY $sgpr3481 ; FLATSCR-NEXT: $sgpr34 = frame-setup COPY $sgpr3282 ; FLATSCR-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 172032, implicit-def dead $scc83 ; FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc84 ; FLATSCR-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc85 ; FLATSCR-NEXT: $sgpr42 = S_ADDC_U32 $sgpr33, 8192, implicit-def $scc, implicit $scc86 ; FLATSCR-NEXT: S_BITCMP1_B32 $sgpr42, 0, implicit-def $scc87 ; FLATSCR-NEXT: $sgpr42 = S_BITSET0_B32 0, $sgpr4288 ; FLATSCR-NEXT: $vgpr0 = V_MOV_B32_e32 killed $sgpr42, implicit $exec89 ; FLATSCR-NEXT: $sgpr42 = S_ADDC_U32 $sgpr33, 155648, implicit-def $scc, implicit $scc90 ; FLATSCR-NEXT: S_BITCMP1_B32 $sgpr42, 0, implicit-def $scc91 ; FLATSCR-NEXT: $sgpr42 = S_BITSET0_B32 0, $sgpr4292 ; FLATSCR-NEXT: $vgpr0 = V_OR_B32_e32 killed $sgpr42, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr3193 ; FLATSCR-NEXT: S_CBRANCH_VCCNZ %bb.2, implicit $vcc94 ; FLATSCR-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc95 ; FLATSCR-NEXT: {{ $}}96 ; FLATSCR-NEXT: bb.1:97 ; FLATSCR-NEXT: successors: %bb.2(0x80000000)98 ; FLATSCR-NEXT: liveins: $sgpr40, $sgpr4199 ; FLATSCR-NEXT: {{ $}}100 ; FLATSCR-NEXT: S_NOP 0101 ; FLATSCR-NEXT: {{ $}}102 ; FLATSCR-NEXT: bb.2:103 ; FLATSCR-NEXT: liveins: $sgpr40, $sgpr41104 ; FLATSCR-NEXT: {{ $}}105 ; FLATSCR-NEXT: $sgpr32 = frame-destroy COPY $sgpr34106 ; FLATSCR-NEXT: $sgpr34 = frame-destroy COPY $sgpr41107 ; FLATSCR-NEXT: $sgpr33 = frame-destroy COPY $sgpr40108 ; FLATSCR-NEXT: S_ENDPGM 0109 bb.0:110 liveins: $vgpr1111 112 S_CMP_EQ_U32 0, 0, implicit-def $scc113 S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc114 $vgpr0 = V_MOV_B32_e32 %stack.0, implicit $exec115 $vgpr0 = V_OR_B32_e32 %stack.18, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31116 S_CBRANCH_VCCNZ %bb.2, implicit $vcc117 S_CBRANCH_SCC1 %bb.2, implicit $scc118 119 bb.1:120 S_NOP 0121 122 bb.2:123 S_ENDPGM 0124 125...126