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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti | FileCheck %s --check-prefix=SI3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=VI4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 | FileCheck %s --check-prefix=GFX95; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 | FileCheck %s --check-prefix=GFX106; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 | FileCheck %s --check-prefix=GFX117 8define amdgpu_kernel void @s_usubo_i64_zext(ptr addrspace(1) %out, i64 %a, i64 %b) #0 {9; SI-LABEL: s_usubo_i64_zext:10; SI: ; %bb.0:11; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x912; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd13; SI-NEXT: s_mov_b32 s7, 0xf00014; SI-NEXT: s_mov_b32 s6, -115; SI-NEXT: s_waitcnt lgkmcnt(0)16; SI-NEXT: s_mov_b32 s4, s017; SI-NEXT: s_sub_u32 s2, s2, s818; SI-NEXT: s_subb_u32 s3, s3, s919; SI-NEXT: s_mov_b32 s5, s120; SI-NEXT: s_cselect_b64 s[0:1], -1, 021; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]22; SI-NEXT: v_mov_b32_e32 v1, s323; SI-NEXT: v_add_i32_e32 v0, vcc, s2, v024; SI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc25; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 026; SI-NEXT: s_endpgm27;28; VI-LABEL: s_usubo_i64_zext:29; VI: ; %bb.0:30; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2431; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x3432; VI-NEXT: s_waitcnt lgkmcnt(0)33; VI-NEXT: v_mov_b32_e32 v0, s034; VI-NEXT: s_sub_u32 s2, s2, s435; VI-NEXT: s_subb_u32 s3, s3, s536; VI-NEXT: v_mov_b32_e32 v1, s137; VI-NEXT: s_cselect_b64 s[0:1], -1, 038; VI-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]39; VI-NEXT: v_mov_b32_e32 v3, s340; VI-NEXT: v_add_u32_e32 v2, vcc, s2, v241; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc42; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]43; VI-NEXT: s_endpgm44;45; GFX9-LABEL: s_usubo_i64_zext:46; GFX9: ; %bb.0:47; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2448; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3449; GFX9-NEXT: v_mov_b32_e32 v2, 050; GFX9-NEXT: s_waitcnt lgkmcnt(0)51; GFX9-NEXT: s_sub_u32 s4, s2, s652; GFX9-NEXT: s_subb_u32 s5, s3, s753; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 054; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[2:3]55; GFX9-NEXT: v_mov_b32_e32 v1, s556; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v057; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc58; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]59; GFX9-NEXT: s_endpgm60;61; GFX10-LABEL: s_usubo_i64_zext:62; GFX10: ; %bb.0:63; GFX10-NEXT: s_clause 0x164; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2465; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3466; GFX10-NEXT: v_mov_b32_e32 v2, 067; GFX10-NEXT: s_waitcnt lgkmcnt(0)68; GFX10-NEXT: s_sub_u32 s2, s2, s669; GFX10-NEXT: s_subb_u32 s3, s3, s770; GFX10-NEXT: s_cselect_b32 s4, -1, 071; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 1, s472; GFX10-NEXT: v_add_co_u32 v0, s2, s2, v073; GFX10-NEXT: v_add_co_ci_u32_e64 v1, s2, s3, 0, s274; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]75; GFX10-NEXT: s_endpgm76;77; GFX11-LABEL: s_usubo_i64_zext:78; GFX11: ; %bb.0:79; GFX11-NEXT: s_clause 0x180; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2481; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x3482; GFX11-NEXT: v_mov_b32_e32 v2, 083; GFX11-NEXT: s_waitcnt lgkmcnt(0)84; GFX11-NEXT: s_sub_u32 s2, s2, s485; GFX11-NEXT: s_subb_u32 s3, s3, s586; GFX11-NEXT: s_cselect_b32 s4, -1, 087; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)88; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1, s489; GFX11-NEXT: v_add_co_u32 v0, s2, s2, v090; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)91; GFX11-NEXT: v_add_co_ci_u32_e64 v1, null, s3, 0, s292; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]93; GFX11-NEXT: s_endpgm94 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) #095 %val = extractvalue { i64, i1 } %usub, 096 %carry = extractvalue { i64, i1 } %usub, 197 %ext = zext i1 %carry to i6498 %add2 = add i64 %val, %ext99 store i64 %add2, ptr addrspace(1) %out, align 8100 ret void101}102 103; FIXME: Could do scalar104define amdgpu_kernel void @s_usubo_i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {105; SI-LABEL: s_usubo_i32:106; SI: ; %bb.0:107; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9108; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd109; SI-NEXT: s_mov_b32 s7, 0xf000110; SI-NEXT: s_mov_b32 s6, -1111; SI-NEXT: s_waitcnt lgkmcnt(0)112; SI-NEXT: s_mov_b32 s4, s0113; SI-NEXT: v_mov_b32_e32 v0, s9114; SI-NEXT: s_mov_b32 s5, s1115; SI-NEXT: v_sub_i32_e32 v0, vcc, s8, v0116; SI-NEXT: s_mov_b32 s0, s2117; SI-NEXT: s_mov_b32 s1, s3118; SI-NEXT: s_mov_b32 s2, s6119; SI-NEXT: s_mov_b32 s3, s7120; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc121; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0122; SI-NEXT: buffer_store_byte v1, off, s[0:3], 0123; SI-NEXT: s_endpgm124;125; VI-LABEL: s_usubo_i32:126; VI: ; %bb.0:127; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24128; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34129; VI-NEXT: s_waitcnt lgkmcnt(0)130; VI-NEXT: v_mov_b32_e32 v0, s0131; VI-NEXT: v_mov_b32_e32 v4, s5132; VI-NEXT: v_mov_b32_e32 v1, s1133; VI-NEXT: v_sub_u32_e32 v4, vcc, s4, v4134; VI-NEXT: v_mov_b32_e32 v2, s2135; VI-NEXT: v_mov_b32_e32 v3, s3136; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc137; VI-NEXT: flat_store_dword v[0:1], v4138; VI-NEXT: flat_store_byte v[2:3], v5139; VI-NEXT: s_endpgm140;141; GFX9-LABEL: s_usubo_i32:142; GFX9: ; %bb.0:143; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34144; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24145; GFX9-NEXT: v_mov_b32_e32 v0, 0146; GFX9-NEXT: s_waitcnt lgkmcnt(0)147; GFX9-NEXT: v_mov_b32_e32 v1, s7148; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, s6, v1149; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc150; GFX9-NEXT: global_store_dword v0, v1, s[0:1]151; GFX9-NEXT: global_store_byte v0, v2, s[2:3]152; GFX9-NEXT: s_endpgm153;154; GFX10-LABEL: s_usubo_i32:155; GFX10: ; %bb.0:156; GFX10-NEXT: s_clause 0x1157; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34158; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24159; GFX10-NEXT: v_mov_b32_e32 v0, 0160; GFX10-NEXT: s_waitcnt lgkmcnt(0)161; GFX10-NEXT: v_sub_co_u32 v1, s4, s6, s7162; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4163; GFX10-NEXT: global_store_dword v0, v1, s[0:1]164; GFX10-NEXT: global_store_byte v0, v2, s[2:3]165; GFX10-NEXT: s_endpgm166;167; GFX11-LABEL: s_usubo_i32:168; GFX11: ; %bb.0:169; GFX11-NEXT: s_clause 0x1170; GFX11-NEXT: s_load_b64 s[6:7], s[4:5], 0x34171; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24172; GFX11-NEXT: v_mov_b32_e32 v0, 0173; GFX11-NEXT: s_waitcnt lgkmcnt(0)174; GFX11-NEXT: v_sub_co_u32 v1, s4, s6, s7175; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)176; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4177; GFX11-NEXT: s_clause 0x1178; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]179; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]180; GFX11-NEXT: s_endpgm181 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)182 %val = extractvalue { i32, i1 } %usub, 0183 %carry = extractvalue { i32, i1 } %usub, 1184 store i32 %val, ptr addrspace(1) %out, align 4185 store i1 %carry, ptr addrspace(1) %carryout186 ret void187}188 189define amdgpu_kernel void @v_usubo_i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {190; SI-LABEL: v_usubo_i32:191; SI: ; %bb.0:192; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9193; SI-NEXT: s_mov_b32 s11, 0xf000194; SI-NEXT: s_mov_b32 s10, -1195; SI-NEXT: s_mov_b32 s14, s10196; SI-NEXT: s_mov_b32 s15, s11197; SI-NEXT: s_waitcnt lgkmcnt(0)198; SI-NEXT: s_mov_b32 s12, s4199; SI-NEXT: s_mov_b32 s13, s5200; SI-NEXT: s_mov_b32 s4, s6201; SI-NEXT: s_mov_b32 s5, s7202; SI-NEXT: s_mov_b32 s6, s10203; SI-NEXT: s_mov_b32 s7, s11204; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0205; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0206; SI-NEXT: s_mov_b32 s8, s0207; SI-NEXT: s_mov_b32 s9, s1208; SI-NEXT: s_mov_b32 s4, s2209; SI-NEXT: s_mov_b32 s5, s3210; SI-NEXT: s_waitcnt vmcnt(0)211; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v1212; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc213; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0214; SI-NEXT: buffer_store_byte v1, off, s[4:7], 0215; SI-NEXT: s_endpgm216;217; VI-LABEL: v_usubo_i32:218; VI: ; %bb.0:219; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24220; VI-NEXT: s_waitcnt lgkmcnt(0)221; VI-NEXT: v_mov_b32_e32 v0, s4222; VI-NEXT: v_mov_b32_e32 v1, s5223; VI-NEXT: v_mov_b32_e32 v2, s6224; VI-NEXT: v_mov_b32_e32 v3, s7225; VI-NEXT: flat_load_dword v4, v[0:1]226; VI-NEXT: flat_load_dword v5, v[2:3]227; VI-NEXT: v_mov_b32_e32 v0, s0228; VI-NEXT: v_mov_b32_e32 v1, s1229; VI-NEXT: v_mov_b32_e32 v2, s2230; VI-NEXT: v_mov_b32_e32 v3, s3231; VI-NEXT: s_waitcnt vmcnt(0)232; VI-NEXT: v_sub_u32_e32 v4, vcc, v4, v5233; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc234; VI-NEXT: flat_store_dword v[0:1], v4235; VI-NEXT: flat_store_byte v[2:3], v5236; VI-NEXT: s_endpgm237;238; GFX9-LABEL: v_usubo_i32:239; GFX9: ; %bb.0:240; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24241; GFX9-NEXT: v_mov_b32_e32 v0, 0242; GFX9-NEXT: s_waitcnt lgkmcnt(0)243; GFX9-NEXT: global_load_dword v1, v0, s[12:13]244; GFX9-NEXT: global_load_dword v2, v0, s[14:15]245; GFX9-NEXT: s_waitcnt vmcnt(0)246; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, v1, v2247; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc248; GFX9-NEXT: global_store_dword v0, v1, s[8:9]249; GFX9-NEXT: global_store_byte v0, v2, s[10:11]250; GFX9-NEXT: s_endpgm251;252; GFX10-LABEL: v_usubo_i32:253; GFX10: ; %bb.0:254; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24255; GFX10-NEXT: v_mov_b32_e32 v0, 0256; GFX10-NEXT: s_waitcnt lgkmcnt(0)257; GFX10-NEXT: s_clause 0x1258; GFX10-NEXT: global_load_dword v1, v0, s[12:13]259; GFX10-NEXT: global_load_dword v2, v0, s[14:15]260; GFX10-NEXT: s_waitcnt vmcnt(0)261; GFX10-NEXT: v_sub_co_u32 v1, s0, v1, v2262; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0263; GFX10-NEXT: global_store_dword v0, v1, s[8:9]264; GFX10-NEXT: global_store_byte v0, v2, s[10:11]265; GFX10-NEXT: s_endpgm266;267; GFX11-LABEL: v_usubo_i32:268; GFX11: ; %bb.0:269; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24270; GFX11-NEXT: v_mov_b32_e32 v0, 0271; GFX11-NEXT: s_waitcnt lgkmcnt(0)272; GFX11-NEXT: s_clause 0x1273; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]274; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]275; GFX11-NEXT: s_waitcnt vmcnt(0)276; GFX11-NEXT: v_sub_co_u32 v1, s4, v1, v2277; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)278; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4279; GFX11-NEXT: s_clause 0x1280; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]281; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]282; GFX11-NEXT: s_endpgm283 %tid = call i32 @llvm.amdgcn.workitem.id.x()284 %tid.ext = sext i32 %tid to i64285 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr286 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr287 %a = load i32, ptr addrspace(1) %a.gep, align 4288 %b = load i32, ptr addrspace(1) %b.gep, align 4289 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)290 %val = extractvalue { i32, i1 } %usub, 0291 %carry = extractvalue { i32, i1 } %usub, 1292 store i32 %val, ptr addrspace(1) %out, align 4293 store i1 %carry, ptr addrspace(1) %carryout294 ret void295}296 297define amdgpu_kernel void @v_usubo_i32_novcc(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {298; SI-LABEL: v_usubo_i32_novcc:299; SI: ; %bb.0:300; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9301; SI-NEXT: s_mov_b32 s11, 0xf000302; SI-NEXT: s_mov_b32 s10, -1303; SI-NEXT: s_mov_b32 s14, s10304; SI-NEXT: s_mov_b32 s15, s11305; SI-NEXT: s_waitcnt lgkmcnt(0)306; SI-NEXT: s_mov_b32 s12, s4307; SI-NEXT: s_mov_b32 s13, s5308; SI-NEXT: s_mov_b32 s4, s6309; SI-NEXT: s_mov_b32 s5, s7310; SI-NEXT: s_mov_b32 s6, s10311; SI-NEXT: s_mov_b32 s7, s11312; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0313; SI-NEXT: buffer_load_dword v1, off, s[4:7], 0314; SI-NEXT: s_mov_b32 s8, s0315; SI-NEXT: s_mov_b32 s9, s1316; SI-NEXT: s_mov_b32 s4, s2317; SI-NEXT: s_mov_b32 s5, s3318; SI-NEXT: s_waitcnt vmcnt(0)319; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v1320; SI-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc321; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0322; SI-NEXT: s_waitcnt vmcnt(0)323; SI-NEXT: ;;#ASMSTART324; SI-NEXT: ;;#ASMEND325; SI-NEXT: buffer_store_byte v1, off, s[4:7], 0326; SI-NEXT: s_waitcnt vmcnt(0)327; SI-NEXT: s_endpgm328;329; VI-LABEL: v_usubo_i32_novcc:330; VI: ; %bb.0:331; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24332; VI-NEXT: s_waitcnt lgkmcnt(0)333; VI-NEXT: v_mov_b32_e32 v0, s4334; VI-NEXT: v_mov_b32_e32 v1, s5335; VI-NEXT: v_mov_b32_e32 v2, s6336; VI-NEXT: v_mov_b32_e32 v3, s7337; VI-NEXT: flat_load_dword v4, v[0:1]338; VI-NEXT: flat_load_dword v5, v[2:3]339; VI-NEXT: v_mov_b32_e32 v0, s0340; VI-NEXT: v_mov_b32_e32 v1, s1341; VI-NEXT: v_mov_b32_e32 v2, s2342; VI-NEXT: v_mov_b32_e32 v3, s3343; VI-NEXT: s_waitcnt vmcnt(0)344; VI-NEXT: v_sub_u32_e32 v4, vcc, v4, v5345; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc346; VI-NEXT: flat_store_dword v[0:1], v4347; VI-NEXT: s_waitcnt vmcnt(0)348; VI-NEXT: ;;#ASMSTART349; VI-NEXT: ;;#ASMEND350; VI-NEXT: flat_store_byte v[2:3], v5351; VI-NEXT: s_waitcnt vmcnt(0)352; VI-NEXT: s_endpgm353;354; GFX9-LABEL: v_usubo_i32_novcc:355; GFX9: ; %bb.0:356; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24357; GFX9-NEXT: v_mov_b32_e32 v0, 0358; GFX9-NEXT: s_waitcnt lgkmcnt(0)359; GFX9-NEXT: global_load_dword v1, v0, s[12:13]360; GFX9-NEXT: global_load_dword v2, v0, s[14:15]361; GFX9-NEXT: s_waitcnt vmcnt(0)362; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, v1, v2363; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc364; GFX9-NEXT: global_store_dword v0, v1, s[8:9]365; GFX9-NEXT: s_waitcnt vmcnt(0)366; GFX9-NEXT: ;;#ASMSTART367; GFX9-NEXT: ;;#ASMEND368; GFX9-NEXT: global_store_byte v0, v2, s[10:11]369; GFX9-NEXT: s_waitcnt vmcnt(0)370; GFX9-NEXT: s_endpgm371;372; GFX10-LABEL: v_usubo_i32_novcc:373; GFX10: ; %bb.0:374; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24375; GFX10-NEXT: v_mov_b32_e32 v0, 0376; GFX10-NEXT: s_waitcnt lgkmcnt(0)377; GFX10-NEXT: s_clause 0x1378; GFX10-NEXT: global_load_dword v1, v0, s[12:13]379; GFX10-NEXT: global_load_dword v2, v0, s[14:15]380; GFX10-NEXT: s_waitcnt vmcnt(0)381; GFX10-NEXT: v_sub_co_u32 v1, s0, v1, v2382; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0383; GFX10-NEXT: global_store_dword v0, v1, s[8:9]384; GFX10-NEXT: s_waitcnt_vscnt null, 0x0385; GFX10-NEXT: ;;#ASMSTART386; GFX10-NEXT: ;;#ASMEND387; GFX10-NEXT: global_store_byte v0, v2, s[10:11]388; GFX10-NEXT: s_waitcnt_vscnt null, 0x0389; GFX10-NEXT: s_endpgm390;391; GFX11-LABEL: v_usubo_i32_novcc:392; GFX11: ; %bb.0:393; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24394; GFX11-NEXT: v_mov_b32_e32 v0, 0395; GFX11-NEXT: s_waitcnt lgkmcnt(0)396; GFX11-NEXT: s_clause 0x1397; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]398; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]399; GFX11-NEXT: s_waitcnt vmcnt(0)400; GFX11-NEXT: v_sub_co_u32 v1, s4, v1, v2401; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)402; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4403; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] dlc404; GFX11-NEXT: s_waitcnt_vscnt null, 0x0405; GFX11-NEXT: ;;#ASMSTART406; GFX11-NEXT: ;;#ASMEND407; GFX11-NEXT: global_store_b8 v0, v2, s[2:3] dlc408; GFX11-NEXT: s_waitcnt_vscnt null, 0x0409; GFX11-NEXT: s_endpgm410 %tid = call i32 @llvm.amdgcn.workitem.id.x()411 %tid.ext = sext i32 %tid to i64412 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr413 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr414 %a = load i32, ptr addrspace(1) %a.gep, align 4415 %b = load i32, ptr addrspace(1) %b.gep, align 4416 %uadd = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)417 %val = extractvalue { i32, i1 } %uadd, 0418 %carry = extractvalue { i32, i1 } %uadd, 1419 store volatile i32 %val, ptr addrspace(1) %out, align 4420 call void asm sideeffect "", "~{vcc}"() #0421 store volatile i1 %carry, ptr addrspace(1) %carryout422 ret void423}424 425define amdgpu_kernel void @s_usubo_i64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i64 %a, i64 %b) #0 {426; SI-LABEL: s_usubo_i64:427; SI: ; %bb.0:428; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9429; SI-NEXT: s_mov_b32 s11, 0xf000430; SI-NEXT: s_mov_b32 s10, -1431; SI-NEXT: s_waitcnt lgkmcnt(0)432; SI-NEXT: s_sub_u32 s4, s4, s6433; SI-NEXT: s_subb_u32 s5, s5, s7434; SI-NEXT: s_mov_b32 s8, s0435; SI-NEXT: s_mov_b32 s9, s1436; SI-NEXT: v_mov_b32_e32 v0, s4437; SI-NEXT: v_mov_b32_e32 v1, s5438; SI-NEXT: s_cselect_b64 s[4:5], -1, 0439; SI-NEXT: s_mov_b32 s0, s2440; SI-NEXT: s_mov_b32 s1, s3441; SI-NEXT: s_mov_b32 s2, s10442; SI-NEXT: s_mov_b32 s3, s11443; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0444; SI-NEXT: s_waitcnt expcnt(0)445; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]446; SI-NEXT: buffer_store_byte v0, off, s[0:3], 0447; SI-NEXT: s_endpgm448;449; VI-LABEL: s_usubo_i64:450; VI: ; %bb.0:451; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24452; VI-NEXT: s_waitcnt lgkmcnt(0)453; VI-NEXT: v_mov_b32_e32 v0, s0454; VI-NEXT: s_sub_u32 s0, s4, s6455; VI-NEXT: v_mov_b32_e32 v1, s1456; VI-NEXT: s_subb_u32 s1, s5, s7457; VI-NEXT: v_mov_b32_e32 v4, s0458; VI-NEXT: v_mov_b32_e32 v5, s1459; VI-NEXT: s_cselect_b64 s[0:1], -1, 0460; VI-NEXT: v_mov_b32_e32 v2, s2461; VI-NEXT: v_mov_b32_e32 v3, s3462; VI-NEXT: flat_store_dwordx2 v[0:1], v[4:5]463; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]464; VI-NEXT: flat_store_byte v[2:3], v0465; VI-NEXT: s_endpgm466;467; GFX9-LABEL: s_usubo_i64:468; GFX9: ; %bb.0:469; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24470; GFX9-NEXT: v_mov_b32_e32 v2, 0471; GFX9-NEXT: s_waitcnt lgkmcnt(0)472; GFX9-NEXT: s_sub_u32 s0, s12, s14473; GFX9-NEXT: s_subb_u32 s1, s13, s15474; GFX9-NEXT: v_mov_b32_e32 v0, s0475; GFX9-NEXT: v_mov_b32_e32 v1, s1476; GFX9-NEXT: s_cselect_b64 s[0:1], -1, 0477; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[0:1]478; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]479; GFX9-NEXT: global_store_byte v2, v3, s[10:11]480; GFX9-NEXT: s_endpgm481;482; GFX10-LABEL: s_usubo_i64:483; GFX10: ; %bb.0:484; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24485; GFX10-NEXT: v_mov_b32_e32 v2, 0486; GFX10-NEXT: s_waitcnt lgkmcnt(0)487; GFX10-NEXT: s_sub_u32 s0, s12, s14488; GFX10-NEXT: s_subb_u32 s1, s13, s15489; GFX10-NEXT: v_mov_b32_e32 v0, s0490; GFX10-NEXT: s_cselect_b32 s0, -1, 0491; GFX10-NEXT: v_mov_b32_e32 v1, s1492; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0493; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]494; GFX10-NEXT: global_store_byte v2, v3, s[10:11]495; GFX10-NEXT: s_endpgm496;497; GFX11-LABEL: s_usubo_i64:498; GFX11: ; %bb.0:499; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24500; GFX11-NEXT: s_waitcnt lgkmcnt(0)501; GFX11-NEXT: s_sub_u32 s4, s4, s6502; GFX11-NEXT: s_subb_u32 s5, s5, s7503; GFX11-NEXT: v_mov_b32_e32 v0, s4504; GFX11-NEXT: s_cselect_b32 s4, -1, 0505; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s5506; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4507; GFX11-NEXT: s_clause 0x1508; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]509; GFX11-NEXT: global_store_b8 v2, v3, s[2:3]510; GFX11-NEXT: s_endpgm511 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)512 %val = extractvalue { i64, i1 } %usub, 0513 %carry = extractvalue { i64, i1 } %usub, 1514 store i64 %val, ptr addrspace(1) %out, align 8515 store i1 %carry, ptr addrspace(1) %carryout516 ret void517}518 519define amdgpu_kernel void @v_usubo_i64(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {520; SI-LABEL: v_usubo_i64:521; SI: ; %bb.0:522; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9523; SI-NEXT: s_mov_b32 s11, 0xf000524; SI-NEXT: s_mov_b32 s10, -1525; SI-NEXT: s_mov_b32 s14, s10526; SI-NEXT: s_mov_b32 s15, s11527; SI-NEXT: s_waitcnt lgkmcnt(0)528; SI-NEXT: s_mov_b32 s12, s4529; SI-NEXT: s_mov_b32 s13, s5530; SI-NEXT: s_mov_b32 s4, s6531; SI-NEXT: s_mov_b32 s5, s7532; SI-NEXT: s_mov_b32 s6, s10533; SI-NEXT: s_mov_b32 s7, s11534; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[12:15], 0535; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[4:7], 0536; SI-NEXT: s_mov_b32 s8, s0537; SI-NEXT: s_mov_b32 s9, s1538; SI-NEXT: s_mov_b32 s4, s2539; SI-NEXT: s_mov_b32 s5, s3540; SI-NEXT: s_waitcnt vmcnt(0)541; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v2542; SI-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc543; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0544; SI-NEXT: s_waitcnt expcnt(0)545; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc546; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0547; SI-NEXT: s_endpgm548;549; VI-LABEL: v_usubo_i64:550; VI: ; %bb.0:551; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24552; VI-NEXT: s_waitcnt lgkmcnt(0)553; VI-NEXT: v_mov_b32_e32 v0, s4554; VI-NEXT: v_mov_b32_e32 v1, s5555; VI-NEXT: v_mov_b32_e32 v2, s6556; VI-NEXT: v_mov_b32_e32 v3, s7557; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]558; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]559; VI-NEXT: v_mov_b32_e32 v4, s0560; VI-NEXT: v_mov_b32_e32 v5, s1561; VI-NEXT: v_mov_b32_e32 v6, s2562; VI-NEXT: v_mov_b32_e32 v7, s3563; VI-NEXT: s_waitcnt vmcnt(0)564; VI-NEXT: v_sub_u32_e32 v0, vcc, v0, v2565; VI-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc566; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]567; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc568; VI-NEXT: flat_store_byte v[6:7], v0569; VI-NEXT: s_endpgm570;571; GFX9-LABEL: v_usubo_i64:572; GFX9: ; %bb.0:573; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24574; GFX9-NEXT: v_mov_b32_e32 v4, 0575; GFX9-NEXT: s_waitcnt lgkmcnt(0)576; GFX9-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]577; GFX9-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]578; GFX9-NEXT: s_waitcnt vmcnt(0)579; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2580; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc581; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]582; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc583; GFX9-NEXT: global_store_byte v4, v0, s[10:11]584; GFX9-NEXT: s_endpgm585;586; GFX10-LABEL: v_usubo_i64:587; GFX10: ; %bb.0:588; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24589; GFX10-NEXT: v_mov_b32_e32 v4, 0590; GFX10-NEXT: s_waitcnt lgkmcnt(0)591; GFX10-NEXT: s_clause 0x1592; GFX10-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]593; GFX10-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]594; GFX10-NEXT: s_waitcnt vmcnt(0)595; GFX10-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2596; GFX10-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo597; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo598; GFX10-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]599; GFX10-NEXT: global_store_byte v4, v2, s[10:11]600; GFX10-NEXT: s_endpgm601;602; GFX11-LABEL: v_usubo_i64:603; GFX11: ; %bb.0:604; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24605; GFX11-NEXT: v_mov_b32_e32 v4, 0606; GFX11-NEXT: s_waitcnt lgkmcnt(0)607; GFX11-NEXT: s_clause 0x1608; GFX11-NEXT: global_load_b64 v[0:1], v4, s[4:5]609; GFX11-NEXT: global_load_b64 v[2:3], v4, s[6:7]610; GFX11-NEXT: s_waitcnt vmcnt(0)611; GFX11-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2612; GFX11-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo613; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo614; GFX11-NEXT: s_clause 0x1615; GFX11-NEXT: global_store_b64 v4, v[0:1], s[0:1]616; GFX11-NEXT: global_store_b8 v4, v2, s[2:3]617; GFX11-NEXT: s_endpgm618 %tid = call i32 @llvm.amdgcn.workitem.id.x()619 %tid.ext = sext i32 %tid to i64620 %a.gep = getelementptr inbounds i64, ptr addrspace(1) %a.ptr621 %b.gep = getelementptr inbounds i64, ptr addrspace(1) %b.ptr622 %a = load i64, ptr addrspace(1) %a.gep623 %b = load i64, ptr addrspace(1) %b.gep624 %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)625 %val = extractvalue { i64, i1 } %usub, 0626 %carry = extractvalue { i64, i1 } %usub, 1627 store i64 %val, ptr addrspace(1) %out, align 8628 store i1 %carry, ptr addrspace(1) %carryout629 ret void630}631 632define amdgpu_kernel void @v_usubo_i16(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {633; SI-LABEL: v_usubo_i16:634; SI: ; %bb.0:635; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9636; SI-NEXT: s_mov_b32 s11, 0xf000637; SI-NEXT: s_mov_b32 s10, -1638; SI-NEXT: s_mov_b32 s14, s10639; SI-NEXT: s_mov_b32 s15, s11640; SI-NEXT: s_waitcnt lgkmcnt(0)641; SI-NEXT: s_mov_b32 s12, s4642; SI-NEXT: s_mov_b32 s13, s5643; SI-NEXT: s_mov_b32 s4, s6644; SI-NEXT: s_mov_b32 s5, s7645; SI-NEXT: s_mov_b32 s6, s10646; SI-NEXT: s_mov_b32 s7, s11647; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0648; SI-NEXT: buffer_load_ushort v1, off, s[4:7], 0649; SI-NEXT: s_mov_b32 s8, s0650; SI-NEXT: s_mov_b32 s9, s1651; SI-NEXT: s_mov_b32 s4, s2652; SI-NEXT: s_mov_b32 s5, s3653; SI-NEXT: s_waitcnt vmcnt(0)654; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v1655; SI-NEXT: v_and_b32_e32 v1, 0xffff, v0656; SI-NEXT: v_cmp_ne_u32_e32 vcc, v1, v0657; SI-NEXT: buffer_store_short v0, off, s[8:11], 0658; SI-NEXT: s_waitcnt expcnt(0)659; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc660; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0661; SI-NEXT: s_endpgm662;663; VI-LABEL: v_usubo_i16:664; VI: ; %bb.0:665; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24666; VI-NEXT: s_waitcnt lgkmcnt(0)667; VI-NEXT: v_mov_b32_e32 v0, s4668; VI-NEXT: v_mov_b32_e32 v1, s5669; VI-NEXT: v_mov_b32_e32 v2, s6670; VI-NEXT: v_mov_b32_e32 v3, s7671; VI-NEXT: flat_load_ushort v4, v[0:1]672; VI-NEXT: flat_load_ushort v5, v[2:3]673; VI-NEXT: v_mov_b32_e32 v0, s0674; VI-NEXT: v_mov_b32_e32 v1, s1675; VI-NEXT: v_mov_b32_e32 v2, s2676; VI-NEXT: v_mov_b32_e32 v3, s3677; VI-NEXT: s_waitcnt vmcnt(0)678; VI-NEXT: v_sub_u32_e32 v5, vcc, v4, v5679; VI-NEXT: v_and_b32_e32 v4, 0xffff, v4680; VI-NEXT: v_and_b32_e32 v6, 0xffff, v5681; VI-NEXT: v_cmp_gt_u32_e32 vcc, v6, v4682; VI-NEXT: flat_store_short v[0:1], v5683; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc684; VI-NEXT: flat_store_byte v[2:3], v0685; VI-NEXT: s_endpgm686;687; GFX9-LABEL: v_usubo_i16:688; GFX9: ; %bb.0:689; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24690; GFX9-NEXT: v_mov_b32_e32 v0, 0691; GFX9-NEXT: s_waitcnt lgkmcnt(0)692; GFX9-NEXT: global_load_ushort v1, v0, s[12:13]693; GFX9-NEXT: global_load_ushort v2, v0, s[14:15]694; GFX9-NEXT: s_waitcnt vmcnt(0)695; GFX9-NEXT: v_sub_u32_e32 v2, v1, v2696; GFX9-NEXT: v_cmp_gt_u32_sdwa s[0:1], v2, v1 src0_sel:WORD_0 src1_sel:WORD_0697; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]698; GFX9-NEXT: global_store_short v0, v2, s[8:9]699; GFX9-NEXT: global_store_byte v0, v1, s[10:11]700; GFX9-NEXT: s_endpgm701;702; GFX10-LABEL: v_usubo_i16:703; GFX10: ; %bb.0:704; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24705; GFX10-NEXT: v_mov_b32_e32 v0, 0706; GFX10-NEXT: s_waitcnt lgkmcnt(0)707; GFX10-NEXT: s_clause 0x1708; GFX10-NEXT: global_load_ushort v1, v0, s[12:13]709; GFX10-NEXT: global_load_ushort v2, v0, s[14:15]710; GFX10-NEXT: s_waitcnt vmcnt(0)711; GFX10-NEXT: v_sub_nc_u32_e32 v2, v1, v2712; GFX10-NEXT: v_cmp_gt_u32_sdwa s0, v2, v1 src0_sel:WORD_0 src1_sel:WORD_0713; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 1, s0714; GFX10-NEXT: global_store_short v0, v2, s[8:9]715; GFX10-NEXT: global_store_byte v0, v1, s[10:11]716; GFX10-NEXT: s_endpgm717;718; GFX11-LABEL: v_usubo_i16:719; GFX11: ; %bb.0:720; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24721; GFX11-NEXT: v_mov_b32_e32 v0, 0722; GFX11-NEXT: s_waitcnt lgkmcnt(0)723; GFX11-NEXT: s_clause 0x1724; GFX11-NEXT: global_load_d16_b16 v1, v0, s[4:5]725; GFX11-NEXT: global_load_u16 v2, v0, s[6:7]726; GFX11-NEXT: s_waitcnt vmcnt(0)727; GFX11-NEXT: v_sub_nc_u32_e32 v2, v1, v2728; GFX11-NEXT: v_and_b32_e32 v1, 0xffff, v1729; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)730; GFX11-NEXT: v_and_b32_e32 v3, 0xffff, v2731; GFX11-NEXT: v_cmp_gt_u32_e32 vcc_lo, v3, v1732; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo733; GFX11-NEXT: s_clause 0x1734; GFX11-NEXT: global_store_b16 v0, v2, s[0:1]735; GFX11-NEXT: global_store_b8 v0, v1, s[2:3]736; GFX11-NEXT: s_endpgm737 %tid = call i32 @llvm.amdgcn.workitem.id.x()738 %tid.ext = sext i32 %tid to i64739 %a.gep = getelementptr inbounds i16, ptr addrspace(1) %a.ptr740 %b.gep = getelementptr inbounds i16, ptr addrspace(1) %b.ptr741 %a = load i16, ptr addrspace(1) %a.gep742 %b = load i16, ptr addrspace(1) %b.gep743 %usub = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 %a, i16 %b)744 %val = extractvalue { i16, i1 } %usub, 0745 %carry = extractvalue { i16, i1 } %usub, 1746 store i16 %val, ptr addrspace(1) %out747 store i1 %carry, ptr addrspace(1) %carryout748 ret void749}750 751define amdgpu_kernel void @v_usubo_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %aptr, ptr addrspace(1) %bptr) nounwind {752; SI-LABEL: v_usubo_v2i32:753; SI: ; %bb.0:754; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9755; SI-NEXT: s_mov_b32 s11, 0xf000756; SI-NEXT: s_mov_b32 s10, -1757; SI-NEXT: s_mov_b32 s14, s10758; SI-NEXT: s_mov_b32 s15, s11759; SI-NEXT: s_waitcnt lgkmcnt(0)760; SI-NEXT: s_mov_b32 s12, s4761; SI-NEXT: s_mov_b32 s13, s5762; SI-NEXT: s_mov_b32 s4, s6763; SI-NEXT: s_mov_b32 s5, s7764; SI-NEXT: s_mov_b32 s6, s10765; SI-NEXT: s_mov_b32 s7, s11766; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[12:15], 0767; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[4:7], 0768; SI-NEXT: s_mov_b32 s8, s0769; SI-NEXT: s_mov_b32 s9, s1770; SI-NEXT: s_mov_b32 s4, s2771; SI-NEXT: s_mov_b32 s5, s3772; SI-NEXT: s_waitcnt vmcnt(0)773; SI-NEXT: v_sub_i32_e32 v1, vcc, v1, v3774; SI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc775; SI-NEXT: v_sub_i32_e32 v0, vcc, v0, v2776; SI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc777; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0778; SI-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0779; SI-NEXT: s_endpgm780;781; VI-LABEL: v_usubo_v2i32:782; VI: ; %bb.0:783; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24784; VI-NEXT: s_waitcnt lgkmcnt(0)785; VI-NEXT: v_mov_b32_e32 v0, s4786; VI-NEXT: v_mov_b32_e32 v1, s5787; VI-NEXT: v_mov_b32_e32 v2, s6788; VI-NEXT: v_mov_b32_e32 v3, s7789; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]790; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]791; VI-NEXT: v_mov_b32_e32 v4, s0792; VI-NEXT: v_mov_b32_e32 v5, s1793; VI-NEXT: v_mov_b32_e32 v6, s2794; VI-NEXT: v_mov_b32_e32 v7, s3795; VI-NEXT: s_waitcnt vmcnt(0)796; VI-NEXT: v_sub_u32_e32 v1, vcc, v1, v3797; VI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc798; VI-NEXT: v_sub_u32_e32 v0, vcc, v0, v2799; VI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc800; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]801; VI-NEXT: flat_store_dwordx2 v[6:7], v[2:3]802; VI-NEXT: s_endpgm803;804; GFX9-LABEL: v_usubo_v2i32:805; GFX9: ; %bb.0:806; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24807; GFX9-NEXT: v_mov_b32_e32 v4, 0808; GFX9-NEXT: s_waitcnt lgkmcnt(0)809; GFX9-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]810; GFX9-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]811; GFX9-NEXT: s_waitcnt vmcnt(0)812; GFX9-NEXT: v_sub_co_u32_e32 v1, vcc, v1, v3813; GFX9-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc814; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2815; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc816; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]817; GFX9-NEXT: global_store_dwordx2 v4, v[2:3], s[10:11]818; GFX9-NEXT: s_endpgm819;820; GFX10-LABEL: v_usubo_v2i32:821; GFX10: ; %bb.0:822; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24823; GFX10-NEXT: v_mov_b32_e32 v4, 0824; GFX10-NEXT: s_waitcnt lgkmcnt(0)825; GFX10-NEXT: s_clause 0x1826; GFX10-NEXT: global_load_dwordx2 v[0:1], v4, s[12:13]827; GFX10-NEXT: global_load_dwordx2 v[2:3], v4, s[14:15]828; GFX10-NEXT: s_waitcnt vmcnt(0)829; GFX10-NEXT: v_sub_co_u32 v1, s0, v1, v3830; GFX10-NEXT: v_cndmask_b32_e64 v3, 0, 1, s0831; GFX10-NEXT: v_sub_co_u32 v0, s0, v0, v2832; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0833; GFX10-NEXT: global_store_dwordx2 v4, v[0:1], s[8:9]834; GFX10-NEXT: global_store_dwordx2 v4, v[2:3], s[10:11]835; GFX10-NEXT: s_endpgm836;837; GFX11-LABEL: v_usubo_v2i32:838; GFX11: ; %bb.0:839; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x24840; GFX11-NEXT: v_mov_b32_e32 v4, 0841; GFX11-NEXT: s_waitcnt lgkmcnt(0)842; GFX11-NEXT: s_clause 0x1843; GFX11-NEXT: global_load_b64 v[0:1], v4, s[4:5]844; GFX11-NEXT: global_load_b64 v[2:3], v4, s[6:7]845; GFX11-NEXT: s_waitcnt vmcnt(0)846; GFX11-NEXT: v_sub_co_u32 v1, s4, v1, v3847; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)848; GFX11-NEXT: v_cndmask_b32_e64 v3, 0, 1, s4849; GFX11-NEXT: v_sub_co_u32 v0, s4, v0, v2850; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s4851; GFX11-NEXT: s_clause 0x1852; GFX11-NEXT: global_store_b64 v4, v[0:1], s[0:1]853; GFX11-NEXT: global_store_b64 v4, v[2:3], s[2:3]854; GFX11-NEXT: s_endpgm855 %a = load <2 x i32>, ptr addrspace(1) %aptr, align 4856 %b = load <2 x i32>, ptr addrspace(1) %bptr, align 4857 %sadd = call { <2 x i32>, <2 x i1> } @llvm.usub.with.overflow.v2i32(<2 x i32> %a, <2 x i32> %b) nounwind858 %val = extractvalue { <2 x i32>, <2 x i1> } %sadd, 0859 %carry = extractvalue { <2 x i32>, <2 x i1> } %sadd, 1860 store <2 x i32> %val, ptr addrspace(1) %out, align 4861 %carry.ext = zext <2 x i1> %carry to <2 x i32>862 store <2 x i32> %carry.ext, ptr addrspace(1) %carryout863 ret void864}865 866define amdgpu_kernel void @s_usubo_clamp_bit(ptr addrspace(1) %out, ptr addrspace(1) %carryout, i32 %a, i32 %b) #0 {867; SI-LABEL: s_usubo_clamp_bit:868; SI: ; %bb.0: ; %entry869; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd870; SI-NEXT: s_waitcnt lgkmcnt(0)871; SI-NEXT: v_mov_b32_e32 v0, s1872; SI-NEXT: s_cmp_eq_u32 s0, s1873; SI-NEXT: v_sub_i32_e32 v0, vcc, s0, v0874; SI-NEXT: s_mov_b64 s[0:1], 0875; SI-NEXT: s_cbranch_scc1 .LBB8_2876; SI-NEXT: ; %bb.1: ; %if877; SI-NEXT: s_xor_b64 s[0:1], vcc, -1878; SI-NEXT: .LBB8_2: ; %exit879; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9880; SI-NEXT: s_mov_b32 s11, 0xf000881; SI-NEXT: s_mov_b32 s10, -1882; SI-NEXT: s_waitcnt lgkmcnt(0)883; SI-NEXT: s_mov_b32 s8, s4884; SI-NEXT: s_mov_b32 s9, s5885; SI-NEXT: s_mov_b32 s4, s6886; SI-NEXT: s_mov_b32 s5, s7887; SI-NEXT: s_mov_b32 s6, s10888; SI-NEXT: s_mov_b32 s7, s11889; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0890; SI-NEXT: s_waitcnt expcnt(0)891; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]892; SI-NEXT: buffer_store_byte v0, off, s[4:7], 0893; SI-NEXT: s_endpgm894;895; VI-LABEL: s_usubo_clamp_bit:896; VI: ; %bb.0: ; %entry897; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34898; VI-NEXT: s_waitcnt lgkmcnt(0)899; VI-NEXT: v_mov_b32_e32 v0, s1900; VI-NEXT: s_cmp_eq_u32 s0, s1901; VI-NEXT: v_sub_u32_e32 v0, vcc, s0, v0902; VI-NEXT: s_mov_b64 s[0:1], 0903; VI-NEXT: s_cbranch_scc1 .LBB8_2904; VI-NEXT: ; %bb.1: ; %if905; VI-NEXT: s_xor_b64 s[0:1], vcc, -1906; VI-NEXT: .LBB8_2: ; %exit907; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24908; VI-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[0:1]909; VI-NEXT: s_waitcnt lgkmcnt(0)910; VI-NEXT: v_mov_b32_e32 v1, s4911; VI-NEXT: v_mov_b32_e32 v2, s5912; VI-NEXT: v_mov_b32_e32 v3, s6913; VI-NEXT: v_mov_b32_e32 v4, s7914; VI-NEXT: flat_store_dword v[1:2], v0915; VI-NEXT: flat_store_byte v[3:4], v5916; VI-NEXT: s_endpgm917;918; GFX9-LABEL: s_usubo_clamp_bit:919; GFX9: ; %bb.0: ; %entry920; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34921; GFX9-NEXT: s_waitcnt lgkmcnt(0)922; GFX9-NEXT: v_mov_b32_e32 v0, s1923; GFX9-NEXT: s_cmp_eq_u32 s0, s1924; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, s0, v0925; GFX9-NEXT: s_mov_b64 s[0:1], 0926; GFX9-NEXT: s_cbranch_scc1 .LBB8_2927; GFX9-NEXT: ; %bb.1: ; %if928; GFX9-NEXT: s_xor_b64 s[0:1], vcc, -1929; GFX9-NEXT: .LBB8_2: ; %exit930; GFX9-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24931; GFX9-NEXT: v_mov_b32_e32 v1, 0932; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]933; GFX9-NEXT: s_waitcnt lgkmcnt(0)934; GFX9-NEXT: global_store_dword v1, v0, s[8:9]935; GFX9-NEXT: global_store_byte v1, v2, s[10:11]936; GFX9-NEXT: s_endpgm937;938; GFX10-LABEL: s_usubo_clamp_bit:939; GFX10: ; %bb.0: ; %entry940; GFX10-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x34941; GFX10-NEXT: s_mov_b32 s0, 0942; GFX10-NEXT: s_waitcnt lgkmcnt(0)943; GFX10-NEXT: v_sub_co_u32 v0, s1, s2, s3944; GFX10-NEXT: s_cmp_eq_u32 s2, s3945; GFX10-NEXT: s_cbranch_scc1 .LBB8_2946; GFX10-NEXT: ; %bb.1: ; %if947; GFX10-NEXT: s_xor_b32 s0, s1, -1948; GFX10-NEXT: .LBB8_2: ; %exit949; GFX10-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x24950; GFX10-NEXT: v_mov_b32_e32 v1, 0951; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0952; GFX10-NEXT: s_waitcnt lgkmcnt(0)953; GFX10-NEXT: global_store_dword v1, v0, s[8:9]954; GFX10-NEXT: global_store_byte v1, v2, s[10:11]955; GFX10-NEXT: s_endpgm956;957; GFX11-LABEL: s_usubo_clamp_bit:958; GFX11: ; %bb.0: ; %entry959; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x34960; GFX11-NEXT: s_mov_b32 s0, 0961; GFX11-NEXT: s_waitcnt lgkmcnt(0)962; GFX11-NEXT: v_sub_co_u32 v0, s1, s2, s3963; GFX11-NEXT: s_cmp_eq_u32 s2, s3964; GFX11-NEXT: s_cbranch_scc1 .LBB8_2965; GFX11-NEXT: ; %bb.1: ; %if966; GFX11-NEXT: s_xor_b32 s0, s1, -1967; GFX11-NEXT: .LBB8_2: ; %exit968; GFX11-NEXT: s_load_b128 s[4:7], s[4:5], 0x24969; GFX11-NEXT: v_mov_b32_e32 v1, 0970; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s0971; GFX11-NEXT: s_waitcnt lgkmcnt(0)972; GFX11-NEXT: s_clause 0x1973; GFX11-NEXT: global_store_b32 v1, v0, s[4:5]974; GFX11-NEXT: global_store_b8 v1, v2, s[6:7]975; GFX11-NEXT: s_endpgm976entry:977 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)978 %val = extractvalue { i32, i1 } %usub, 0979 %carry = extractvalue { i32, i1 } %usub, 1980 %c2 = icmp eq i1 %carry, false981 %cc = icmp eq i32 %a, %b982 br i1 %cc, label %exit, label %if983 984if:985 br label %exit986 987exit:988 %cout = phi i1 [false, %entry], [%c2, %if]989 store i32 %val, ptr addrspace(1) %out, align 4990 store i1 %cout, ptr addrspace(1) %carryout991 ret void992}993 994 995define amdgpu_kernel void @v_usubo_clamp_bit(ptr addrspace(1) %out, ptr addrspace(1) %carryout, ptr addrspace(1) %a.ptr, ptr addrspace(1) %b.ptr) #0 {996; SI-LABEL: v_usubo_clamp_bit:997; SI: ; %bb.0: ; %entry998; SI-NEXT: s_load_dwordx8 s[4:11], s[4:5], 0x9999; SI-NEXT: s_mov_b32 s3, 0xf0001000; SI-NEXT: s_mov_b32 s2, -11001; SI-NEXT: s_waitcnt lgkmcnt(0)1002; SI-NEXT: s_mov_b32 s0, s81003; SI-NEXT: s_mov_b32 s1, s91004; SI-NEXT: s_mov_b32 s8, s101005; SI-NEXT: s_mov_b32 s9, s111006; SI-NEXT: s_mov_b32 s10, s21007; SI-NEXT: s_mov_b32 s11, s31008; SI-NEXT: buffer_load_dword v1, off, s[0:3], 01009; SI-NEXT: buffer_load_dword v2, off, s[8:11], 01010; SI-NEXT: s_mov_b64 s[8:9], 01011; SI-NEXT: s_waitcnt vmcnt(0)1012; SI-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21013; SI-NEXT: v_sub_i32_e64 v0, s[0:1], v1, v21014; SI-NEXT: s_cbranch_vccnz .LBB9_21015; SI-NEXT: ; %bb.1: ; %if1016; SI-NEXT: s_xor_b64 s[8:9], s[0:1], -11017; SI-NEXT: .LBB9_2: ; %exit1018; SI-NEXT: s_mov_b32 s0, s41019; SI-NEXT: s_mov_b32 s1, s51020; SI-NEXT: s_mov_b32 s4, s61021; SI-NEXT: s_mov_b32 s5, s71022; SI-NEXT: s_mov_b32 s6, s21023; SI-NEXT: s_mov_b32 s7, s31024; SI-NEXT: buffer_store_dword v0, off, s[0:3], 01025; SI-NEXT: s_waitcnt expcnt(0)1026; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[8:9]1027; SI-NEXT: buffer_store_byte v0, off, s[4:7], 01028; SI-NEXT: s_endpgm1029;1030; VI-LABEL: v_usubo_clamp_bit:1031; VI: ; %bb.0: ; %entry1032; VI-NEXT: s_load_dwordx8 s[4:11], s[4:5], 0x241033; VI-NEXT: s_mov_b64 s[2:3], 01034; VI-NEXT: s_waitcnt lgkmcnt(0)1035; VI-NEXT: v_mov_b32_e32 v0, s81036; VI-NEXT: v_mov_b32_e32 v1, s91037; VI-NEXT: v_mov_b32_e32 v2, s101038; VI-NEXT: v_mov_b32_e32 v3, s111039; VI-NEXT: flat_load_dword v1, v[0:1]1040; VI-NEXT: flat_load_dword v2, v[2:3]1041; VI-NEXT: s_waitcnt vmcnt(0)1042; VI-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21043; VI-NEXT: v_sub_u32_e64 v0, s[0:1], v1, v21044; VI-NEXT: s_cbranch_vccnz .LBB9_21045; VI-NEXT: ; %bb.1: ; %if1046; VI-NEXT: s_xor_b64 s[2:3], s[0:1], -11047; VI-NEXT: .LBB9_2: ; %exit1048; VI-NEXT: v_mov_b32_e32 v1, s41049; VI-NEXT: v_mov_b32_e32 v2, s51050; VI-NEXT: v_mov_b32_e32 v3, s61051; VI-NEXT: v_mov_b32_e32 v4, s71052; VI-NEXT: flat_store_dword v[1:2], v01053; VI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[2:3]1054; VI-NEXT: flat_store_byte v[3:4], v01055; VI-NEXT: s_endpgm1056;1057; GFX9-LABEL: v_usubo_clamp_bit:1058; GFX9: ; %bb.0: ; %entry1059; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241060; GFX9-NEXT: v_mov_b32_e32 v0, 01061; GFX9-NEXT: s_mov_b64 s[2:3], 01062; GFX9-NEXT: s_waitcnt lgkmcnt(0)1063; GFX9-NEXT: global_load_dword v2, v0, s[12:13]1064; GFX9-NEXT: global_load_dword v3, v0, s[14:15]1065; GFX9-NEXT: s_waitcnt vmcnt(0)1066; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31067; GFX9-NEXT: v_sub_co_u32_e64 v1, s[0:1], v2, v31068; GFX9-NEXT: s_cbranch_vccnz .LBB9_21069; GFX9-NEXT: ; %bb.1: ; %if1070; GFX9-NEXT: s_xor_b64 s[2:3], s[0:1], -11071; GFX9-NEXT: .LBB9_2: ; %exit1072; GFX9-NEXT: global_store_dword v0, v1, s[8:9]1073; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[2:3]1074; GFX9-NEXT: global_store_byte v0, v1, s[10:11]1075; GFX9-NEXT: s_endpgm1076;1077; GFX10-LABEL: v_usubo_clamp_bit:1078; GFX10: ; %bb.0: ; %entry1079; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241080; GFX10-NEXT: v_mov_b32_e32 v0, 01081; GFX10-NEXT: s_mov_b32 s0, 01082; GFX10-NEXT: s_waitcnt lgkmcnt(0)1083; GFX10-NEXT: s_clause 0x11084; GFX10-NEXT: global_load_dword v1, v0, s[12:13]1085; GFX10-NEXT: global_load_dword v2, v0, s[14:15]1086; GFX10-NEXT: s_waitcnt vmcnt(0)1087; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21088; GFX10-NEXT: v_sub_co_u32 v1, s1, v1, v21089; GFX10-NEXT: s_cbranch_vccnz .LBB9_21090; GFX10-NEXT: ; %bb.1: ; %if1091; GFX10-NEXT: s_xor_b32 s0, s1, -11092; GFX10-NEXT: .LBB9_2: ; %exit1093; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, s01094; GFX10-NEXT: global_store_dword v0, v1, s[8:9]1095; GFX10-NEXT: global_store_byte v0, v2, s[10:11]1096; GFX10-NEXT: s_endpgm1097;1098; GFX11-LABEL: v_usubo_clamp_bit:1099; GFX11: ; %bb.0: ; %entry1100; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x241101; GFX11-NEXT: v_mov_b32_e32 v0, 01102; GFX11-NEXT: s_waitcnt lgkmcnt(0)1103; GFX11-NEXT: s_clause 0x11104; GFX11-NEXT: global_load_b32 v1, v0, s[4:5]1105; GFX11-NEXT: global_load_b32 v2, v0, s[6:7]1106; GFX11-NEXT: s_mov_b32 s4, 01107; GFX11-NEXT: s_waitcnt vmcnt(0)1108; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21109; GFX11-NEXT: v_sub_co_u32 v1, s5, v1, v21110; GFX11-NEXT: s_cbranch_vccnz .LBB9_21111; GFX11-NEXT: ; %bb.1: ; %if1112; GFX11-NEXT: s_xor_b32 s4, s5, -11113; GFX11-NEXT: .LBB9_2: ; %exit1114; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1115; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, s41116; GFX11-NEXT: s_clause 0x11117; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]1118; GFX11-NEXT: global_store_b8 v0, v2, s[2:3]1119; GFX11-NEXT: s_endpgm1120entry:1121 %tid = call i32 @llvm.amdgcn.workitem.id.x()1122 %tid.ext = sext i32 %tid to i641123 %a.gep = getelementptr inbounds i32, ptr addrspace(1) %a.ptr1124 %b.gep = getelementptr inbounds i32, ptr addrspace(1) %b.ptr1125 %a = load i32, ptr addrspace(1) %a.gep, align 41126 %b = load i32, ptr addrspace(1) %b.gep, align 41127 %usub = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)1128 %val = extractvalue { i32, i1 } %usub, 01129 %carry = extractvalue { i32, i1 } %usub, 11130 %c2 = icmp eq i1 %carry, false1131 %cc = icmp eq i32 %a, %b1132 br i1 %cc, label %exit, label %if1133 1134if:1135 br label %exit1136 1137exit:1138 %cout = phi i1 [false, %entry], [%c2, %if]1139 store i32 %val, ptr addrspace(1) %out, align 41140 store i1 %cout, ptr addrspace(1) %carryout1141 ret void1142}1143 1144declare i32 @llvm.amdgcn.workitem.id.x() #11145declare { i16, i1 } @llvm.usub.with.overflow.i16(i16, i16) #11146declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) #11147declare { i64, i1 } @llvm.usub.with.overflow.i64(i64, i64) #11148declare { <2 x i32>, <2 x i1> } @llvm.usub.with.overflow.v2i32(<2 x i32>, <2 x i32>) nounwind readnone1149 1150attributes #0 = { nounwind }1151attributes #1 = { nounwind readnone }1152