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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=tahiti < %s | FileCheck --check-prefix=GFX6 %s3; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=fiji < %s | FileCheck --check-prefix=GFX8 %s4; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck --check-prefix=GFX9 %s5; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck --check-prefixes=GFX10PLUS,GFX10 %s6; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck --check-prefixes=GFX10PLUS,GFX11,GFX11-TRUE16 %s7; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck --check-prefixes=GFX10PLUS,GFX11,GFX11-FAKE16 %s8 9define i8 @v_usubsat_i8(i8 %lhs, i8 %rhs) {10; GFX6-LABEL: v_usubsat_i8:11; GFX6: ; %bb.0:12; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; GFX6-NEXT: v_and_b32_e32 v1, 0xff, v114; GFX6-NEXT: v_and_b32_e32 v0, 0xff, v015; GFX6-NEXT: v_max_u32_e32 v0, v0, v116; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v117; GFX6-NEXT: s_setpc_b64 s[30:31]18;19; GFX8-LABEL: v_usubsat_i8:20; GFX8: ; %bb.0:21; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)22; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_023; GFX8-NEXT: s_setpc_b64 s[30:31]24;25; GFX9-LABEL: v_usubsat_i8:26; GFX9: ; %bb.0:27; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)28; GFX9-NEXT: v_sub_u16_sdwa v0, v0, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_029; GFX9-NEXT: s_setpc_b64 s[30:31]30;31; GFX10-LABEL: v_usubsat_i8:32; GFX10: ; %bb.0:33; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)34; GFX10-NEXT: v_and_b32_e32 v1, 0xff, v135; GFX10-NEXT: v_and_b32_e32 v0, 0xff, v036; GFX10-NEXT: v_sub_nc_u16 v0, v0, v1 clamp37; GFX10-NEXT: s_setpc_b64 s[30:31]38;39; GFX11-TRUE16-LABEL: v_usubsat_i8:40; GFX11-TRUE16: ; %bb.0:41; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)42; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v1.l43; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l44; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, v0.h clamp45; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]46;47; GFX11-FAKE16-LABEL: v_usubsat_i8:48; GFX11-FAKE16: ; %bb.0:49; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xff, v151; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v052; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, v1 clamp53; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]54 %result = call i8 @llvm.usub.sat.i8(i8 %lhs, i8 %rhs)55 ret i8 %result56}57 58define i16 @v_usubsat_i16(i16 %lhs, i16 %rhs) {59; GFX6-LABEL: v_usubsat_i16:60; GFX6: ; %bb.0:61; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)62; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v163; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v064; GFX6-NEXT: v_max_u32_e32 v0, v0, v165; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v166; GFX6-NEXT: s_setpc_b64 s[30:31]67;68; GFX8-LABEL: v_usubsat_i16:69; GFX8: ; %bb.0:70; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)71; GFX8-NEXT: v_sub_u16_e64 v0, v0, v1 clamp72; GFX8-NEXT: s_setpc_b64 s[30:31]73;74; GFX9-LABEL: v_usubsat_i16:75; GFX9: ; %bb.0:76; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)77; GFX9-NEXT: v_sub_u16_e64 v0, v0, v1 clamp78; GFX9-NEXT: s_setpc_b64 s[30:31]79;80; GFX10-LABEL: v_usubsat_i16:81; GFX10: ; %bb.0:82; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)83; GFX10-NEXT: v_sub_nc_u16 v0, v0, v1 clamp84; GFX10-NEXT: s_setpc_b64 s[30:31]85;86; GFX11-TRUE16-LABEL: v_usubsat_i16:87; GFX11-TRUE16: ; %bb.0:88; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)89; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, v1.l clamp90; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]91;92; GFX11-FAKE16-LABEL: v_usubsat_i16:93; GFX11-FAKE16: ; %bb.0:94; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)95; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, v1 clamp96; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]97 %result = call i16 @llvm.usub.sat.i16(i16 %lhs, i16 %rhs)98 ret i16 %result99}100 101define i16 @usubsat_as_bithack_i16(i16 %x) {102; GFX6-LABEL: usubsat_as_bithack_i16:103; GFX6: ; %bb.0:104; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)105; GFX6-NEXT: v_bfe_i32 v1, v0, 0, 16106; GFX6-NEXT: v_ashrrev_i32_e32 v1, 15, v1107; GFX6-NEXT: v_xor_b32_e32 v0, 0xffff8000, v0108; GFX6-NEXT: v_and_b32_e32 v0, v1, v0109; GFX6-NEXT: s_setpc_b64 s[30:31]110;111; GFX8-LABEL: usubsat_as_bithack_i16:112; GFX8: ; %bb.0:113; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)114; GFX8-NEXT: s_movk_i32 s4, 0x8000115; GFX8-NEXT: v_sub_u16_e64 v0, v0, s4 clamp116; GFX8-NEXT: s_setpc_b64 s[30:31]117;118; GFX9-LABEL: usubsat_as_bithack_i16:119; GFX9: ; %bb.0:120; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)121; GFX9-NEXT: s_movk_i32 s4, 0x8000122; GFX9-NEXT: v_sub_u16_e64 v0, v0, s4 clamp123; GFX9-NEXT: s_setpc_b64 s[30:31]124;125; GFX10-LABEL: usubsat_as_bithack_i16:126; GFX10: ; %bb.0:127; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)128; GFX10-NEXT: v_sub_nc_u16 v0, v0, 0x8000 clamp129; GFX10-NEXT: s_setpc_b64 s[30:31]130;131; GFX11-TRUE16-LABEL: usubsat_as_bithack_i16:132; GFX11-TRUE16: ; %bb.0:133; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)134; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, 0x8000 clamp135; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]136;137; GFX11-FAKE16-LABEL: usubsat_as_bithack_i16:138; GFX11-FAKE16: ; %bb.0:139; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)140; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, 0x8000 clamp141; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]142 %signsplat = ashr i16 %x, 15143 %flipsign = xor i16 %x, 32768144 %result = and i16 %signsplat, %flipsign145 ret i16 %result146}147 148define i16 @usubsat_as_bithack2_i16(i16 %x) {149; GFX6-LABEL: usubsat_as_bithack2_i16:150; GFX6: ; %bb.0:151; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)152; GFX6-NEXT: v_bfe_i32 v1, v0, 0, 16153; GFX6-NEXT: v_ashrrev_i32_e32 v1, 15, v1154; GFX6-NEXT: v_add_i32_e32 v0, vcc, 0xffff8000, v0155; GFX6-NEXT: v_and_b32_e32 v0, v1, v0156; GFX6-NEXT: s_setpc_b64 s[30:31]157;158; GFX8-LABEL: usubsat_as_bithack2_i16:159; GFX8: ; %bb.0:160; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)161; GFX8-NEXT: s_movk_i32 s4, 0x8000162; GFX8-NEXT: v_sub_u16_e64 v0, v0, s4 clamp163; GFX8-NEXT: s_setpc_b64 s[30:31]164;165; GFX9-LABEL: usubsat_as_bithack2_i16:166; GFX9: ; %bb.0:167; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)168; GFX9-NEXT: s_movk_i32 s4, 0x8000169; GFX9-NEXT: v_sub_u16_e64 v0, v0, s4 clamp170; GFX9-NEXT: s_setpc_b64 s[30:31]171;172; GFX10-LABEL: usubsat_as_bithack2_i16:173; GFX10: ; %bb.0:174; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)175; GFX10-NEXT: v_sub_nc_u16 v0, v0, 0x8000 clamp176; GFX10-NEXT: s_setpc_b64 s[30:31]177;178; GFX11-TRUE16-LABEL: usubsat_as_bithack2_i16:179; GFX11-TRUE16: ; %bb.0:180; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)181; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, 0x8000 clamp182; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]183;184; GFX11-FAKE16-LABEL: usubsat_as_bithack2_i16:185; GFX11-FAKE16: ; %bb.0:186; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)187; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, 0x8000 clamp188; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]189 %signsplat = ashr i16 %x, 15190 %flipsign = add i16 %x, 32768191 %result = and i16 %signsplat, %flipsign192 ret i16 %result193}194 195define i16 @usubsat_as_bithack_commute_i16(i16 %x) {196; GFX6-LABEL: usubsat_as_bithack_commute_i16:197; GFX6: ; %bb.0:198; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)199; GFX6-NEXT: v_bfe_i32 v1, v0, 0, 16200; GFX6-NEXT: v_ashrrev_i32_e32 v1, 15, v1201; GFX6-NEXT: v_add_i32_e32 v0, vcc, 0xffff8000, v0202; GFX6-NEXT: v_and_b32_e32 v0, v0, v1203; GFX6-NEXT: s_setpc_b64 s[30:31]204;205; GFX8-LABEL: usubsat_as_bithack_commute_i16:206; GFX8: ; %bb.0:207; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)208; GFX8-NEXT: s_movk_i32 s4, 0x8000209; GFX8-NEXT: v_sub_u16_e64 v0, v0, s4 clamp210; GFX8-NEXT: s_setpc_b64 s[30:31]211;212; GFX9-LABEL: usubsat_as_bithack_commute_i16:213; GFX9: ; %bb.0:214; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)215; GFX9-NEXT: s_movk_i32 s4, 0x8000216; GFX9-NEXT: v_sub_u16_e64 v0, v0, s4 clamp217; GFX9-NEXT: s_setpc_b64 s[30:31]218;219; GFX10-LABEL: usubsat_as_bithack_commute_i16:220; GFX10: ; %bb.0:221; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)222; GFX10-NEXT: v_sub_nc_u16 v0, v0, 0x8000 clamp223; GFX10-NEXT: s_setpc_b64 s[30:31]224;225; GFX11-TRUE16-LABEL: usubsat_as_bithack_commute_i16:226; GFX11-TRUE16: ; %bb.0:227; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)228; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, 0x8000 clamp229; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]230;231; GFX11-FAKE16-LABEL: usubsat_as_bithack_commute_i16:232; GFX11-FAKE16: ; %bb.0:233; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)234; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, 0x8000 clamp235; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]236 %signsplat = ashr i16 %x, 15237 %flipsign = add i16 %x, 32768238 %result = and i16 %flipsign, %signsplat239 ret i16 %result240}241 242define i32 @v_usubsat_i32(i32 %lhs, i32 %rhs) {243; GFX6-LABEL: v_usubsat_i32:244; GFX6: ; %bb.0:245; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)246; GFX6-NEXT: v_max_u32_e32 v0, v0, v1247; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1248; GFX6-NEXT: s_setpc_b64 s[30:31]249;250; GFX8-LABEL: v_usubsat_i32:251; GFX8: ; %bb.0:252; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)253; GFX8-NEXT: v_sub_u32_e64 v0, s[4:5], v0, v1 clamp254; GFX8-NEXT: s_setpc_b64 s[30:31]255;256; GFX9-LABEL: v_usubsat_i32:257; GFX9: ; %bb.0:258; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)259; GFX9-NEXT: v_sub_u32_e64 v0, v0, v1 clamp260; GFX9-NEXT: s_setpc_b64 s[30:31]261;262; GFX10PLUS-LABEL: v_usubsat_i32:263; GFX10PLUS: ; %bb.0:264; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)265; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v0, v0, v1 clamp266; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]267 %result = call i32 @llvm.usub.sat.i32(i32 %lhs, i32 %rhs)268 ret i32 %result269}270 271define <2 x i16> @v_usubsat_v2i16(<2 x i16> %lhs, <2 x i16> %rhs) {272; GFX6-LABEL: v_usubsat_v2i16:273; GFX6: ; %bb.0:274; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)275; GFX6-NEXT: v_and_b32_e32 v3, 0xffff, v3276; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v1277; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2278; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0279; GFX6-NEXT: v_max_u32_e32 v1, v1, v3280; GFX6-NEXT: v_max_u32_e32 v0, v0, v2281; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v3282; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v2283; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v1284; GFX6-NEXT: v_or_b32_e32 v0, v0, v2285; GFX6-NEXT: s_setpc_b64 s[30:31]286;287; GFX8-LABEL: v_usubsat_v2i16:288; GFX8: ; %bb.0:289; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)290; GFX8-NEXT: v_sub_u16_sdwa v2, v0, v1 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1291; GFX8-NEXT: v_sub_u16_e64 v0, v0, v1 clamp292; GFX8-NEXT: v_or_b32_e32 v0, v0, v2293; GFX8-NEXT: s_setpc_b64 s[30:31]294;295; GFX9-LABEL: v_usubsat_v2i16:296; GFX9: ; %bb.0:297; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)298; GFX9-NEXT: v_pk_sub_u16 v0, v0, v1 clamp299; GFX9-NEXT: s_setpc_b64 s[30:31]300;301; GFX10PLUS-LABEL: v_usubsat_v2i16:302; GFX10PLUS: ; %bb.0:303; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)304; GFX10PLUS-NEXT: v_pk_sub_u16 v0, v0, v1 clamp305; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]306 %result = call <2 x i16> @llvm.usub.sat.v2i16(<2 x i16> %lhs, <2 x i16> %rhs)307 ret <2 x i16> %result308}309 310define <3 x i16> @v_usubsat_v3i16(<3 x i16> %lhs, <3 x i16> %rhs) {311; GFX6-LABEL: v_usubsat_v3i16:312; GFX6: ; %bb.0:313; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)314; GFX6-NEXT: v_and_b32_e32 v6, 0xffff, v4315; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v1316; GFX6-NEXT: v_and_b32_e32 v3, 0xffff, v3317; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0318; GFX6-NEXT: v_max_u32_e32 v1, v1, v6319; GFX6-NEXT: v_max_u32_e32 v0, v0, v3320; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v4321; GFX6-NEXT: v_and_b32_e32 v5, 0xffff, v5322; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2323; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v3324; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1325; GFX6-NEXT: v_or_b32_e32 v0, v0, v1326; GFX6-NEXT: v_max_u32_e32 v1, v2, v5327; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v1, v5328; GFX6-NEXT: v_alignbit_b32 v1, v2, v0, 16329; GFX6-NEXT: s_setpc_b64 s[30:31]330;331; GFX8-LABEL: v_usubsat_v3i16:332; GFX8: ; %bb.0:333; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)334; GFX8-NEXT: v_sub_u16_sdwa v4, v0, v2 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1335; GFX8-NEXT: v_sub_u16_e64 v0, v0, v2 clamp336; GFX8-NEXT: v_sub_u16_e64 v1, v1, v3 clamp337; GFX8-NEXT: v_or_b32_e32 v0, v0, v4338; GFX8-NEXT: s_setpc_b64 s[30:31]339;340; GFX9-LABEL: v_usubsat_v3i16:341; GFX9: ; %bb.0:342; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)343; GFX9-NEXT: v_pk_sub_u16 v1, v1, v3 clamp344; GFX9-NEXT: v_pk_sub_u16 v0, v0, v2 clamp345; GFX9-NEXT: s_setpc_b64 s[30:31]346;347; GFX10PLUS-LABEL: v_usubsat_v3i16:348; GFX10PLUS: ; %bb.0:349; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)350; GFX10PLUS-NEXT: v_pk_sub_u16 v0, v0, v2 clamp351; GFX10PLUS-NEXT: v_pk_sub_u16 v1, v1, v3 clamp352; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]353 %result = call <3 x i16> @llvm.usub.sat.v3i16(<3 x i16> %lhs, <3 x i16> %rhs)354 ret <3 x i16> %result355}356 357define <2 x float> @v_usubsat_v4i16(<4 x i16> %lhs, <4 x i16> %rhs) {358; GFX6-LABEL: v_usubsat_v4i16:359; GFX6: ; %bb.0:360; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)361; GFX6-NEXT: v_and_b32_e32 v9, 0xffff, v5362; GFX6-NEXT: v_and_b32_e32 v1, 0xffff, v1363; GFX6-NEXT: v_and_b32_e32 v4, 0xffff, v4364; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0365; GFX6-NEXT: v_max_u32_e32 v1, v1, v9366; GFX6-NEXT: v_max_u32_e32 v0, v0, v4367; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v5368; GFX6-NEXT: v_and_b32_e32 v8, 0xffff, v7369; GFX6-NEXT: v_and_b32_e32 v3, 0xffff, v3370; GFX6-NEXT: v_and_b32_e32 v6, 0xffff, v6371; GFX6-NEXT: v_and_b32_e32 v2, 0xffff, v2372; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v4373; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1374; GFX6-NEXT: v_or_b32_e32 v0, v0, v1375; GFX6-NEXT: v_max_u32_e32 v1, v2, v6376; GFX6-NEXT: v_max_u32_e32 v2, v3, v8377; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v7378; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v6379; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2380; GFX6-NEXT: v_or_b32_e32 v1, v1, v2381; GFX6-NEXT: s_setpc_b64 s[30:31]382;383; GFX8-LABEL: v_usubsat_v4i16:384; GFX8: ; %bb.0:385; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)386; GFX8-NEXT: v_sub_u16_sdwa v4, v0, v2 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1387; GFX8-NEXT: v_sub_u16_e64 v0, v0, v2 clamp388; GFX8-NEXT: v_sub_u16_sdwa v2, v1, v3 clamp dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1389; GFX8-NEXT: v_sub_u16_e64 v1, v1, v3 clamp390; GFX8-NEXT: v_or_b32_e32 v0, v0, v4391; GFX8-NEXT: v_or_b32_e32 v1, v1, v2392; GFX8-NEXT: s_setpc_b64 s[30:31]393;394; GFX9-LABEL: v_usubsat_v4i16:395; GFX9: ; %bb.0:396; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)397; GFX9-NEXT: v_pk_sub_u16 v0, v0, v2 clamp398; GFX9-NEXT: v_pk_sub_u16 v1, v1, v3 clamp399; GFX9-NEXT: s_setpc_b64 s[30:31]400;401; GFX10PLUS-LABEL: v_usubsat_v4i16:402; GFX10PLUS: ; %bb.0:403; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)404; GFX10PLUS-NEXT: v_pk_sub_u16 v0, v0, v2 clamp405; GFX10PLUS-NEXT: v_pk_sub_u16 v1, v1, v3 clamp406; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]407 %result = call <4 x i16> @llvm.usub.sat.v4i16(<4 x i16> %lhs, <4 x i16> %rhs)408 %cast = bitcast <4 x i16> %result to <2 x float>409 ret <2 x float> %cast410}411 412define <2 x i32> @v_usubsat_v2i32(<2 x i32> %lhs, <2 x i32> %rhs) {413; GFX6-LABEL: v_usubsat_v2i32:414; GFX6: ; %bb.0:415; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)416; GFX6-NEXT: v_max_u32_e32 v0, v0, v2417; GFX6-NEXT: v_max_u32_e32 v1, v1, v3418; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v2419; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v3420; GFX6-NEXT: s_setpc_b64 s[30:31]421;422; GFX8-LABEL: v_usubsat_v2i32:423; GFX8: ; %bb.0:424; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)425; GFX8-NEXT: v_sub_u32_e64 v0, s[4:5], v0, v2 clamp426; GFX8-NEXT: v_sub_u32_e64 v1, s[4:5], v1, v3 clamp427; GFX8-NEXT: s_setpc_b64 s[30:31]428;429; GFX9-LABEL: v_usubsat_v2i32:430; GFX9: ; %bb.0:431; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)432; GFX9-NEXT: v_sub_u32_e64 v0, v0, v2 clamp433; GFX9-NEXT: v_sub_u32_e64 v1, v1, v3 clamp434; GFX9-NEXT: s_setpc_b64 s[30:31]435;436; GFX10PLUS-LABEL: v_usubsat_v2i32:437; GFX10PLUS: ; %bb.0:438; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)439; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v0, v0, v2 clamp440; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v1, v1, v3 clamp441; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]442 %result = call <2 x i32> @llvm.usub.sat.v2i32(<2 x i32> %lhs, <2 x i32> %rhs)443 ret <2 x i32> %result444}445 446define <3 x i32> @v_usubsat_v3i32(<3 x i32> %lhs, <3 x i32> %rhs) {447; GFX6-LABEL: v_usubsat_v3i32:448; GFX6: ; %bb.0:449; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)450; GFX6-NEXT: v_max_u32_e32 v0, v0, v3451; GFX6-NEXT: v_max_u32_e32 v1, v1, v4452; GFX6-NEXT: v_max_u32_e32 v2, v2, v5453; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v3454; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v4455; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v5456; GFX6-NEXT: s_setpc_b64 s[30:31]457;458; GFX8-LABEL: v_usubsat_v3i32:459; GFX8: ; %bb.0:460; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)461; GFX8-NEXT: v_sub_u32_e64 v0, s[4:5], v0, v3 clamp462; GFX8-NEXT: v_sub_u32_e64 v1, s[4:5], v1, v4 clamp463; GFX8-NEXT: v_sub_u32_e64 v2, s[4:5], v2, v5 clamp464; GFX8-NEXT: s_setpc_b64 s[30:31]465;466; GFX9-LABEL: v_usubsat_v3i32:467; GFX9: ; %bb.0:468; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)469; GFX9-NEXT: v_sub_u32_e64 v0, v0, v3 clamp470; GFX9-NEXT: v_sub_u32_e64 v1, v1, v4 clamp471; GFX9-NEXT: v_sub_u32_e64 v2, v2, v5 clamp472; GFX9-NEXT: s_setpc_b64 s[30:31]473;474; GFX10PLUS-LABEL: v_usubsat_v3i32:475; GFX10PLUS: ; %bb.0:476; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)477; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v0, v0, v3 clamp478; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v1, v1, v4 clamp479; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v2, v2, v5 clamp480; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]481 %result = call <3 x i32> @llvm.usub.sat.v3i32(<3 x i32> %lhs, <3 x i32> %rhs)482 ret <3 x i32> %result483}484 485define <4 x i32> @v_usubsat_v4i32(<4 x i32> %lhs, <4 x i32> %rhs) {486; GFX6-LABEL: v_usubsat_v4i32:487; GFX6: ; %bb.0:488; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)489; GFX6-NEXT: v_max_u32_e32 v0, v0, v4490; GFX6-NEXT: v_max_u32_e32 v1, v1, v5491; GFX6-NEXT: v_max_u32_e32 v2, v2, v6492; GFX6-NEXT: v_max_u32_e32 v3, v3, v7493; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v4494; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v5495; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v6496; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v7497; GFX6-NEXT: s_setpc_b64 s[30:31]498;499; GFX8-LABEL: v_usubsat_v4i32:500; GFX8: ; %bb.0:501; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)502; GFX8-NEXT: v_sub_u32_e64 v0, s[4:5], v0, v4 clamp503; GFX8-NEXT: v_sub_u32_e64 v1, s[4:5], v1, v5 clamp504; GFX8-NEXT: v_sub_u32_e64 v2, s[4:5], v2, v6 clamp505; GFX8-NEXT: v_sub_u32_e64 v3, s[4:5], v3, v7 clamp506; GFX8-NEXT: s_setpc_b64 s[30:31]507;508; GFX9-LABEL: v_usubsat_v4i32:509; GFX9: ; %bb.0:510; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)511; GFX9-NEXT: v_sub_u32_e64 v0, v0, v4 clamp512; GFX9-NEXT: v_sub_u32_e64 v1, v1, v5 clamp513; GFX9-NEXT: v_sub_u32_e64 v2, v2, v6 clamp514; GFX9-NEXT: v_sub_u32_e64 v3, v3, v7 clamp515; GFX9-NEXT: s_setpc_b64 s[30:31]516;517; GFX10PLUS-LABEL: v_usubsat_v4i32:518; GFX10PLUS: ; %bb.0:519; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)520; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v0, v0, v4 clamp521; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v1, v1, v5 clamp522; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v2, v2, v6 clamp523; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v3, v3, v7 clamp524; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]525 %result = call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %lhs, <4 x i32> %rhs)526 ret <4 x i32> %result527}528 529define <8 x i32> @v_usubsat_v8i32(<8 x i32> %lhs, <8 x i32> %rhs) {530; GFX6-LABEL: v_usubsat_v8i32:531; GFX6: ; %bb.0:532; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)533; GFX6-NEXT: v_max_u32_e32 v0, v0, v8534; GFX6-NEXT: v_max_u32_e32 v1, v1, v9535; GFX6-NEXT: v_max_u32_e32 v2, v2, v10536; GFX6-NEXT: v_max_u32_e32 v3, v3, v11537; GFX6-NEXT: v_max_u32_e32 v4, v4, v12538; GFX6-NEXT: v_max_u32_e32 v5, v5, v13539; GFX6-NEXT: v_max_u32_e32 v6, v6, v14540; GFX6-NEXT: v_max_u32_e32 v7, v7, v15541; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v8542; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v9543; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v10544; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v11545; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v12546; GFX6-NEXT: v_sub_i32_e32 v5, vcc, v5, v13547; GFX6-NEXT: v_sub_i32_e32 v6, vcc, v6, v14548; GFX6-NEXT: v_sub_i32_e32 v7, vcc, v7, v15549; GFX6-NEXT: s_setpc_b64 s[30:31]550;551; GFX8-LABEL: v_usubsat_v8i32:552; GFX8: ; %bb.0:553; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)554; GFX8-NEXT: v_sub_u32_e64 v0, s[4:5], v0, v8 clamp555; GFX8-NEXT: v_sub_u32_e64 v1, s[4:5], v1, v9 clamp556; GFX8-NEXT: v_sub_u32_e64 v2, s[4:5], v2, v10 clamp557; GFX8-NEXT: v_sub_u32_e64 v3, s[4:5], v3, v11 clamp558; GFX8-NEXT: v_sub_u32_e64 v4, s[4:5], v4, v12 clamp559; GFX8-NEXT: v_sub_u32_e64 v5, s[4:5], v5, v13 clamp560; GFX8-NEXT: v_sub_u32_e64 v6, s[4:5], v6, v14 clamp561; GFX8-NEXT: v_sub_u32_e64 v7, s[4:5], v7, v15 clamp562; GFX8-NEXT: s_setpc_b64 s[30:31]563;564; GFX9-LABEL: v_usubsat_v8i32:565; GFX9: ; %bb.0:566; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)567; GFX9-NEXT: v_sub_u32_e64 v0, v0, v8 clamp568; GFX9-NEXT: v_sub_u32_e64 v1, v1, v9 clamp569; GFX9-NEXT: v_sub_u32_e64 v2, v2, v10 clamp570; GFX9-NEXT: v_sub_u32_e64 v3, v3, v11 clamp571; GFX9-NEXT: v_sub_u32_e64 v4, v4, v12 clamp572; GFX9-NEXT: v_sub_u32_e64 v5, v5, v13 clamp573; GFX9-NEXT: v_sub_u32_e64 v6, v6, v14 clamp574; GFX9-NEXT: v_sub_u32_e64 v7, v7, v15 clamp575; GFX9-NEXT: s_setpc_b64 s[30:31]576;577; GFX10PLUS-LABEL: v_usubsat_v8i32:578; GFX10PLUS: ; %bb.0:579; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)580; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v0, v0, v8 clamp581; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v1, v1, v9 clamp582; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v2, v2, v10 clamp583; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v3, v3, v11 clamp584; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v4, v4, v12 clamp585; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v5, v5, v13 clamp586; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v6, v6, v14 clamp587; GFX10PLUS-NEXT: v_sub_nc_u32_e64 v7, v7, v15 clamp588; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]589 %result = call <8 x i32> @llvm.usub.sat.v8i32(<8 x i32> %lhs, <8 x i32> %rhs)590 ret <8 x i32> %result591}592 593define <16 x i32> @v_usubsat_v16i32(<16 x i32> %lhs, <16 x i32> %rhs) {594; GFX6-LABEL: v_usubsat_v16i32:595; GFX6: ; %bb.0:596; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; GFX6-NEXT: v_max_u32_e32 v0, v0, v16598; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v16599; GFX6-NEXT: buffer_load_dword v16, off, s[0:3], s32600; GFX6-NEXT: v_max_u32_e32 v1, v1, v17601; GFX6-NEXT: v_max_u32_e32 v2, v2, v18602; GFX6-NEXT: v_max_u32_e32 v3, v3, v19603; GFX6-NEXT: v_max_u32_e32 v4, v4, v20604; GFX6-NEXT: v_max_u32_e32 v5, v5, v21605; GFX6-NEXT: v_max_u32_e32 v6, v6, v22606; GFX6-NEXT: v_max_u32_e32 v7, v7, v23607; GFX6-NEXT: v_max_u32_e32 v8, v8, v24608; GFX6-NEXT: v_max_u32_e32 v9, v9, v25609; GFX6-NEXT: v_max_u32_e32 v10, v10, v26610; GFX6-NEXT: v_max_u32_e32 v11, v11, v27611; GFX6-NEXT: v_max_u32_e32 v12, v12, v28612; GFX6-NEXT: v_max_u32_e32 v13, v13, v29613; GFX6-NEXT: v_max_u32_e32 v14, v14, v30614; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v17615; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v18616; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v19617; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v20618; GFX6-NEXT: v_sub_i32_e32 v5, vcc, v5, v21619; GFX6-NEXT: v_sub_i32_e32 v6, vcc, v6, v22620; GFX6-NEXT: v_sub_i32_e32 v7, vcc, v7, v23621; GFX6-NEXT: v_sub_i32_e32 v8, vcc, v8, v24622; GFX6-NEXT: v_sub_i32_e32 v9, vcc, v9, v25623; GFX6-NEXT: v_sub_i32_e32 v10, vcc, v10, v26624; GFX6-NEXT: v_sub_i32_e32 v11, vcc, v11, v27625; GFX6-NEXT: v_sub_i32_e32 v12, vcc, v12, v28626; GFX6-NEXT: v_sub_i32_e32 v13, vcc, v13, v29627; GFX6-NEXT: v_sub_i32_e32 v14, vcc, v14, v30628; GFX6-NEXT: s_waitcnt vmcnt(0)629; GFX6-NEXT: v_max_u32_e32 v15, v15, v16630; GFX6-NEXT: v_sub_i32_e32 v15, vcc, v15, v16631; GFX6-NEXT: s_setpc_b64 s[30:31]632;633; GFX8-LABEL: v_usubsat_v16i32:634; GFX8: ; %bb.0:635; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)636; GFX8-NEXT: v_sub_u32_e64 v0, s[4:5], v0, v16 clamp637; GFX8-NEXT: buffer_load_dword v16, off, s[0:3], s32638; GFX8-NEXT: v_sub_u32_e64 v1, s[4:5], v1, v17 clamp639; GFX8-NEXT: v_sub_u32_e64 v2, s[4:5], v2, v18 clamp640; GFX8-NEXT: v_sub_u32_e64 v3, s[4:5], v3, v19 clamp641; GFX8-NEXT: v_sub_u32_e64 v4, s[4:5], v4, v20 clamp642; GFX8-NEXT: v_sub_u32_e64 v5, s[4:5], v5, v21 clamp643; GFX8-NEXT: v_sub_u32_e64 v6, s[4:5], v6, v22 clamp644; GFX8-NEXT: v_sub_u32_e64 v7, s[4:5], v7, v23 clamp645; GFX8-NEXT: v_sub_u32_e64 v8, s[4:5], v8, v24 clamp646; GFX8-NEXT: v_sub_u32_e64 v9, s[4:5], v9, v25 clamp647; GFX8-NEXT: v_sub_u32_e64 v10, s[4:5], v10, v26 clamp648; GFX8-NEXT: v_sub_u32_e64 v11, s[4:5], v11, v27 clamp649; GFX8-NEXT: v_sub_u32_e64 v12, s[4:5], v12, v28 clamp650; GFX8-NEXT: v_sub_u32_e64 v13, s[4:5], v13, v29 clamp651; GFX8-NEXT: v_sub_u32_e64 v14, s[4:5], v14, v30 clamp652; GFX8-NEXT: s_waitcnt vmcnt(0)653; GFX8-NEXT: v_sub_u32_e64 v15, s[4:5], v15, v16 clamp654; GFX8-NEXT: s_setpc_b64 s[30:31]655;656; GFX9-LABEL: v_usubsat_v16i32:657; GFX9: ; %bb.0:658; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)659; GFX9-NEXT: v_sub_u32_e64 v0, v0, v16 clamp660; GFX9-NEXT: buffer_load_dword v16, off, s[0:3], s32661; GFX9-NEXT: v_sub_u32_e64 v1, v1, v17 clamp662; GFX9-NEXT: v_sub_u32_e64 v2, v2, v18 clamp663; GFX9-NEXT: v_sub_u32_e64 v3, v3, v19 clamp664; GFX9-NEXT: v_sub_u32_e64 v4, v4, v20 clamp665; GFX9-NEXT: v_sub_u32_e64 v5, v5, v21 clamp666; GFX9-NEXT: v_sub_u32_e64 v6, v6, v22 clamp667; GFX9-NEXT: v_sub_u32_e64 v7, v7, v23 clamp668; GFX9-NEXT: v_sub_u32_e64 v8, v8, v24 clamp669; GFX9-NEXT: v_sub_u32_e64 v9, v9, v25 clamp670; GFX9-NEXT: v_sub_u32_e64 v10, v10, v26 clamp671; GFX9-NEXT: v_sub_u32_e64 v11, v11, v27 clamp672; GFX9-NEXT: v_sub_u32_e64 v12, v12, v28 clamp673; GFX9-NEXT: v_sub_u32_e64 v13, v13, v29 clamp674; GFX9-NEXT: v_sub_u32_e64 v14, v14, v30 clamp675; GFX9-NEXT: s_waitcnt vmcnt(0)676; GFX9-NEXT: v_sub_u32_e64 v15, v15, v16 clamp677; GFX9-NEXT: s_setpc_b64 s[30:31]678;679; GFX10-LABEL: v_usubsat_v16i32:680; GFX10: ; %bb.0:681; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)682; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32683; GFX10-NEXT: v_sub_nc_u32_e64 v0, v0, v16 clamp684; GFX10-NEXT: v_sub_nc_u32_e64 v1, v1, v17 clamp685; GFX10-NEXT: v_sub_nc_u32_e64 v2, v2, v18 clamp686; GFX10-NEXT: v_sub_nc_u32_e64 v3, v3, v19 clamp687; GFX10-NEXT: v_sub_nc_u32_e64 v4, v4, v20 clamp688; GFX10-NEXT: v_sub_nc_u32_e64 v5, v5, v21 clamp689; GFX10-NEXT: v_sub_nc_u32_e64 v6, v6, v22 clamp690; GFX10-NEXT: v_sub_nc_u32_e64 v7, v7, v23 clamp691; GFX10-NEXT: v_sub_nc_u32_e64 v8, v8, v24 clamp692; GFX10-NEXT: v_sub_nc_u32_e64 v9, v9, v25 clamp693; GFX10-NEXT: v_sub_nc_u32_e64 v10, v10, v26 clamp694; GFX10-NEXT: v_sub_nc_u32_e64 v11, v11, v27 clamp695; GFX10-NEXT: v_sub_nc_u32_e64 v12, v12, v28 clamp696; GFX10-NEXT: v_sub_nc_u32_e64 v13, v13, v29 clamp697; GFX10-NEXT: v_sub_nc_u32_e64 v14, v14, v30 clamp698; GFX10-NEXT: s_waitcnt vmcnt(0)699; GFX10-NEXT: v_sub_nc_u32_e64 v15, v15, v31 clamp700; GFX10-NEXT: s_setpc_b64 s[30:31]701;702; GFX11-LABEL: v_usubsat_v16i32:703; GFX11: ; %bb.0:704; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)705; GFX11-NEXT: scratch_load_b32 v31, off, s32706; GFX11-NEXT: v_sub_nc_u32_e64 v0, v0, v16 clamp707; GFX11-NEXT: v_sub_nc_u32_e64 v1, v1, v17 clamp708; GFX11-NEXT: v_sub_nc_u32_e64 v2, v2, v18 clamp709; GFX11-NEXT: v_sub_nc_u32_e64 v3, v3, v19 clamp710; GFX11-NEXT: v_sub_nc_u32_e64 v4, v4, v20 clamp711; GFX11-NEXT: v_sub_nc_u32_e64 v5, v5, v21 clamp712; GFX11-NEXT: v_sub_nc_u32_e64 v6, v6, v22 clamp713; GFX11-NEXT: v_sub_nc_u32_e64 v7, v7, v23 clamp714; GFX11-NEXT: v_sub_nc_u32_e64 v8, v8, v24 clamp715; GFX11-NEXT: v_sub_nc_u32_e64 v9, v9, v25 clamp716; GFX11-NEXT: v_sub_nc_u32_e64 v10, v10, v26 clamp717; GFX11-NEXT: v_sub_nc_u32_e64 v11, v11, v27 clamp718; GFX11-NEXT: v_sub_nc_u32_e64 v12, v12, v28 clamp719; GFX11-NEXT: v_sub_nc_u32_e64 v13, v13, v29 clamp720; GFX11-NEXT: v_sub_nc_u32_e64 v14, v14, v30 clamp721; GFX11-NEXT: s_waitcnt vmcnt(0)722; GFX11-NEXT: v_sub_nc_u32_e64 v15, v15, v31 clamp723; GFX11-NEXT: s_setpc_b64 s[30:31]724 %result = call <16 x i32> @llvm.usub.sat.v16i32(<16 x i32> %lhs, <16 x i32> %rhs)725 ret <16 x i32> %result726}727 728 729define i64 @v_usubsat_i64(i64 %lhs, i64 %rhs) {730; GFX6-LABEL: v_usubsat_i64:731; GFX6: ; %bb.0:732; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)733; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v2734; GFX6-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc735; GFX6-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc736; GFX6-NEXT: v_cndmask_b32_e64 v1, v1, 0, vcc737; GFX6-NEXT: s_setpc_b64 s[30:31]738;739; GFX8-LABEL: v_usubsat_i64:740; GFX8: ; %bb.0:741; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)742; GFX8-NEXT: v_sub_u32_e32 v0, vcc, v0, v2743; GFX8-NEXT: v_subb_u32_e32 v1, vcc, v1, v3, vcc744; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc745; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, 0, vcc746; GFX8-NEXT: s_setpc_b64 s[30:31]747;748; GFX9-LABEL: v_usubsat_i64:749; GFX9: ; %bb.0:750; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)751; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2752; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc753; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc754; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, 0, vcc755; GFX9-NEXT: s_setpc_b64 s[30:31]756;757; GFX10PLUS-LABEL: v_usubsat_i64:758; GFX10PLUS: ; %bb.0:759; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)760; GFX10PLUS-NEXT: v_sub_co_u32 v0, vcc_lo, v0, v2761; GFX10PLUS-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, v1, v3, vcc_lo762; GFX10PLUS-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc_lo763; GFX10PLUS-NEXT: v_cndmask_b32_e64 v1, v1, 0, vcc_lo764; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]765 %result = call i64 @llvm.usub.sat.i64(i64 %lhs, i64 %rhs)766 ret i64 %result767}768 769declare i8 @llvm.usub.sat.i8(i8, i8) #0770declare i16 @llvm.usub.sat.i16(i16, i16) #0771declare <2 x i16> @llvm.usub.sat.v2i16(<2 x i16>, <2 x i16>) #0772declare <3 x i16> @llvm.usub.sat.v3i16(<3 x i16>, <3 x i16>) #0773declare <4 x i16> @llvm.usub.sat.v4i16(<4 x i16>, <4 x i16>) #0774declare i32 @llvm.usub.sat.i32(i32, i32) #0775declare <2 x i32> @llvm.usub.sat.v2i32(<2 x i32>, <2 x i32>) #0776declare <3 x i32> @llvm.usub.sat.v3i32(<3 x i32>, <3 x i32>) #0777declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>) #0778declare <8 x i32> @llvm.usub.sat.v8i32(<8 x i32>, <8 x i32>) #0779declare <16 x i32> @llvm.usub.sat.v16i32(<16 x i32>, <16 x i32>) #0780declare i64 @llvm.usub.sat.i64(i64, i64) #0781 782attributes #0 = { nounwind readnone speculatable willreturn }783