54 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9 %s3define amdgpu_kernel void @sdwa_test_sub() local_unnamed_addr #0 {4; GFX9-LABEL: sdwa_test_sub:5; GFX9: ; %bb.0: ; %bb6; GFX9-NEXT: v_add_u32_e32 v1, 10, v07; GFX9-NEXT: v_add_u32_e32 v0, 20, v08; GFX9-NEXT: v_sub_co_u32_sdwa v0, vcc, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_09; GFX9-NEXT: v_subb_co_u32_e64 v1, s[0:1], 0, 0, vcc10; GFX9-NEXT: global_store_dwordx2 v[0:1], v[0:1], off11; GFX9-NEXT: s_endpgm12bb:13 %tid = tail call i32 @llvm.amdgcn.workitem.id.x()14 %v0 = add i32 %tid, 1015 %v1 = add i32 %tid, 2016 %v2 = zext i32 %v0 to i6417 %v3 = zext i32 %v1 to i6418 %v.t = and i64 %v3, 25519 %v4 = sub i64 %v2, %v.t20 store i64 %v4, ptr addrspace(1) poison21 ret void22}23 24 25define amdgpu_kernel void @test_sub_co_sdwa(ptr addrspace(1) %arg, ptr addrspace(1) %arg1) #0 {26; GFX9-LABEL: test_sub_co_sdwa:27; GFX9: ; %bb.0: ; %bb28; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2429; GFX9-NEXT: v_lshlrev_b32_e32 v2, 2, v030; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v031; GFX9-NEXT: s_waitcnt lgkmcnt(0)32; GFX9-NEXT: global_load_dword v4, v2, s[2:3]33; GFX9-NEXT: global_load_dwordx2 v[0:1], v3, s[0:1]34; GFX9-NEXT: s_waitcnt vmcnt(0)35; GFX9-NEXT: v_sub_co_u32_sdwa v0, vcc, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_036; GFX9-NEXT: v_subbrev_co_u32_e32 v1, vcc, 0, v1, vcc37; GFX9-NEXT: global_store_dwordx2 v3, v[0:1], s[0:1]38; GFX9-NEXT: s_endpgm39bb:40 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()41 %tmp3 = getelementptr inbounds i32, ptr addrspace(1) %arg1, i32 %tmp42 %tmp4 = load i32, ptr addrspace(1) %tmp3, align 443 %tmp5 = and i32 %tmp4, 25544 %tmp6 = zext i32 %tmp5 to i6445 %tmp7 = getelementptr inbounds i64, ptr addrspace(1) %arg, i32 %tmp46 %tmp8 = load i64, ptr addrspace(1) %tmp7, align 847 %tmp9 = sub nsw i64 %tmp8, %tmp648 store i64 %tmp9, ptr addrspace(1) %tmp7, align 849 ret void50}51 52 53declare i32 @llvm.amdgcn.workitem.id.x()54