295 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,GFX1010 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GCN,GFX1030 %s4 5define i32 @test_insert_vcmpx_pattern_lt(i32 %x) {6; GFX1010-LABEL: test_insert_vcmpx_pattern_lt:7; GFX1010: ; %bb.0: ; %entry8; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9; GFX1010-NEXT: v_cmp_lt_i32_e32 vcc_lo, 15, v010; GFX1010-NEXT: s_and_saveexec_b32 s4, vcc_lo11; GFX1010-NEXT: ; %bb.1: ; %if12; GFX1010-NEXT: v_lshlrev_b32_e32 v0, 2, v013; GFX1010-NEXT: ; %bb.2: ; %UnifiedReturnBlock14; GFX1010-NEXT: s_or_b32 exec_lo, exec_lo, s415; GFX1010-NEXT: s_setpc_b64 s[30:31]16;17; GFX1030-LABEL: test_insert_vcmpx_pattern_lt:18; GFX1030: ; %bb.0: ; %entry19; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)20; GFX1030-NEXT: s_mov_b32 s4, exec_lo21; GFX1030-NEXT: v_cmpx_lt_i32_e32 15, v022; GFX1030-NEXT: ; %bb.1: ; %if23; GFX1030-NEXT: v_lshlrev_b32_e32 v0, 2, v024; GFX1030-NEXT: ; %bb.2: ; %UnifiedReturnBlock25; GFX1030-NEXT: s_or_b32 exec_lo, exec_lo, s426; GFX1030-NEXT: s_setpc_b64 s[30:31]27entry:28 %bc = icmp slt i32 %x, 1629 br i1 %bc, label %endif, label %if30 31if:32 %ret = shl i32 %x, 233 ret i32 %ret34 35endif:36 ret i32 %x37}38 39define i32 @test_insert_vcmpx_pattern_gt(i32 %x) {40; GFX1010-LABEL: test_insert_vcmpx_pattern_gt:41; GFX1010: ; %bb.0: ; %entry42; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)43; GFX1010-NEXT: v_cmp_gt_i32_e32 vcc_lo, 17, v044; GFX1010-NEXT: s_and_saveexec_b32 s4, vcc_lo45; GFX1010-NEXT: ; %bb.1: ; %if46; GFX1010-NEXT: v_lshlrev_b32_e32 v0, 2, v047; GFX1010-NEXT: ; %bb.2: ; %UnifiedReturnBlock48; GFX1010-NEXT: s_or_b32 exec_lo, exec_lo, s449; GFX1010-NEXT: s_setpc_b64 s[30:31]50;51; GFX1030-LABEL: test_insert_vcmpx_pattern_gt:52; GFX1030: ; %bb.0: ; %entry53; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)54; GFX1030-NEXT: s_mov_b32 s4, exec_lo55; GFX1030-NEXT: v_cmpx_gt_i32_e32 17, v056; GFX1030-NEXT: ; %bb.1: ; %if57; GFX1030-NEXT: v_lshlrev_b32_e32 v0, 2, v058; GFX1030-NEXT: ; %bb.2: ; %UnifiedReturnBlock59; GFX1030-NEXT: s_or_b32 exec_lo, exec_lo, s460; GFX1030-NEXT: s_setpc_b64 s[30:31]61entry:62 %bc = icmp sgt i32 %x, 1663 br i1 %bc, label %endif, label %if64 65if:66 %ret = shl i32 %x, 267 ret i32 %ret68 69endif:70 ret i32 %x71}72 73define i32 @test_insert_vcmpx_pattern_eq(i32 %x) {74; GFX1010-LABEL: test_insert_vcmpx_pattern_eq:75; GFX1010: ; %bb.0: ; %entry76; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)77; GFX1010-NEXT: v_cmp_ne_u32_e32 vcc_lo, 16, v078; GFX1010-NEXT: s_and_saveexec_b32 s4, vcc_lo79; GFX1010-NEXT: ; %bb.1: ; %if80; GFX1010-NEXT: v_lshlrev_b32_e32 v0, 2, v081; GFX1010-NEXT: ; %bb.2: ; %UnifiedReturnBlock82; GFX1010-NEXT: s_or_b32 exec_lo, exec_lo, s483; GFX1010-NEXT: s_setpc_b64 s[30:31]84;85; GFX1030-LABEL: test_insert_vcmpx_pattern_eq:86; GFX1030: ; %bb.0: ; %entry87; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)88; GFX1030-NEXT: s_mov_b32 s4, exec_lo89; GFX1030-NEXT: v_cmpx_ne_u32_e32 16, v090; GFX1030-NEXT: ; %bb.1: ; %if91; GFX1030-NEXT: v_lshlrev_b32_e32 v0, 2, v092; GFX1030-NEXT: ; %bb.2: ; %UnifiedReturnBlock93; GFX1030-NEXT: s_or_b32 exec_lo, exec_lo, s494; GFX1030-NEXT: s_setpc_b64 s[30:31]95entry:96 %bc = icmp eq i32 %x, 1697 br i1 %bc, label %endif, label %if98 99if:100 %ret = shl i32 %x, 2101 ret i32 %ret102 103endif:104 ret i32 %x105}106 107define i32 @test_insert_vcmpx_pattern_ne(i32 %x) {108; GFX1010-LABEL: test_insert_vcmpx_pattern_ne:109; GFX1010: ; %bb.0: ; %entry110; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)111; GFX1010-NEXT: v_cmp_eq_u32_e32 vcc_lo, 16, v0112; GFX1010-NEXT: s_and_saveexec_b32 s4, vcc_lo113; GFX1010-NEXT: ; %bb.1: ; %if114; GFX1010-NEXT: v_lshlrev_b32_e32 v0, 2, v0115; GFX1010-NEXT: ; %bb.2: ; %UnifiedReturnBlock116; GFX1010-NEXT: s_or_b32 exec_lo, exec_lo, s4117; GFX1010-NEXT: s_setpc_b64 s[30:31]118;119; GFX1030-LABEL: test_insert_vcmpx_pattern_ne:120; GFX1030: ; %bb.0: ; %entry121; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)122; GFX1030-NEXT: s_mov_b32 s4, exec_lo123; GFX1030-NEXT: v_cmpx_eq_u32_e32 16, v0124; GFX1030-NEXT: ; %bb.1: ; %if125; GFX1030-NEXT: v_lshlrev_b32_e32 v0, 2, v0126; GFX1030-NEXT: ; %bb.2: ; %UnifiedReturnBlock127; GFX1030-NEXT: s_or_b32 exec_lo, exec_lo, s4128; GFX1030-NEXT: s_setpc_b64 s[30:31]129entry:130 %bc = icmp ne i32 %x, 16131 br i1 %bc, label %endif, label %if132 133if:134 %ret = shl i32 %x, 2135 ret i32 %ret136 137endif:138 ret i32 %x139}140 141define i32 @test_insert_vcmpx_pattern_le(i32 %x) {142; GFX1010-LABEL: test_insert_vcmpx_pattern_le:143; GFX1010: ; %bb.0: ; %entry144; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)145; GFX1010-NEXT: v_cmp_lt_i32_e32 vcc_lo, 16, v0146; GFX1010-NEXT: s_and_saveexec_b32 s4, vcc_lo147; GFX1010-NEXT: ; %bb.1: ; %if148; GFX1010-NEXT: v_lshlrev_b32_e32 v0, 2, v0149; GFX1010-NEXT: ; %bb.2: ; %UnifiedReturnBlock150; GFX1010-NEXT: s_or_b32 exec_lo, exec_lo, s4151; GFX1010-NEXT: s_setpc_b64 s[30:31]152;153; GFX1030-LABEL: test_insert_vcmpx_pattern_le:154; GFX1030: ; %bb.0: ; %entry155; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)156; GFX1030-NEXT: s_mov_b32 s4, exec_lo157; GFX1030-NEXT: v_cmpx_lt_i32_e32 16, v0158; GFX1030-NEXT: ; %bb.1: ; %if159; GFX1030-NEXT: v_lshlrev_b32_e32 v0, 2, v0160; GFX1030-NEXT: ; %bb.2: ; %UnifiedReturnBlock161; GFX1030-NEXT: s_or_b32 exec_lo, exec_lo, s4162; GFX1030-NEXT: s_setpc_b64 s[30:31]163entry:164 %bc = icmp sle i32 %x, 16165 br i1 %bc, label %endif, label %if166 167if:168 %ret = shl i32 %x, 2169 ret i32 %ret170 171endif:172 ret i32 %x173}174 175define i32 @test_insert_vcmpx_pattern_ge(i32 %x) {176; GFX1010-LABEL: test_insert_vcmpx_pattern_ge:177; GFX1010: ; %bb.0: ; %entry178; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)179; GFX1010-NEXT: v_cmp_gt_i32_e32 vcc_lo, 16, v0180; GFX1010-NEXT: s_and_saveexec_b32 s4, vcc_lo181; GFX1010-NEXT: ; %bb.1: ; %if182; GFX1010-NEXT: v_lshlrev_b32_e32 v0, 2, v0183; GFX1010-NEXT: ; %bb.2: ; %UnifiedReturnBlock184; GFX1010-NEXT: s_or_b32 exec_lo, exec_lo, s4185; GFX1010-NEXT: s_setpc_b64 s[30:31]186;187; GFX1030-LABEL: test_insert_vcmpx_pattern_ge:188; GFX1030: ; %bb.0: ; %entry189; GFX1030-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)190; GFX1030-NEXT: s_mov_b32 s4, exec_lo191; GFX1030-NEXT: v_cmpx_gt_i32_e32 16, v0192; GFX1030-NEXT: ; %bb.1: ; %if193; GFX1030-NEXT: v_lshlrev_b32_e32 v0, 2, v0194; GFX1030-NEXT: ; %bb.2: ; %UnifiedReturnBlock195; GFX1030-NEXT: s_or_b32 exec_lo, exec_lo, s4196; GFX1030-NEXT: s_setpc_b64 s[30:31]197entry:198 %bc = icmp sge i32 %x, 16199 br i1 %bc, label %endif, label %if200 201if:202 %ret = shl i32 %x, 2203 ret i32 %ret204 205endif:206 ret i32 %x207}208 209declare amdgpu_gfx void @check_live_outs_helper(i64) #0210 211; In cases where the output operand cannot be safely removed,212; don't apply the v_cmpx transformation.213define amdgpu_cs void @check_live_outs(i32 %a, i32 %b) {214; GCN-LABEL: check_live_outs:215; GCN: ; %bb.0:216; GCN-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0217; GCN-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1218; GCN-NEXT: s_mov_b32 s10, -1219; GCN-NEXT: s_mov_b32 s11, 0x31c16000220; GCN-NEXT: s_add_u32 s8, s8, s0221; GCN-NEXT: v_cmp_eq_u32_e64 s0, v0, v1222; GCN-NEXT: s_addc_u32 s9, s9, 0223; GCN-NEXT: s_mov_b32 s32, 0224; GCN-NEXT: s_and_saveexec_b32 s1, s0225; GCN-NEXT: s_cbranch_execz .LBB6_2226; GCN-NEXT: ; %bb.1: ; %l1227; GCN-NEXT: s_getpc_b64 s[2:3]228; GCN-NEXT: s_add_u32 s2, s2, check_live_outs_helper@gotpcrel32@lo+4229; GCN-NEXT: s_addc_u32 s3, s3, check_live_outs_helper@gotpcrel32@hi+12230; GCN-NEXT: v_mov_b32_e32 v0, s0231; GCN-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0232; GCN-NEXT: v_mov_b32_e32 v1, 0233; GCN-NEXT: s_mov_b64 s[0:1], s[8:9]234; GCN-NEXT: s_mov_b64 s[2:3], s[10:11]235; GCN-NEXT: s_waitcnt lgkmcnt(0)236; GCN-NEXT: s_swappc_b64 s[30:31], s[4:5]237; GCN-NEXT: .LBB6_2: ; %l2238; GCN-NEXT: s_endpgm239 %cond = icmp eq i32 %a, %b240 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %a, i32 %b, i32 32)241 br i1 %cond, label %l1, label %l2242l1:243 call amdgpu_gfx void @check_live_outs_helper(i64 %result)244 br label %l2245l2:246 ret void247}248 249; Omit the transformation if the s_and_saveexec instruction overwrites250; any of the v_cmp source operands.251define i32 @check_saveexec_overwrites_vcmp_source(i32 inreg %a, i32 inreg %b) {252; GCN-LABEL: check_saveexec_overwrites_vcmp_source:253; GCN: ; %bb.0: ; %entry254; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)255; GCN-NEXT: s_cmp_lt_i32 s16, 0256; GCN-NEXT: s_cbranch_scc1 .LBB7_2257; GCN-NEXT: ; %bb.1: ; %if258; GCN-NEXT: s_lshl_b32 s4, s16, 2259; GCN-NEXT: s_or_b32 s4, s4, s17260; GCN-NEXT: v_mov_b32_e32 v0, s4261; GCN-NEXT: s_setpc_b64 s[30:31]262; GCN-NEXT: .LBB7_2: ; %then263; GCN-NEXT: v_cmp_eq_u32_e64 s4, s16, s17264; GCN-NEXT: s_cmp_ge_i32 s4, s17265; GCN-NEXT: s_cbranch_scc1 .LBB7_4266; GCN-NEXT: ; %bb.3: ; %after267; GCN-NEXT: v_mov_b32_e32 v0, s4268; GCN-NEXT: s_setpc_b64 s[30:31]269; GCN-NEXT: .LBB7_4: ; %end270; GCN-NEXT: v_mov_b32_e32 v0, s16271; GCN-NEXT: s_setpc_b64 s[30:31]272entry:273 %0 = icmp sge i32 %a, 0274 br i1 %0, label %if, label %then275 276if:277 %1 = shl i32 %a, 2278 %2 = or i32 %1, %b279 ret i32 %2280 281then:282 %3 = call i64 @llvm.amdgcn.icmp.i32(i32 %a, i32 %b, i32 32)283 %4 = trunc i64 %3 to i32284 %5 = icmp slt i32 %4, %b285 br i1 %5, label %after, label %end286 287after:288 ret i32 %4289 290end:291 ret i32 %a292}293 294declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #0295