146 lines · plain
1; RUN: llc -mtriple=amdgcn-- -mcpu=verde -mattr=-promote-alloca < %s | FileCheck -check-prefix=FUNC %s2; RUN: llc -mtriple=amdgcn-- -mcpu=verde -mattr=+promote-alloca < %s | FileCheck -check-prefix=FUNC %s3; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -mattr=-promote-alloca < %s | FileCheck -check-prefix=FUNC %s4; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -mattr=+promote-alloca < %s | FileCheck -check-prefix=FUNC %s5; RUN: llc -mtriple=r600-- -mcpu=redwood < %s | FileCheck --check-prefixes=EG,FUNC %s6; RUN: opt -S -mtriple=amdgcn-- -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s7 8; OPT-LABEL: @vector_read(9; OPT: %0 = extractelement <4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 %index10; OPT: store i32 %0, ptr addrspace(1) %out, align 411 12; FUNC-LABEL: {{^}}vector_read:13; EG: MOV14; EG: MOV15; EG: MOV16; EG: MOV17; EG: MOVA_INT18define amdgpu_kernel void @vector_read(ptr addrspace(1) %out, i32 %index) {19entry:20 %tmp = alloca [4 x i32], addrspace(5)21 %y = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 122 %z = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 223 %w = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 324 store i32 0, ptr addrspace(5) %tmp25 store i32 1, ptr addrspace(5) %y26 store i32 2, ptr addrspace(5) %z27 store i32 3, ptr addrspace(5) %w28 %tmp1 = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 %index29 %tmp2 = load i32, ptr addrspace(5) %tmp130 store i32 %tmp2, ptr addrspace(1) %out31 ret void32}33 34; OPT-LABEL: @vector_write(35; OPT: %0 = insertelement <4 x i32> zeroinitializer, i32 1, i32 %w_index36; OPT: %1 = extractelement <4 x i32> %0, i32 %r_index37; OPT: store i32 %1, ptr addrspace(1) %out, align 438 39; FUNC-LABEL: {{^}}vector_write:40; EG: MOV41; EG: MOV42; EG: MOV43; EG: MOV44; EG: MOVA_INT45; EG: MOVA_INT46define amdgpu_kernel void @vector_write(ptr addrspace(1) %out, i32 %w_index, i32 %r_index) {47entry:48 %tmp = alloca [4 x i32], addrspace(5)49 %y = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 150 %z = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 251 %w = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 352 store i32 0, ptr addrspace(5) %tmp53 store i32 0, ptr addrspace(5) %y54 store i32 0, ptr addrspace(5) %z55 store i32 0, ptr addrspace(5) %w56 %tmp1 = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 %w_index57 store i32 1, ptr addrspace(5) %tmp158 %tmp2 = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 %r_index59 %tmp3 = load i32, ptr addrspace(5) %tmp260 store i32 %tmp3, ptr addrspace(1) %out61 ret void62}63 64; This test should be optimize to:65; store i32 0, ptr addrspace(1) %out66 67; OPT-LABEL: @bitcast_gep(68; OPT-LABEL: store i32 0, ptr addrspace(1) %out, align 469 70; FUNC-LABEL: {{^}}bitcast_gep:71; EG: STORE_RAW72define amdgpu_kernel void @bitcast_gep(ptr addrspace(1) %out, i32 %w_index, i32 %r_index) {73entry:74 %tmp = alloca [4 x i32], addrspace(5)75 %y = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 176 %z = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 277 %w = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 378 store i32 0, ptr addrspace(5) %tmp79 store i32 0, ptr addrspace(5) %y80 store i32 0, ptr addrspace(5) %z81 store i32 0, ptr addrspace(5) %w82 %tmp1 = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 183 %tmp4 = load i32, ptr addrspace(5) %tmp184 store i32 %tmp4, ptr addrspace(1) %out85 ret void86}87 88; OPT-LABEL: @vector_read_bitcast_gep(89; OPT: %0 = extractelement <4 x i32> <i32 1065353216, i32 1, i32 2, i32 3>, i32 %index90; OPT: store i32 %0, ptr addrspace(1) %out, align 491define amdgpu_kernel void @vector_read_bitcast_gep(ptr addrspace(1) %out, i32 %index) {92entry:93 %tmp = alloca [4 x i32], addrspace(5)94 %y = getelementptr inbounds [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 195 %z = getelementptr inbounds [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 296 %w = getelementptr inbounds [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 397 store float 1.0, ptr addrspace(5) %tmp98 store i32 1, ptr addrspace(5) %y99 store i32 2, ptr addrspace(5) %z100 store i32 3, ptr addrspace(5) %w101 %tmp1 = getelementptr inbounds [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 %index102 %tmp2 = load i32, ptr addrspace(5) %tmp1103 store i32 %tmp2, ptr addrspace(1) %out104 ret void105}106 107; OPT-LABEL: @vector_read_bitcast_alloca(108; OPT: %0 = extractelement <4 x float> <float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 4.000000e+00>, i32 %index109; OPT: store float %0, ptr addrspace(1) %out, align 4110define amdgpu_kernel void @vector_read_bitcast_alloca(ptr addrspace(1) %out, i32 %index) {111entry:112 %tmp = alloca [4 x i32], addrspace(5)113 %y = getelementptr inbounds [4 x float], ptr addrspace(5) %tmp, i32 0, i32 1114 %z = getelementptr inbounds [4 x float], ptr addrspace(5) %tmp, i32 0, i32 2115 %w = getelementptr inbounds [4 x float], ptr addrspace(5) %tmp, i32 0, i32 3116 store float 0.0, ptr addrspace(5) %tmp117 store float 1.0, ptr addrspace(5) %y118 store float 2.0, ptr addrspace(5) %z119 store float 4.0, ptr addrspace(5) %w120 %tmp1 = getelementptr inbounds [4 x float], ptr addrspace(5) %tmp, i32 0, i32 %index121 %tmp2 = load float, ptr addrspace(5) %tmp1122 store float %tmp2, ptr addrspace(1) %out123 ret void124}125 126; The pointer arguments in local address space should not affect promotion to vector.127 128; OPT-LABEL: @vector_read_with_local_arg(129; OPT: %0 = extractelement <4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 %index130; OPT: store i32 %0, ptr addrspace(1) %out, align 4131define amdgpu_kernel void @vector_read_with_local_arg(ptr addrspace(3) %stopper, ptr addrspace(1) %out, i32 %index) {132entry:133 %tmp = alloca [4 x i32], addrspace(5)134 %y = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 1135 %z = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 2136 %w = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 3137 store i32 0, ptr addrspace(5) %tmp138 store i32 1, ptr addrspace(5) %y139 store i32 2, ptr addrspace(5) %z140 store i32 3, ptr addrspace(5) %w141 %tmp1 = getelementptr [4 x i32], ptr addrspace(5) %tmp, i32 0, i32 %index142 %tmp2 = load i32, ptr addrspace(5) %tmp1143 store i32 %tmp2, ptr addrspace(1) %out144 ret void145}146