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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn < %s | FileCheck %s3 4; Tests for a bug in SelectionDAG::UpdateNodeOperands exposed by VectorLegalizer5; where divergence information is not updated.6 7declare i32 @llvm.amdgcn.workitem.id.x()8 9define amdgpu_kernel void @spam(ptr addrspace(1) noalias %arg) {10; CHECK-LABEL: spam:11; CHECK: ; %bb.0:12; CHECK-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x913; CHECK-NEXT: v_lshlrev_b32_e32 v0, 3, v014; CHECK-NEXT: v_mov_b32_e32 v1, 015; CHECK-NEXT: s_mov_b32 s3, 0xf00016; CHECK-NEXT: s_mov_b32 s2, 017; CHECK-NEXT: v_mov_b32_e32 v2, 0x7ff8000018; CHECK-NEXT: s_waitcnt lgkmcnt(0)19; CHECK-NEXT: buffer_store_dwordx4 v[1:4], v[0:1], s[0:3], 0 addr64 offset:1620; CHECK-NEXT: s_waitcnt expcnt(0)21; CHECK-NEXT: v_mov_b32_e32 v3, v122; CHECK-NEXT: v_mov_b32_e32 v4, v123; CHECK-NEXT: buffer_store_dwordx4 v[1:4], v[0:1], s[0:3], 0 addr64 offset:4824; CHECK-NEXT: s_endpgm25 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()26 %tmp1 = zext i32 %tmp to i6427 %tmp2 = getelementptr inbounds double, ptr addrspace(1) %arg, i64 %tmp128 %tmp3 = load double, ptr addrspace(1) %tmp2, align 829 %tmp4 = fadd double 0x7FF8000000000000, 0.000000e+0030 %tmp5 = insertelement <2 x double> poison, double %tmp4, i64 031 %tmp6 = insertelement <2 x double> %tmp5, double %tmp3, i64 132 %tmp7 = insertelement <2 x double> %tmp6, double 0.000000e+00, i64 133 %tmp8 = fadd <2 x double> zeroinitializer, splat (double 0x7FF8000000000000)34 %tmp9 = fadd <2 x double> %tmp7, zeroinitializer35 %tmp10 = extractelement <2 x double> %tmp8, i64 036 %tmp11 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 237 store double %tmp10, ptr addrspace(1) %tmp11, align 838 %tmp12 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 339 store double poison, ptr addrspace(1) %tmp12, align 840 %tmp13 = extractelement <2 x double> %tmp9, i64 041 %tmp14 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 642 store double %tmp13, ptr addrspace(1) %tmp14, align 843 %tmp15 = getelementptr inbounds double, ptr addrspace(1) %tmp2, i64 744 store double 0.000000e+00, ptr addrspace(1) %tmp15, align 845 ret void46}47