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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx801 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s5; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx801 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s6; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG %s7; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefixes=GFX9,GFX9-GISEL %s8; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s9; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s10; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s11; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s12; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-TRUE16 %s13; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-FAKE16 %s14; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-TRUE16 %s15; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-FAKE16 %s16; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL,GFX12-GISEL-TRUE16 %s17; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL,GFX12-GISEL-FAKE16 %s18 19define half @test_vector_reduce_fmul_v2half(half %sp, <2 x half> %v) {20; GFX7-SDAG-LABEL: test_vector_reduce_fmul_v2half:21; GFX7-SDAG: ; %bb.0: ; %entry22; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)23; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v124; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v025; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v226; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v127; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v028; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v229; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v130; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v231; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]32;33; GFX7-GISEL-LABEL: test_vector_reduce_fmul_v2half:34; GFX7-GISEL: ; %bb.0: ; %entry35; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)36; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v037; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v138; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v139; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v040; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v241; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v042; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v143; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v044; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]45;46; GFX8-LABEL: test_vector_reduce_fmul_v2half:47; GFX8: ; %bb.0: ; %entry48; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)49; GFX8-NEXT: v_mul_f16_e32 v0, v0, v150; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_151; GFX8-NEXT: s_setpc_b64 s[30:31]52;53; GFX9-LABEL: test_vector_reduce_fmul_v2half:54; GFX9: ; %bb.0: ; %entry55; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX9-NEXT: v_mul_f16_e32 v0, v0, v157; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_158; GFX9-NEXT: s_setpc_b64 s[30:31]59;60; GFX10-LABEL: test_vector_reduce_fmul_v2half:61; GFX10: ; %bb.0: ; %entry62; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; GFX10-NEXT: v_mul_f16_e32 v0, v0, v164; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_165; GFX10-NEXT: s_setpc_b64 s[30:31]66;67; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v2half:68; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry69; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)70; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l71; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)72; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h73; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]74;75; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v2half:76; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry77; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)78; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v179; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v180; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)81; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v182; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]83;84; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v2half:85; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry86; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)87; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l88; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v189; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)90; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l91; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]92;93; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v2half:94; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry95; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)96; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v197; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v198; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)99; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1100; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]101;102; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v2half:103; GFX12-SDAG-TRUE16: ; %bb.0: ; %entry104; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0105; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0106; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0107; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0108; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0109; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l110; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)111; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h112; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]113;114; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v2half:115; GFX12-SDAG-FAKE16: ; %bb.0: ; %entry116; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0117; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0118; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0119; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0120; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0121; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1122; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1123; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)124; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1125; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]126;127; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v2half:128; GFX12-GISEL-TRUE16: ; %bb.0: ; %entry129; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0130; GFX12-GISEL-TRUE16-NEXT: s_wait_expcnt 0x0131; GFX12-GISEL-TRUE16-NEXT: s_wait_samplecnt 0x0132; GFX12-GISEL-TRUE16-NEXT: s_wait_bvhcnt 0x0133; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0134; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l135; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1136; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)137; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l138; GFX12-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]139;140; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v2half:141; GFX12-GISEL-FAKE16: ; %bb.0: ; %entry142; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0143; GFX12-GISEL-FAKE16-NEXT: s_wait_expcnt 0x0144; GFX12-GISEL-FAKE16-NEXT: s_wait_samplecnt 0x0145; GFX12-GISEL-FAKE16-NEXT: s_wait_bvhcnt 0x0146; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0147; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1148; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1149; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)150; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1151; GFX12-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]152entry:153 %res = call half @llvm.vector.reduce.fmul.v2half(half %sp, <2 x half> %v)154 ret half %res155}156 157define half @test_vector_reduce_fmul_v3half(half %sp, <3 x half> %v) {158; GFX7-SDAG-LABEL: test_vector_reduce_fmul_v3half:159; GFX7-SDAG: ; %bb.0: ; %entry160; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)161; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1162; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0163; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2164; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3165; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1166; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0167; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2168; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3169; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1170; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2171; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v3172; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]173;174; GFX7-GISEL-LABEL: test_vector_reduce_fmul_v3half:175; GFX7-GISEL: ; %bb.0: ; %entry176; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)177; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0178; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1179; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1180; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0181; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v2182; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0183; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1184; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0185; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v3186; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0187; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1188; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0189; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]190;191; GFX8-LABEL: test_vector_reduce_fmul_v3half:192; GFX8: ; %bb.0: ; %entry193; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)194; GFX8-NEXT: v_mul_f16_e32 v0, v0, v1195; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1196; GFX8-NEXT: v_mul_f16_e32 v0, v0, v2197; GFX8-NEXT: s_setpc_b64 s[30:31]198;199; GFX9-LABEL: test_vector_reduce_fmul_v3half:200; GFX9: ; %bb.0: ; %entry201; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)202; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1203; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1204; GFX9-NEXT: v_mul_f16_e32 v0, v0, v2205; GFX9-NEXT: s_setpc_b64 s[30:31]206;207; GFX10-LABEL: test_vector_reduce_fmul_v3half:208; GFX10: ; %bb.0: ; %entry209; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)210; GFX10-NEXT: v_mul_f16_e32 v0, v0, v1211; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1212; GFX10-NEXT: v_mul_f16_e32 v0, v0, v2213; GFX10-NEXT: s_setpc_b64 s[30:31]214;215; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v3half:216; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry217; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)218; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l219; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)220; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h221; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l222; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]223;224; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v3half:225; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry226; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)227; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1228; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1229; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)230; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1231; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2232; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]233;234; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v3half:235; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry236; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)237; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l238; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)239; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h240; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l241; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]242;243; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v3half:244; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry245; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)246; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1247; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1248; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)249; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v3250; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2251; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]252;253; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v3half:254; GFX12-SDAG-TRUE16: ; %bb.0: ; %entry255; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0256; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0257; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0258; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0259; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0260; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l261; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)262; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h263; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l264; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]265;266; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v3half:267; GFX12-SDAG-FAKE16: ; %bb.0: ; %entry268; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0269; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0270; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0271; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0272; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0273; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1274; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1275; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)276; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1277; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2278; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]279;280; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v3half:281; GFX12-GISEL-TRUE16: ; %bb.0: ; %entry282; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0283; GFX12-GISEL-TRUE16-NEXT: s_wait_expcnt 0x0284; GFX12-GISEL-TRUE16-NEXT: s_wait_samplecnt 0x0285; GFX12-GISEL-TRUE16-NEXT: s_wait_bvhcnt 0x0286; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0287; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l288; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)289; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h290; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l291; GFX12-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]292;293; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v3half:294; GFX12-GISEL-FAKE16: ; %bb.0: ; %entry295; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0296; GFX12-GISEL-FAKE16-NEXT: s_wait_expcnt 0x0297; GFX12-GISEL-FAKE16-NEXT: s_wait_samplecnt 0x0298; GFX12-GISEL-FAKE16-NEXT: s_wait_bvhcnt 0x0299; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0300; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1301; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1302; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)303; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v3304; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2305; GFX12-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]306entry:307 %res = call half @llvm.vector.reduce.fmul.v3half(half %sp, <3 x half> %v)308 ret half %res309}310 311define half @test_vector_reduce_fmul_v4half(half %sp, <4 x half> %v) {312; GFX7-SDAG-LABEL: test_vector_reduce_fmul_v4half:313; GFX7-SDAG: ; %bb.0: ; %entry314; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)315; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1316; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0317; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2318; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3319; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4320; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1321; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0322; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2323; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3324; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4325; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1326; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2327; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v3328; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v4329; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]330;331; GFX7-GISEL-LABEL: test_vector_reduce_fmul_v4half:332; GFX7-GISEL: ; %bb.0: ; %entry333; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)334; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0335; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1336; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1337; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0338; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v2339; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0340; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1341; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0342; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v3343; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0344; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1345; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0346; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v4347; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0348; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1349; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0350; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]351;352; GFX8-LABEL: test_vector_reduce_fmul_v4half:353; GFX8: ; %bb.0: ; %entry354; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)355; GFX8-NEXT: v_mul_f16_e32 v0, v0, v1356; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1357; GFX8-NEXT: v_mul_f16_e32 v0, v0, v2358; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1359; GFX8-NEXT: s_setpc_b64 s[30:31]360;361; GFX9-LABEL: test_vector_reduce_fmul_v4half:362; GFX9: ; %bb.0: ; %entry363; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)364; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1365; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1366; GFX9-NEXT: v_mul_f16_e32 v0, v0, v2367; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1368; GFX9-NEXT: s_setpc_b64 s[30:31]369;370; GFX10-LABEL: test_vector_reduce_fmul_v4half:371; GFX10: ; %bb.0: ; %entry372; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)373; GFX10-NEXT: v_mul_f16_e32 v0, v0, v1374; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1375; GFX10-NEXT: v_mul_f16_e32 v0, v0, v2376; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1377; GFX10-NEXT: s_setpc_b64 s[30:31]378;379; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v4half:380; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry381; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)382; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l383; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)384; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h385; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l386; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)387; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.h388; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]389;390; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v4half:391; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry392; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)393; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1394; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1395; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)396; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1397; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2398; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2399; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)400; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1401; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]402;403; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v4half:404; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry405; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)406; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l407; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1408; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)409; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l410; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2411; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l412; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)413; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l414; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]415;416; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v4half:417; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry418; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)419; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1420; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1421; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)422; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1423; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2424; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2425; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)426; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1427; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]428;429; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v4half:430; GFX12-SDAG-TRUE16: ; %bb.0: ; %entry431; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0432; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0433; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0434; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0435; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0436; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l437; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)438; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h439; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l440; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)441; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.h442; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]443;444; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v4half:445; GFX12-SDAG-FAKE16: ; %bb.0: ; %entry446; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0447; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0448; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0449; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0450; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0451; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1452; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1453; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)454; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1455; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2456; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2457; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)458; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1459; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]460;461; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v4half:462; GFX12-GISEL-TRUE16: ; %bb.0: ; %entry463; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0464; GFX12-GISEL-TRUE16-NEXT: s_wait_expcnt 0x0465; GFX12-GISEL-TRUE16-NEXT: s_wait_samplecnt 0x0466; GFX12-GISEL-TRUE16-NEXT: s_wait_bvhcnt 0x0467; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0468; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l469; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1470; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)471; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l472; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2473; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l474; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)475; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l476; GFX12-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]477;478; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v4half:479; GFX12-GISEL-FAKE16: ; %bb.0: ; %entry480; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0481; GFX12-GISEL-FAKE16-NEXT: s_wait_expcnt 0x0482; GFX12-GISEL-FAKE16-NEXT: s_wait_samplecnt 0x0483; GFX12-GISEL-FAKE16-NEXT: s_wait_bvhcnt 0x0484; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0485; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1486; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1487; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)488; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1489; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2490; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2491; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)492; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1493; GFX12-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]494entry:495 %res = call half @llvm.vector.reduce.fmul.v4half(half %sp, <4 x half> %v)496 ret half %res497}498 499define half @test_vector_reduce_fmul_v8half(half %sp, <8 x half> %v) {500; GFX7-SDAG-LABEL: test_vector_reduce_fmul_v8half:501; GFX7-SDAG: ; %bb.0: ; %entry502; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)503; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1504; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0505; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2506; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3507; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4508; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5509; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1510; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0511; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6512; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2513; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7514; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3515; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8516; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4517; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5518; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1519; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6520; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2521; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7522; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v3523; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8524; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v4525; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v5526; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v6527; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v7528; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v8529; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]530;531; GFX7-GISEL-LABEL: test_vector_reduce_fmul_v8half:532; GFX7-GISEL: ; %bb.0: ; %entry533; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)534; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0535; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1536; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1537; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0538; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v2539; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0540; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1541; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0542; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v3543; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0544; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1545; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0546; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v4547; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0548; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1549; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0550; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v5551; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0552; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1553; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0554; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v6555; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0556; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1557; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0558; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v7559; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0560; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1561; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0562; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v8563; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0564; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1565; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0566; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]567;568; GFX8-LABEL: test_vector_reduce_fmul_v8half:569; GFX8: ; %bb.0: ; %entry570; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)571; GFX8-NEXT: v_mul_f16_e32 v0, v0, v1572; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1573; GFX8-NEXT: v_mul_f16_e32 v0, v0, v2574; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1575; GFX8-NEXT: v_mul_f16_e32 v0, v0, v3576; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1577; GFX8-NEXT: v_mul_f16_e32 v0, v0, v4578; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1579; GFX8-NEXT: s_setpc_b64 s[30:31]580;581; GFX9-LABEL: test_vector_reduce_fmul_v8half:582; GFX9: ; %bb.0: ; %entry583; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)584; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1585; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1586; GFX9-NEXT: v_mul_f16_e32 v0, v0, v2587; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1588; GFX9-NEXT: v_mul_f16_e32 v0, v0, v3589; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1590; GFX9-NEXT: v_mul_f16_e32 v0, v0, v4591; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1592; GFX9-NEXT: s_setpc_b64 s[30:31]593;594; GFX10-LABEL: test_vector_reduce_fmul_v8half:595; GFX10: ; %bb.0: ; %entry596; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; GFX10-NEXT: v_mul_f16_e32 v0, v0, v1598; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1599; GFX10-NEXT: v_mul_f16_e32 v0, v0, v2600; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1601; GFX10-NEXT: v_mul_f16_e32 v0, v0, v3602; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1603; GFX10-NEXT: v_mul_f16_e32 v0, v0, v4604; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1605; GFX10-NEXT: s_setpc_b64 s[30:31]606;607; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v8half:608; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry609; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)610; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l611; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)612; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h613; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l614; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)615; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.h616; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l617; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)618; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.h619; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l620; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)621; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.h622; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]623;624; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v8half:625; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry626; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)627; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1628; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1629; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)630; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1631; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2632; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2633; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)634; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1635; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3636; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v3637; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)638; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1639; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4640; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v4641; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)642; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1643; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]644;645; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v8half:646; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry647; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)648; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l649; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1650; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)651; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l652; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2653; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l654; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)655; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l656; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3657; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l658; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)659; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l660; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4661; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l662; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)663; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l664; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]665;666; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v8half:667; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry668; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)669; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1670; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1671; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)672; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1673; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2674; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2675; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)676; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1677; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3678; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v3679; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)680; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1681; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4682; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v4683; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)684; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1685; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]686;687; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v8half:688; GFX12-SDAG-TRUE16: ; %bb.0: ; %entry689; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0690; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x0691; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x0692; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x0693; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x0694; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l695; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)696; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h697; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l698; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)699; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.h700; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l701; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)702; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.h703; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l704; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)705; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.h706; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]707;708; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v8half:709; GFX12-SDAG-FAKE16: ; %bb.0: ; %entry710; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0711; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x0712; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x0713; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x0714; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x0715; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1716; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1717; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)718; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1719; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2720; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2721; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)722; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1723; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3724; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v3725; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)726; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1727; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4728; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v4729; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)730; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1731; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]732;733; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v8half:734; GFX12-GISEL-TRUE16: ; %bb.0: ; %entry735; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0736; GFX12-GISEL-TRUE16-NEXT: s_wait_expcnt 0x0737; GFX12-GISEL-TRUE16-NEXT: s_wait_samplecnt 0x0738; GFX12-GISEL-TRUE16-NEXT: s_wait_bvhcnt 0x0739; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x0740; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l741; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1742; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)743; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l744; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2745; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l746; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)747; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l748; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3749; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l750; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)751; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l752; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4753; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l754; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)755; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l756; GFX12-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]757;758; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v8half:759; GFX12-GISEL-FAKE16: ; %bb.0: ; %entry760; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0761; GFX12-GISEL-FAKE16-NEXT: s_wait_expcnt 0x0762; GFX12-GISEL-FAKE16-NEXT: s_wait_samplecnt 0x0763; GFX12-GISEL-FAKE16-NEXT: s_wait_bvhcnt 0x0764; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x0765; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1766; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1767; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)768; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1769; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2770; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v2771; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)772; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1773; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3774; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v3775; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)776; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1777; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4778; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v4779; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)780; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1781; GFX12-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]782entry:783 %res = call half @llvm.vector.reduce.fmul.v8half(half %sp, <8 x half> %v)784 ret half %res785}786 787define half @test_vector_reduce_fmul_v16half(half %sp, <16 x half> %v) {788; GFX7-SDAG-LABEL: test_vector_reduce_fmul_v16half:789; GFX7-SDAG: ; %bb.0: ; %entry790; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)791; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1792; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0793; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v2, v2794; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v3, v3795; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v4, v4796; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v5, v5797; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1798; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0799; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v6, v6800; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v2801; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v7, v7802; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v3803; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v8, v8804; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v4, v4805; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v9, v9806; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v5, v5807; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1808; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v10, v10809; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v6, v6810; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2811; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v11, v11812; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v7, v7813; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v3814; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v12, v12815; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v8, v8816; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v4817; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v13, v13818; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v9, v9819; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v5820; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v14, v14821; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v10, v10822; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v6823; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v15, v15824; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v11, v11825; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v7826; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v16, v16827; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v12, v12828; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v8829; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v13, v13830; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v9831; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v14, v14832; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v10833; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v15, v15834; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v11835; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v16, v16836; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v12837; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v13838; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v14839; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v15840; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v16841; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]842;843; GFX7-GISEL-LABEL: test_vector_reduce_fmul_v16half:844; GFX7-GISEL: ; %bb.0: ; %entry845; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)846; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0847; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1848; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1849; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0850; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v2851; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0852; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1853; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0854; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v3855; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0856; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1857; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0858; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v4859; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0860; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1861; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0862; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v5863; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0864; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1865; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0866; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v6867; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0868; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1869; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0870; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v7871; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0872; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1873; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0874; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v8875; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0876; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1877; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0878; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v9879; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0880; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1881; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0882; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v10883; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0884; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1885; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0886; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v11887; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0888; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1889; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0890; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v12891; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0892; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1893; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0894; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v13895; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0896; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1897; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0898; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v14899; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0900; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1901; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0902; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v15903; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0904; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1905; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0906; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v16907; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0908; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1909; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0910; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]911;912; GFX8-LABEL: test_vector_reduce_fmul_v16half:913; GFX8: ; %bb.0: ; %entry914; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)915; GFX8-NEXT: v_mul_f16_e32 v0, v0, v1916; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1917; GFX8-NEXT: v_mul_f16_e32 v0, v0, v2918; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1919; GFX8-NEXT: v_mul_f16_e32 v0, v0, v3920; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1921; GFX8-NEXT: v_mul_f16_e32 v0, v0, v4922; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1923; GFX8-NEXT: v_mul_f16_e32 v0, v0, v5924; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1925; GFX8-NEXT: v_mul_f16_e32 v0, v0, v6926; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1927; GFX8-NEXT: v_mul_f16_e32 v0, v0, v7928; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1929; GFX8-NEXT: v_mul_f16_e32 v0, v0, v8930; GFX8-NEXT: v_mul_f16_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1931; GFX8-NEXT: s_setpc_b64 s[30:31]932;933; GFX9-LABEL: test_vector_reduce_fmul_v16half:934; GFX9: ; %bb.0: ; %entry935; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)936; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1937; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1938; GFX9-NEXT: v_mul_f16_e32 v0, v0, v2939; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1940; GFX9-NEXT: v_mul_f16_e32 v0, v0, v3941; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1942; GFX9-NEXT: v_mul_f16_e32 v0, v0, v4943; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1944; GFX9-NEXT: v_mul_f16_e32 v0, v0, v5945; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1946; GFX9-NEXT: v_mul_f16_e32 v0, v0, v6947; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1948; GFX9-NEXT: v_mul_f16_e32 v0, v0, v7949; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1950; GFX9-NEXT: v_mul_f16_e32 v0, v0, v8951; GFX9-NEXT: v_mul_f16_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1952; GFX9-NEXT: s_setpc_b64 s[30:31]953;954; GFX10-LABEL: test_vector_reduce_fmul_v16half:955; GFX10: ; %bb.0: ; %entry956; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)957; GFX10-NEXT: v_mul_f16_e32 v0, v0, v1958; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1959; GFX10-NEXT: v_mul_f16_e32 v0, v0, v2960; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1961; GFX10-NEXT: v_mul_f16_e32 v0, v0, v3962; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1963; GFX10-NEXT: v_mul_f16_e32 v0, v0, v4964; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1965; GFX10-NEXT: v_mul_f16_e32 v0, v0, v5966; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1967; GFX10-NEXT: v_mul_f16_e32 v0, v0, v6968; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1969; GFX10-NEXT: v_mul_f16_e32 v0, v0, v7970; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1971; GFX10-NEXT: v_mul_f16_e32 v0, v0, v8972; GFX10-NEXT: v_mul_f16_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1973; GFX10-NEXT: s_setpc_b64 s[30:31]974;975; GFX11-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v16half:976; GFX11-SDAG-TRUE16: ; %bb.0: ; %entry977; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)978; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l979; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)980; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h981; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l982; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)983; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.h984; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l985; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)986; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.h987; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l988; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)989; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.h990; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v5.l991; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)992; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v5.h993; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v6.l994; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)995; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v6.h996; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v7.l997; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)998; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v7.h999; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v8.l1000; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1001; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v8.h1002; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1003;1004; GFX11-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v16half:1005; GFX11-SDAG-FAKE16: ; %bb.0: ; %entry1006; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1007; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11008; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11009; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1010; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11011; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v21012; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v21013; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1014; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11015; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v31016; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v31017; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1018; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11019; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v41020; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v41021; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1022; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11023; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v51024; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v51025; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1026; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11027; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v61028; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v61029; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1030; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11031; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v71032; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v71033; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1034; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11035; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v81036; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v81037; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1038; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11039; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1040;1041; GFX11-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v16half:1042; GFX11-GISEL-TRUE16: ; %bb.0: ; %entry1043; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1044; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1045; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11046; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1047; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1048; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v21049; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l1050; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1051; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1052; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v31053; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l1054; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1055; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1056; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v41057; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l1058; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1059; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1060; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v51061; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v5.l1062; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1063; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1064; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v61065; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v6.l1066; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1067; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1068; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v71069; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v7.l1070; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1071; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1072; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v81073; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v8.l1074; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1075; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1076; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]1077;1078; GFX11-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v16half:1079; GFX11-GISEL-FAKE16: ; %bb.0: ; %entry1080; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1081; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11082; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11083; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1084; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11085; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v21086; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v21087; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1088; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11089; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v31090; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v31091; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1092; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11093; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v41094; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v41095; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1096; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11097; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v51098; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v51099; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1100; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11101; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v61102; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v61103; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1104; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11105; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v71106; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v71107; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1108; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11109; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v81110; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v81111; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1112; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11113; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]1114;1115; GFX12-SDAG-TRUE16-LABEL: test_vector_reduce_fmul_v16half:1116; GFX12-SDAG-TRUE16: ; %bb.0: ; %entry1117; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01118; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x01119; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x01120; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x01121; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x01122; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1123; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1124; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.h1125; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l1126; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1127; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.h1128; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l1129; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1130; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.h1131; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l1132; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1133; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.h1134; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v5.l1135; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1136; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v5.h1137; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v6.l1138; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1139; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v6.h1140; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v7.l1141; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1142; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v7.h1143; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v8.l1144; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1145; GFX12-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v8.h1146; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1147;1148; GFX12-SDAG-FAKE16-LABEL: test_vector_reduce_fmul_v16half:1149; GFX12-SDAG-FAKE16: ; %bb.0: ; %entry1150; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01151; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x01152; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x01153; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x01154; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x01155; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11156; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11157; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1158; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11159; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v21160; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v21161; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1162; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11163; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v31164; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v31165; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1166; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11167; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v41168; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v41169; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1170; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11171; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v51172; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v51173; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1174; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11175; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v61176; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v61177; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1178; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11179; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v71180; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v71181; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1182; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11183; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v81184; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v81185; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1186; GFX12-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11187; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1188;1189; GFX12-GISEL-TRUE16-LABEL: test_vector_reduce_fmul_v16half:1190; GFX12-GISEL-TRUE16: ; %bb.0: ; %entry1191; GFX12-GISEL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01192; GFX12-GISEL-TRUE16-NEXT: s_wait_expcnt 0x01193; GFX12-GISEL-TRUE16-NEXT: s_wait_samplecnt 0x01194; GFX12-GISEL-TRUE16-NEXT: s_wait_bvhcnt 0x01195; GFX12-GISEL-TRUE16-NEXT: s_wait_kmcnt 0x01196; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1197; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11198; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1199; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1200; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v21201; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l1202; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1203; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1204; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v31205; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v3.l1206; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1207; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1208; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v41209; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v4.l1210; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1211; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1212; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v51213; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v5.l1214; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1215; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1216; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v61217; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v6.l1218; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1219; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1220; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v71221; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v7.l1222; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1223; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1224; GFX12-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v81225; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v8.l1226; GFX12-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1227; GFX12-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l1228; GFX12-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]1229;1230; GFX12-GISEL-FAKE16-LABEL: test_vector_reduce_fmul_v16half:1231; GFX12-GISEL-FAKE16: ; %bb.0: ; %entry1232; GFX12-GISEL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01233; GFX12-GISEL-FAKE16-NEXT: s_wait_expcnt 0x01234; GFX12-GISEL-FAKE16-NEXT: s_wait_samplecnt 0x01235; GFX12-GISEL-FAKE16-NEXT: s_wait_bvhcnt 0x01236; GFX12-GISEL-FAKE16-NEXT: s_wait_kmcnt 0x01237; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11238; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v11239; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1240; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11241; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v21242; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v21243; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1244; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11245; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v31246; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v31247; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1248; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11249; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v41250; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v41251; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1252; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11253; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v51254; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v51255; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1256; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11257; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v61258; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v61259; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1260; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11261; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v71262; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v71263; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1264; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11265; GFX12-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v81266; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v81267; GFX12-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1268; GFX12-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v11269; GFX12-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]1270entry:1271 %res = call half @llvm.vector.reduce.fmul.v16half(half %sp, <16 x half> %v)1272 ret half %res1273}1274 1275define float @test_vector_reduce_fmul_v2float(float %sp, <2 x float> %v) {1276; GFX7-LABEL: test_vector_reduce_fmul_v2float:1277; GFX7: ; %bb.0: ; %entry1278; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1279; GFX7-NEXT: v_mul_f32_e32 v0, v0, v11280; GFX7-NEXT: v_mul_f32_e32 v0, v0, v21281; GFX7-NEXT: s_setpc_b64 s[30:31]1282;1283; GFX8-LABEL: test_vector_reduce_fmul_v2float:1284; GFX8: ; %bb.0: ; %entry1285; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1286; GFX8-NEXT: v_mul_f32_e32 v0, v0, v11287; GFX8-NEXT: v_mul_f32_e32 v0, v0, v21288; GFX8-NEXT: s_setpc_b64 s[30:31]1289;1290; GFX9-LABEL: test_vector_reduce_fmul_v2float:1291; GFX9: ; %bb.0: ; %entry1292; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1293; GFX9-NEXT: v_mul_f32_e32 v0, v0, v11294; GFX9-NEXT: v_mul_f32_e32 v0, v0, v21295; GFX9-NEXT: s_setpc_b64 s[30:31]1296;1297; GFX10-LABEL: test_vector_reduce_fmul_v2float:1298; GFX10: ; %bb.0: ; %entry1299; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1300; GFX10-NEXT: v_mul_f32_e32 v0, v0, v11301; GFX10-NEXT: v_mul_f32_e32 v0, v0, v21302; GFX10-NEXT: s_setpc_b64 s[30:31]1303;1304; GFX11-LABEL: test_vector_reduce_fmul_v2float:1305; GFX11: ; %bb.0: ; %entry1306; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1307; GFX11-NEXT: v_mul_f32_e32 v0, v0, v11308; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1309; GFX11-NEXT: v_mul_f32_e32 v0, v0, v21310; GFX11-NEXT: s_setpc_b64 s[30:31]1311;1312; GFX12-LABEL: test_vector_reduce_fmul_v2float:1313; GFX12: ; %bb.0: ; %entry1314; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01315; GFX12-NEXT: s_wait_expcnt 0x01316; GFX12-NEXT: s_wait_samplecnt 0x01317; GFX12-NEXT: s_wait_bvhcnt 0x01318; GFX12-NEXT: s_wait_kmcnt 0x01319; GFX12-NEXT: v_mul_f32_e32 v0, v0, v11320; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1321; GFX12-NEXT: v_mul_f32_e32 v0, v0, v21322; GFX12-NEXT: s_setpc_b64 s[30:31]1323entry:1324 %res = call float @llvm.vector.reduce.fmul.v2float(float %sp, <2 x float> %v)1325 ret float %res1326}1327 1328define float @test_vector_reduce_fmul_v3float(float %sp, <3 x float> %v) {1329; GFX7-LABEL: test_vector_reduce_fmul_v3float:1330; GFX7: ; %bb.0: ; %entry1331; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1332; GFX7-NEXT: v_mul_f32_e32 v0, v0, v11333; GFX7-NEXT: v_mul_f32_e32 v0, v0, v21334; GFX7-NEXT: v_mul_f32_e32 v0, v0, v31335; GFX7-NEXT: s_setpc_b64 s[30:31]1336;1337; GFX8-LABEL: test_vector_reduce_fmul_v3float:1338; GFX8: ; %bb.0: ; %entry1339; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1340; GFX8-NEXT: v_mul_f32_e32 v0, v0, v11341; GFX8-NEXT: v_mul_f32_e32 v0, v0, v21342; GFX8-NEXT: v_mul_f32_e32 v0, v0, v31343; GFX8-NEXT: s_setpc_b64 s[30:31]1344;1345; GFX9-LABEL: test_vector_reduce_fmul_v3float:1346; GFX9: ; %bb.0: ; %entry1347; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1348; GFX9-NEXT: v_mul_f32_e32 v0, v0, v11349; GFX9-NEXT: v_mul_f32_e32 v0, v0, v21350; GFX9-NEXT: v_mul_f32_e32 v0, v0, v31351; GFX9-NEXT: s_setpc_b64 s[30:31]1352;1353; GFX10-LABEL: test_vector_reduce_fmul_v3float:1354; GFX10: ; %bb.0: ; %entry1355; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1356; GFX10-NEXT: v_mul_f32_e32 v0, v0, v11357; GFX10-NEXT: v_mul_f32_e32 v0, v0, v21358; GFX10-NEXT: v_mul_f32_e32 v0, v0, v31359; GFX10-NEXT: s_setpc_b64 s[30:31]1360;1361; GFX11-LABEL: test_vector_reduce_fmul_v3float:1362; GFX11: ; %bb.0: ; %entry1363; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1364; GFX11-NEXT: v_mul_f32_e32 v0, v0, v11365; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1366; GFX11-NEXT: v_mul_f32_e32 v0, v0, v21367; GFX11-NEXT: v_mul_f32_e32 v0, v0, v31368; GFX11-NEXT: s_setpc_b64 s[30:31]1369;1370; GFX12-LABEL: test_vector_reduce_fmul_v3float:1371; GFX12: ; %bb.0: ; %entry1372; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01373; GFX12-NEXT: s_wait_expcnt 0x01374; GFX12-NEXT: s_wait_samplecnt 0x01375; GFX12-NEXT: s_wait_bvhcnt 0x01376; GFX12-NEXT: s_wait_kmcnt 0x01377; GFX12-NEXT: v_mul_f32_e32 v0, v0, v11378; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1379; GFX12-NEXT: v_mul_f32_e32 v0, v0, v21380; GFX12-NEXT: v_mul_f32_e32 v0, v0, v31381; GFX12-NEXT: s_setpc_b64 s[30:31]1382entry:1383 %res = call float @llvm.vector.reduce.fmul.v3float(float %sp, <3 x float> %v)1384 ret float %res1385}1386 1387define float @test_vector_reduce_fmul_v4float(float %sp, <4 x float> %v) {1388; GFX7-LABEL: test_vector_reduce_fmul_v4float:1389; GFX7: ; %bb.0: ; %entry1390; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1391; GFX7-NEXT: v_mul_f32_e32 v0, v0, v11392; GFX7-NEXT: v_mul_f32_e32 v0, v0, v21393; GFX7-NEXT: v_mul_f32_e32 v0, v0, v31394; GFX7-NEXT: v_mul_f32_e32 v0, v0, v41395; GFX7-NEXT: s_setpc_b64 s[30:31]1396;1397; GFX8-LABEL: test_vector_reduce_fmul_v4float:1398; GFX8: ; %bb.0: ; %entry1399; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1400; GFX8-NEXT: v_mul_f32_e32 v0, v0, v11401; GFX8-NEXT: v_mul_f32_e32 v0, v0, v21402; GFX8-NEXT: v_mul_f32_e32 v0, v0, v31403; GFX8-NEXT: v_mul_f32_e32 v0, v0, v41404; GFX8-NEXT: s_setpc_b64 s[30:31]1405;1406; GFX9-LABEL: test_vector_reduce_fmul_v4float:1407; GFX9: ; %bb.0: ; %entry1408; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1409; GFX9-NEXT: v_mul_f32_e32 v0, v0, v11410; GFX9-NEXT: v_mul_f32_e32 v0, v0, v21411; GFX9-NEXT: v_mul_f32_e32 v0, v0, v31412; GFX9-NEXT: v_mul_f32_e32 v0, v0, v41413; GFX9-NEXT: s_setpc_b64 s[30:31]1414;1415; GFX10-LABEL: test_vector_reduce_fmul_v4float:1416; GFX10: ; %bb.0: ; %entry1417; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1418; GFX10-NEXT: v_mul_f32_e32 v0, v0, v11419; GFX10-NEXT: v_mul_f32_e32 v0, v0, v21420; GFX10-NEXT: v_mul_f32_e32 v0, v0, v31421; GFX10-NEXT: v_mul_f32_e32 v0, v0, v41422; GFX10-NEXT: s_setpc_b64 s[30:31]1423;1424; GFX11-LABEL: test_vector_reduce_fmul_v4float:1425; GFX11: ; %bb.0: ; %entry1426; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1427; GFX11-NEXT: v_mul_f32_e32 v0, v0, v11428; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1429; GFX11-NEXT: v_mul_f32_e32 v0, v0, v21430; GFX11-NEXT: v_mul_f32_e32 v0, v0, v31431; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1432; GFX11-NEXT: v_mul_f32_e32 v0, v0, v41433; GFX11-NEXT: s_setpc_b64 s[30:31]1434;1435; GFX12-LABEL: test_vector_reduce_fmul_v4float:1436; GFX12: ; %bb.0: ; %entry1437; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01438; GFX12-NEXT: s_wait_expcnt 0x01439; GFX12-NEXT: s_wait_samplecnt 0x01440; GFX12-NEXT: s_wait_bvhcnt 0x01441; GFX12-NEXT: s_wait_kmcnt 0x01442; GFX12-NEXT: v_mul_f32_e32 v0, v0, v11443; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1444; GFX12-NEXT: v_mul_f32_e32 v0, v0, v21445; GFX12-NEXT: v_mul_f32_e32 v0, v0, v31446; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1447; GFX12-NEXT: v_mul_f32_e32 v0, v0, v41448; GFX12-NEXT: s_setpc_b64 s[30:31]1449entry:1450 %res = call float @llvm.vector.reduce.fmul.v4float(float %sp, <4 x float> %v)1451 ret float %res1452}1453 1454define float @test_vector_reduce_fmul_v8float(float %sp, <8 x float> %v) {1455; GFX7-LABEL: test_vector_reduce_fmul_v8float:1456; GFX7: ; %bb.0: ; %entry1457; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1458; GFX7-NEXT: v_mul_f32_e32 v0, v0, v11459; GFX7-NEXT: v_mul_f32_e32 v0, v0, v21460; GFX7-NEXT: v_mul_f32_e32 v0, v0, v31461; GFX7-NEXT: v_mul_f32_e32 v0, v0, v41462; GFX7-NEXT: v_mul_f32_e32 v0, v0, v51463; GFX7-NEXT: v_mul_f32_e32 v0, v0, v61464; GFX7-NEXT: v_mul_f32_e32 v0, v0, v71465; GFX7-NEXT: v_mul_f32_e32 v0, v0, v81466; GFX7-NEXT: s_setpc_b64 s[30:31]1467;1468; GFX8-LABEL: test_vector_reduce_fmul_v8float:1469; GFX8: ; %bb.0: ; %entry1470; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1471; GFX8-NEXT: v_mul_f32_e32 v0, v0, v11472; GFX8-NEXT: v_mul_f32_e32 v0, v0, v21473; GFX8-NEXT: v_mul_f32_e32 v0, v0, v31474; GFX8-NEXT: v_mul_f32_e32 v0, v0, v41475; GFX8-NEXT: v_mul_f32_e32 v0, v0, v51476; GFX8-NEXT: v_mul_f32_e32 v0, v0, v61477; GFX8-NEXT: v_mul_f32_e32 v0, v0, v71478; GFX8-NEXT: v_mul_f32_e32 v0, v0, v81479; GFX8-NEXT: s_setpc_b64 s[30:31]1480;1481; GFX9-LABEL: test_vector_reduce_fmul_v8float:1482; GFX9: ; %bb.0: ; %entry1483; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1484; GFX9-NEXT: v_mul_f32_e32 v0, v0, v11485; GFX9-NEXT: v_mul_f32_e32 v0, v0, v21486; GFX9-NEXT: v_mul_f32_e32 v0, v0, v31487; GFX9-NEXT: v_mul_f32_e32 v0, v0, v41488; GFX9-NEXT: v_mul_f32_e32 v0, v0, v51489; GFX9-NEXT: v_mul_f32_e32 v0, v0, v61490; GFX9-NEXT: v_mul_f32_e32 v0, v0, v71491; GFX9-NEXT: v_mul_f32_e32 v0, v0, v81492; GFX9-NEXT: s_setpc_b64 s[30:31]1493;1494; GFX10-LABEL: test_vector_reduce_fmul_v8float:1495; GFX10: ; %bb.0: ; %entry1496; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1497; GFX10-NEXT: v_mul_f32_e32 v0, v0, v11498; GFX10-NEXT: v_mul_f32_e32 v0, v0, v21499; GFX10-NEXT: v_mul_f32_e32 v0, v0, v31500; GFX10-NEXT: v_mul_f32_e32 v0, v0, v41501; GFX10-NEXT: v_mul_f32_e32 v0, v0, v51502; GFX10-NEXT: v_mul_f32_e32 v0, v0, v61503; GFX10-NEXT: v_mul_f32_e32 v0, v0, v71504; GFX10-NEXT: v_mul_f32_e32 v0, v0, v81505; GFX10-NEXT: s_setpc_b64 s[30:31]1506;1507; GFX11-LABEL: test_vector_reduce_fmul_v8float:1508; GFX11: ; %bb.0: ; %entry1509; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1510; GFX11-NEXT: v_mul_f32_e32 v0, v0, v11511; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1512; GFX11-NEXT: v_mul_f32_e32 v0, v0, v21513; GFX11-NEXT: v_mul_f32_e32 v0, v0, v31514; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1515; GFX11-NEXT: v_mul_f32_e32 v0, v0, v41516; GFX11-NEXT: v_mul_f32_e32 v0, v0, v51517; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1518; GFX11-NEXT: v_mul_f32_e32 v0, v0, v61519; GFX11-NEXT: v_mul_f32_e32 v0, v0, v71520; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1521; GFX11-NEXT: v_mul_f32_e32 v0, v0, v81522; GFX11-NEXT: s_setpc_b64 s[30:31]1523;1524; GFX12-LABEL: test_vector_reduce_fmul_v8float:1525; GFX12: ; %bb.0: ; %entry1526; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01527; GFX12-NEXT: s_wait_expcnt 0x01528; GFX12-NEXT: s_wait_samplecnt 0x01529; GFX12-NEXT: s_wait_bvhcnt 0x01530; GFX12-NEXT: s_wait_kmcnt 0x01531; GFX12-NEXT: v_mul_f32_e32 v0, v0, v11532; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1533; GFX12-NEXT: v_mul_f32_e32 v0, v0, v21534; GFX12-NEXT: v_mul_f32_e32 v0, v0, v31535; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1536; GFX12-NEXT: v_mul_f32_e32 v0, v0, v41537; GFX12-NEXT: v_mul_f32_e32 v0, v0, v51538; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1539; GFX12-NEXT: v_mul_f32_e32 v0, v0, v61540; GFX12-NEXT: v_mul_f32_e32 v0, v0, v71541; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1542; GFX12-NEXT: v_mul_f32_e32 v0, v0, v81543; GFX12-NEXT: s_setpc_b64 s[30:31]1544entry:1545 %res = call float @llvm.vector.reduce.fmul.v8float(float %sp, <8 x float> %v)1546 ret float %res1547}1548 1549define float @test_vector_reduce_fmul_v16float(float %sp, <16 x float> %v) {1550; GFX7-LABEL: test_vector_reduce_fmul_v16float:1551; GFX7: ; %bb.0: ; %entry1552; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1553; GFX7-NEXT: v_mul_f32_e32 v0, v0, v11554; GFX7-NEXT: v_mul_f32_e32 v0, v0, v21555; GFX7-NEXT: v_mul_f32_e32 v0, v0, v31556; GFX7-NEXT: v_mul_f32_e32 v0, v0, v41557; GFX7-NEXT: v_mul_f32_e32 v0, v0, v51558; GFX7-NEXT: v_mul_f32_e32 v0, v0, v61559; GFX7-NEXT: v_mul_f32_e32 v0, v0, v71560; GFX7-NEXT: v_mul_f32_e32 v0, v0, v81561; GFX7-NEXT: v_mul_f32_e32 v0, v0, v91562; GFX7-NEXT: v_mul_f32_e32 v0, v0, v101563; GFX7-NEXT: v_mul_f32_e32 v0, v0, v111564; GFX7-NEXT: v_mul_f32_e32 v0, v0, v121565; GFX7-NEXT: v_mul_f32_e32 v0, v0, v131566; GFX7-NEXT: v_mul_f32_e32 v0, v0, v141567; GFX7-NEXT: v_mul_f32_e32 v0, v0, v151568; GFX7-NEXT: v_mul_f32_e32 v0, v0, v161569; GFX7-NEXT: s_setpc_b64 s[30:31]1570;1571; GFX8-LABEL: test_vector_reduce_fmul_v16float:1572; GFX8: ; %bb.0: ; %entry1573; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1574; GFX8-NEXT: v_mul_f32_e32 v0, v0, v11575; GFX8-NEXT: v_mul_f32_e32 v0, v0, v21576; GFX8-NEXT: v_mul_f32_e32 v0, v0, v31577; GFX8-NEXT: v_mul_f32_e32 v0, v0, v41578; GFX8-NEXT: v_mul_f32_e32 v0, v0, v51579; GFX8-NEXT: v_mul_f32_e32 v0, v0, v61580; GFX8-NEXT: v_mul_f32_e32 v0, v0, v71581; GFX8-NEXT: v_mul_f32_e32 v0, v0, v81582; GFX8-NEXT: v_mul_f32_e32 v0, v0, v91583; GFX8-NEXT: v_mul_f32_e32 v0, v0, v101584; GFX8-NEXT: v_mul_f32_e32 v0, v0, v111585; GFX8-NEXT: v_mul_f32_e32 v0, v0, v121586; GFX8-NEXT: v_mul_f32_e32 v0, v0, v131587; GFX8-NEXT: v_mul_f32_e32 v0, v0, v141588; GFX8-NEXT: v_mul_f32_e32 v0, v0, v151589; GFX8-NEXT: v_mul_f32_e32 v0, v0, v161590; GFX8-NEXT: s_setpc_b64 s[30:31]1591;1592; GFX9-LABEL: test_vector_reduce_fmul_v16float:1593; GFX9: ; %bb.0: ; %entry1594; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1595; GFX9-NEXT: v_mul_f32_e32 v0, v0, v11596; GFX9-NEXT: v_mul_f32_e32 v0, v0, v21597; GFX9-NEXT: v_mul_f32_e32 v0, v0, v31598; GFX9-NEXT: v_mul_f32_e32 v0, v0, v41599; GFX9-NEXT: v_mul_f32_e32 v0, v0, v51600; GFX9-NEXT: v_mul_f32_e32 v0, v0, v61601; GFX9-NEXT: v_mul_f32_e32 v0, v0, v71602; GFX9-NEXT: v_mul_f32_e32 v0, v0, v81603; GFX9-NEXT: v_mul_f32_e32 v0, v0, v91604; GFX9-NEXT: v_mul_f32_e32 v0, v0, v101605; GFX9-NEXT: v_mul_f32_e32 v0, v0, v111606; GFX9-NEXT: v_mul_f32_e32 v0, v0, v121607; GFX9-NEXT: v_mul_f32_e32 v0, v0, v131608; GFX9-NEXT: v_mul_f32_e32 v0, v0, v141609; GFX9-NEXT: v_mul_f32_e32 v0, v0, v151610; GFX9-NEXT: v_mul_f32_e32 v0, v0, v161611; GFX9-NEXT: s_setpc_b64 s[30:31]1612;1613; GFX10-LABEL: test_vector_reduce_fmul_v16float:1614; GFX10: ; %bb.0: ; %entry1615; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1616; GFX10-NEXT: v_mul_f32_e32 v0, v0, v11617; GFX10-NEXT: v_mul_f32_e32 v0, v0, v21618; GFX10-NEXT: v_mul_f32_e32 v0, v0, v31619; GFX10-NEXT: v_mul_f32_e32 v0, v0, v41620; GFX10-NEXT: v_mul_f32_e32 v0, v0, v51621; GFX10-NEXT: v_mul_f32_e32 v0, v0, v61622; GFX10-NEXT: v_mul_f32_e32 v0, v0, v71623; GFX10-NEXT: v_mul_f32_e32 v0, v0, v81624; GFX10-NEXT: v_mul_f32_e32 v0, v0, v91625; GFX10-NEXT: v_mul_f32_e32 v0, v0, v101626; GFX10-NEXT: v_mul_f32_e32 v0, v0, v111627; GFX10-NEXT: v_mul_f32_e32 v0, v0, v121628; GFX10-NEXT: v_mul_f32_e32 v0, v0, v131629; GFX10-NEXT: v_mul_f32_e32 v0, v0, v141630; GFX10-NEXT: v_mul_f32_e32 v0, v0, v151631; GFX10-NEXT: v_mul_f32_e32 v0, v0, v161632; GFX10-NEXT: s_setpc_b64 s[30:31]1633;1634; GFX11-LABEL: test_vector_reduce_fmul_v16float:1635; GFX11: ; %bb.0: ; %entry1636; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1637; GFX11-NEXT: v_mul_f32_e32 v0, v0, v11638; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1639; GFX11-NEXT: v_mul_f32_e32 v0, v0, v21640; GFX11-NEXT: v_mul_f32_e32 v0, v0, v31641; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1642; GFX11-NEXT: v_mul_f32_e32 v0, v0, v41643; GFX11-NEXT: v_mul_f32_e32 v0, v0, v51644; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1645; GFX11-NEXT: v_mul_f32_e32 v0, v0, v61646; GFX11-NEXT: v_mul_f32_e32 v0, v0, v71647; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1648; GFX11-NEXT: v_mul_f32_e32 v0, v0, v81649; GFX11-NEXT: v_mul_f32_e32 v0, v0, v91650; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1651; GFX11-NEXT: v_mul_f32_e32 v0, v0, v101652; GFX11-NEXT: v_mul_f32_e32 v0, v0, v111653; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1654; GFX11-NEXT: v_mul_f32_e32 v0, v0, v121655; GFX11-NEXT: v_mul_f32_e32 v0, v0, v131656; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1657; GFX11-NEXT: v_mul_f32_e32 v0, v0, v141658; GFX11-NEXT: v_mul_f32_e32 v0, v0, v151659; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1660; GFX11-NEXT: v_mul_f32_e32 v0, v0, v161661; GFX11-NEXT: s_setpc_b64 s[30:31]1662;1663; GFX12-LABEL: test_vector_reduce_fmul_v16float:1664; GFX12: ; %bb.0: ; %entry1665; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01666; GFX12-NEXT: s_wait_expcnt 0x01667; GFX12-NEXT: s_wait_samplecnt 0x01668; GFX12-NEXT: s_wait_bvhcnt 0x01669; GFX12-NEXT: s_wait_kmcnt 0x01670; GFX12-NEXT: v_mul_f32_e32 v0, v0, v11671; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1672; GFX12-NEXT: v_mul_f32_e32 v0, v0, v21673; GFX12-NEXT: v_mul_f32_e32 v0, v0, v31674; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1675; GFX12-NEXT: v_mul_f32_e32 v0, v0, v41676; GFX12-NEXT: v_mul_f32_e32 v0, v0, v51677; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1678; GFX12-NEXT: v_mul_f32_e32 v0, v0, v61679; GFX12-NEXT: v_mul_f32_e32 v0, v0, v71680; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1681; GFX12-NEXT: v_mul_f32_e32 v0, v0, v81682; GFX12-NEXT: v_mul_f32_e32 v0, v0, v91683; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1684; GFX12-NEXT: v_mul_f32_e32 v0, v0, v101685; GFX12-NEXT: v_mul_f32_e32 v0, v0, v111686; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1687; GFX12-NEXT: v_mul_f32_e32 v0, v0, v121688; GFX12-NEXT: v_mul_f32_e32 v0, v0, v131689; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1690; GFX12-NEXT: v_mul_f32_e32 v0, v0, v141691; GFX12-NEXT: v_mul_f32_e32 v0, v0, v151692; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1693; GFX12-NEXT: v_mul_f32_e32 v0, v0, v161694; GFX12-NEXT: s_setpc_b64 s[30:31]1695entry:1696 %res = call float @llvm.vector.reduce.fmul.v16float(float %sp, <16 x float> %v)1697 ret float %res1698}1699 1700 1701define double @test_vector_reduce_fmul_v2double(double %sp, <2 x double> %v) {1702; GFX7-LABEL: test_vector_reduce_fmul_v2double:1703; GFX7: ; %bb.0: ; %entry1704; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1705; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1706; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1707; GFX7-NEXT: s_setpc_b64 s[30:31]1708;1709; GFX8-LABEL: test_vector_reduce_fmul_v2double:1710; GFX8: ; %bb.0: ; %entry1711; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1712; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1713; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1714; GFX8-NEXT: s_setpc_b64 s[30:31]1715;1716; GFX9-LABEL: test_vector_reduce_fmul_v2double:1717; GFX9: ; %bb.0: ; %entry1718; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1719; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1720; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1721; GFX9-NEXT: s_setpc_b64 s[30:31]1722;1723; GFX10-LABEL: test_vector_reduce_fmul_v2double:1724; GFX10: ; %bb.0: ; %entry1725; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1726; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1727; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1728; GFX10-NEXT: s_setpc_b64 s[30:31]1729;1730; GFX11-LABEL: test_vector_reduce_fmul_v2double:1731; GFX11: ; %bb.0: ; %entry1732; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1733; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1734; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1735; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1736; GFX11-NEXT: s_setpc_b64 s[30:31]1737;1738; GFX12-LABEL: test_vector_reduce_fmul_v2double:1739; GFX12: ; %bb.0: ; %entry1740; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01741; GFX12-NEXT: s_wait_expcnt 0x01742; GFX12-NEXT: s_wait_samplecnt 0x01743; GFX12-NEXT: s_wait_bvhcnt 0x01744; GFX12-NEXT: s_wait_kmcnt 0x01745; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]1746; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1747; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[4:5]1748; GFX12-NEXT: s_setpc_b64 s[30:31]1749entry:1750 %res = call double @llvm.vector.reduce.fmul.v2double(double %sp, <2 x double> %v)1751 ret double %res1752}1753 1754define double @test_vector_reduce_fmul_v3double(double %sp, <3 x double> %v) {1755; GFX7-LABEL: test_vector_reduce_fmul_v3double:1756; GFX7: ; %bb.0: ; %entry1757; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1758; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1759; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1760; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1761; GFX7-NEXT: s_setpc_b64 s[30:31]1762;1763; GFX8-LABEL: test_vector_reduce_fmul_v3double:1764; GFX8: ; %bb.0: ; %entry1765; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1766; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1767; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1768; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1769; GFX8-NEXT: s_setpc_b64 s[30:31]1770;1771; GFX9-LABEL: test_vector_reduce_fmul_v3double:1772; GFX9: ; %bb.0: ; %entry1773; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1774; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1775; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1776; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1777; GFX9-NEXT: s_setpc_b64 s[30:31]1778;1779; GFX10-LABEL: test_vector_reduce_fmul_v3double:1780; GFX10: ; %bb.0: ; %entry1781; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1782; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1783; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1784; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1785; GFX10-NEXT: s_setpc_b64 s[30:31]1786;1787; GFX11-LABEL: test_vector_reduce_fmul_v3double:1788; GFX11: ; %bb.0: ; %entry1789; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1790; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1791; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1792; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1793; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1794; GFX11-NEXT: s_setpc_b64 s[30:31]1795;1796; GFX12-LABEL: test_vector_reduce_fmul_v3double:1797; GFX12: ; %bb.0: ; %entry1798; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01799; GFX12-NEXT: s_wait_expcnt 0x01800; GFX12-NEXT: s_wait_samplecnt 0x01801; GFX12-NEXT: s_wait_bvhcnt 0x01802; GFX12-NEXT: s_wait_kmcnt 0x01803; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]1804; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1805; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[4:5]1806; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[6:7]1807; GFX12-NEXT: s_setpc_b64 s[30:31]1808entry:1809 %res = call double @llvm.vector.reduce.fmul.v3double(double %sp, <3 x double> %v)1810 ret double %res1811}1812 1813define double @test_vector_reduce_fmul_v4double(double %sp, <4 x double> %v) {1814; GFX7-LABEL: test_vector_reduce_fmul_v4double:1815; GFX7: ; %bb.0: ; %entry1816; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1817; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1818; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1819; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1820; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1821; GFX7-NEXT: s_setpc_b64 s[30:31]1822;1823; GFX8-LABEL: test_vector_reduce_fmul_v4double:1824; GFX8: ; %bb.0: ; %entry1825; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1826; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1827; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1828; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1829; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1830; GFX8-NEXT: s_setpc_b64 s[30:31]1831;1832; GFX9-LABEL: test_vector_reduce_fmul_v4double:1833; GFX9: ; %bb.0: ; %entry1834; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1835; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1836; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1837; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1838; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1839; GFX9-NEXT: s_setpc_b64 s[30:31]1840;1841; GFX10-LABEL: test_vector_reduce_fmul_v4double:1842; GFX10: ; %bb.0: ; %entry1843; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1844; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1845; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1846; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1847; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1848; GFX10-NEXT: s_setpc_b64 s[30:31]1849;1850; GFX11-LABEL: test_vector_reduce_fmul_v4double:1851; GFX11: ; %bb.0: ; %entry1852; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1853; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1854; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1855; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1856; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1857; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1858; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1859; GFX11-NEXT: s_setpc_b64 s[30:31]1860;1861; GFX12-LABEL: test_vector_reduce_fmul_v4double:1862; GFX12: ; %bb.0: ; %entry1863; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01864; GFX12-NEXT: s_wait_expcnt 0x01865; GFX12-NEXT: s_wait_samplecnt 0x01866; GFX12-NEXT: s_wait_bvhcnt 0x01867; GFX12-NEXT: s_wait_kmcnt 0x01868; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]1869; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1870; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[4:5]1871; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[6:7]1872; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1873; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[8:9]1874; GFX12-NEXT: s_setpc_b64 s[30:31]1875entry:1876 %res = call double @llvm.vector.reduce.fmul.v4double(double %sp, <4 x double> %v)1877 ret double %res1878}1879 1880define double @test_vector_reduce_fmul_v8double(double %sp, <8 x double> %v) {1881; GFX7-LABEL: test_vector_reduce_fmul_v8double:1882; GFX7: ; %bb.0: ; %entry1883; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1884; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1885; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1886; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1887; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1888; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]1889; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]1890; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]1891; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]1892; GFX7-NEXT: s_setpc_b64 s[30:31]1893;1894; GFX8-LABEL: test_vector_reduce_fmul_v8double:1895; GFX8: ; %bb.0: ; %entry1896; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1897; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1898; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1899; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1900; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1901; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]1902; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]1903; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]1904; GFX8-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]1905; GFX8-NEXT: s_setpc_b64 s[30:31]1906;1907; GFX9-LABEL: test_vector_reduce_fmul_v8double:1908; GFX9: ; %bb.0: ; %entry1909; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1910; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1911; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1912; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1913; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1914; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]1915; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]1916; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]1917; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]1918; GFX9-NEXT: s_setpc_b64 s[30:31]1919;1920; GFX10-LABEL: test_vector_reduce_fmul_v8double:1921; GFX10: ; %bb.0: ; %entry1922; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1923; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1924; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1925; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1926; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1927; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]1928; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]1929; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]1930; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]1931; GFX10-NEXT: s_setpc_b64 s[30:31]1932;1933; GFX11-LABEL: test_vector_reduce_fmul_v8double:1934; GFX11: ; %bb.0: ; %entry1935; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1936; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1937; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1938; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1939; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1940; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1941; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1942; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]1943; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1944; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]1945; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]1946; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1947; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]1948; GFX11-NEXT: s_setpc_b64 s[30:31]1949;1950; GFX12-LABEL: test_vector_reduce_fmul_v8double:1951; GFX12: ; %bb.0: ; %entry1952; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01953; GFX12-NEXT: s_wait_expcnt 0x01954; GFX12-NEXT: s_wait_samplecnt 0x01955; GFX12-NEXT: s_wait_bvhcnt 0x01956; GFX12-NEXT: s_wait_kmcnt 0x01957; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]1958; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1959; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[4:5]1960; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[6:7]1961; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1962; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[8:9]1963; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[10:11]1964; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1965; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[12:13]1966; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[14:15]1967; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)1968; GFX12-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[16:17]1969; GFX12-NEXT: s_setpc_b64 s[30:31]1970entry:1971 %res = call double @llvm.vector.reduce.fmul.v8double(double %sp, <8 x double> %v)1972 ret double %res1973}1974 1975define double @test_vector_reduce_fmul_v16double(double %sp, <16 x double> %v) {1976; GFX7-SDAG-LABEL: test_vector_reduce_fmul_v16double:1977; GFX7-SDAG: ; %bb.0: ; %entry1978; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1979; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1980; GFX7-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s321981; GFX7-SDAG-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:81982; GFX7-SDAG-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:41983; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1984; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]1985; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1986; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]1987; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]1988; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]1989; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]1990; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]1991; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]1992; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]1993; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]1994; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]1995; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]1996; GFX7-SDAG-NEXT: s_waitcnt vmcnt(2)1997; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]1998; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0)1999; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2000; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2001;2002; GFX7-GISEL-LABEL: test_vector_reduce_fmul_v16double:2003; GFX7-GISEL: ; %bb.0: ; %entry2004; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2005; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2006; GFX7-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s322007; GFX7-GISEL-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:42008; GFX7-GISEL-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:82009; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2010; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2011; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2012; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2013; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2014; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2015; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2016; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2017; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2018; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2019; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2020; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2021; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2022; GFX7-GISEL-NEXT: s_waitcnt vmcnt(2)2023; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2024; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0)2025; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2026; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2027;2028; GFX8-SDAG-LABEL: test_vector_reduce_fmul_v16double:2029; GFX8-SDAG: ; %bb.0: ; %entry2030; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2031; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2032; GFX8-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s322033; GFX8-SDAG-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:82034; GFX8-SDAG-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:42035; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2036; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2037; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2038; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2039; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2040; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2041; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2042; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2043; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2044; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2045; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2046; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2047; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2048; GFX8-SDAG-NEXT: s_waitcnt vmcnt(2)2049; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2050; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0)2051; GFX8-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2052; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]2053;2054; GFX8-GISEL-LABEL: test_vector_reduce_fmul_v16double:2055; GFX8-GISEL: ; %bb.0: ; %entry2056; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2057; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2058; GFX8-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s322059; GFX8-GISEL-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:42060; GFX8-GISEL-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:82061; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2062; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2063; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2064; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2065; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2066; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2067; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2068; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2069; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2070; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2071; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2072; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2073; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2074; GFX8-GISEL-NEXT: s_waitcnt vmcnt(2)2075; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2076; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)2077; GFX8-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2078; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]2079;2080; GFX9-SDAG-LABEL: test_vector_reduce_fmul_v16double:2081; GFX9-SDAG: ; %bb.0: ; %entry2082; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2083; GFX9-SDAG-NEXT: scratch_load_dword v33, off, s32 offset:82084; GFX9-SDAG-NEXT: scratch_load_dword v31, off, s322085; GFX9-SDAG-NEXT: scratch_load_dword v32, off, s32 offset:42086; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2087; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2088; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2089; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2090; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2091; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2092; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2093; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2094; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2095; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2096; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2097; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2098; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2099; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2100; GFX9-SDAG-NEXT: s_waitcnt vmcnt(1)2101; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2102; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)2103; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[32:33]2104; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2105;2106; GFX9-GISEL-LABEL: test_vector_reduce_fmul_v16double:2107; GFX9-GISEL: ; %bb.0: ; %entry2108; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2109; GFX9-GISEL-NEXT: scratch_load_dword v31, off, s322110; GFX9-GISEL-NEXT: scratch_load_dword v32, off, s32 offset:42111; GFX9-GISEL-NEXT: scratch_load_dword v33, off, s32 offset:82112; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2113; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2114; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2115; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2116; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2117; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2118; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2119; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2120; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2121; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2122; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2123; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2124; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2125; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2126; GFX9-GISEL-NEXT: s_waitcnt vmcnt(2)2127; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2128; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)2129; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[32:33]2130; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2131;2132; GFX10-SDAG-LABEL: test_vector_reduce_fmul_v16double:2133; GFX10-SDAG: ; %bb.0: ; %entry2134; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2135; GFX10-SDAG-NEXT: buffer_load_dword v31, off, s[0:3], s322136; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2137; GFX10-SDAG-NEXT: s_clause 0x12138; GFX10-SDAG-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:82139; GFX10-SDAG-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:42140; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2141; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2142; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2143; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2144; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2145; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2146; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2147; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2148; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2149; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2150; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2151; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2152; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2153; GFX10-SDAG-NEXT: s_waitcnt vmcnt(2)2154; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2155; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0)2156; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2157; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2158;2159; GFX10-GISEL-LABEL: test_vector_reduce_fmul_v16double:2160; GFX10-GISEL: ; %bb.0: ; %entry2161; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2162; GFX10-GISEL-NEXT: buffer_load_dword v31, off, s[0:3], s322163; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2164; GFX10-GISEL-NEXT: s_clause 0x12165; GFX10-GISEL-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:42166; GFX10-GISEL-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:82167; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2168; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2169; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2170; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2171; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2172; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2173; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2174; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2175; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2176; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2177; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2178; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2179; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2180; GFX10-GISEL-NEXT: s_waitcnt vmcnt(2)2181; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2182; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0)2183; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2184; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2185;2186; GFX11-SDAG-LABEL: test_vector_reduce_fmul_v16double:2187; GFX11-SDAG: ; %bb.0: ; %entry2188; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2189; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2190; GFX11-SDAG-NEXT: s_clause 0x22191; GFX11-SDAG-NEXT: scratch_load_b32 v31, off, s322192; GFX11-SDAG-NEXT: scratch_load_b32 v3, off, s32 offset:82193; GFX11-SDAG-NEXT: scratch_load_b32 v2, off, s32 offset:42194; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2195; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2196; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2197; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2198; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2199; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2200; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2201; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2202; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2203; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2204; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2205; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2206; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2207; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2208; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2209; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2210; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2211; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2212; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2213; GFX11-SDAG-NEXT: s_waitcnt vmcnt(2)2214; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2215; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2216; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0)2217; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2218; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2219;2220; GFX11-GISEL-LABEL: test_vector_reduce_fmul_v16double:2221; GFX11-GISEL: ; %bb.0: ; %entry2222; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2223; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2224; GFX11-GISEL-NEXT: s_clause 0x22225; GFX11-GISEL-NEXT: scratch_load_b32 v31, off, s322226; GFX11-GISEL-NEXT: scratch_load_b32 v2, off, s32 offset:42227; GFX11-GISEL-NEXT: scratch_load_b32 v3, off, s32 offset:82228; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2229; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2230; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[6:7]2231; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]2232; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2233; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[10:11]2234; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[12:13]2235; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2236; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[14:15]2237; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[16:17]2238; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2239; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[18:19]2240; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[20:21]2241; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2242; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[22:23]2243; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[24:25]2244; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2245; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[26:27]2246; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[28:29]2247; GFX11-GISEL-NEXT: s_waitcnt vmcnt(2)2248; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2249; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[30:31]2250; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)2251; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2252; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2253;2254; GFX12-SDAG-LABEL: test_vector_reduce_fmul_v16double:2255; GFX12-SDAG: ; %bb.0: ; %entry2256; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x02257; GFX12-SDAG-NEXT: s_wait_expcnt 0x02258; GFX12-SDAG-NEXT: s_wait_samplecnt 0x02259; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x02260; GFX12-SDAG-NEXT: s_wait_kmcnt 0x02261; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]2262; GFX12-SDAG-NEXT: s_clause 0x22263; GFX12-SDAG-NEXT: scratch_load_b32 v31, off, s322264; GFX12-SDAG-NEXT: scratch_load_b32 v3, off, s32 offset:82265; GFX12-SDAG-NEXT: scratch_load_b32 v2, off, s32 offset:42266; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[4:5]2267; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2268; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[6:7]2269; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[8:9]2270; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2271; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[10:11]2272; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[12:13]2273; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2274; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[14:15]2275; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[16:17]2276; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2277; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[18:19]2278; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[20:21]2279; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2280; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[22:23]2281; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[24:25]2282; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2283; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[26:27]2284; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[28:29]2285; GFX12-SDAG-NEXT: s_wait_loadcnt 0x22286; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2287; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[30:31]2288; GFX12-SDAG-NEXT: s_wait_loadcnt 0x02289; GFX12-SDAG-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]2290; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]2291;2292; GFX12-GISEL-LABEL: test_vector_reduce_fmul_v16double:2293; GFX12-GISEL: ; %bb.0: ; %entry2294; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x02295; GFX12-GISEL-NEXT: s_wait_expcnt 0x02296; GFX12-GISEL-NEXT: s_wait_samplecnt 0x02297; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x02298; GFX12-GISEL-NEXT: s_wait_kmcnt 0x02299; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]2300; GFX12-GISEL-NEXT: s_clause 0x22301; GFX12-GISEL-NEXT: scratch_load_b32 v31, off, s322302; GFX12-GISEL-NEXT: scratch_load_b32 v2, off, s32 offset:42303; GFX12-GISEL-NEXT: scratch_load_b32 v3, off, s32 offset:82304; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[4:5]2305; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2306; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[6:7]2307; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[8:9]2308; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2309; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[10:11]2310; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[12:13]2311; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2312; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[14:15]2313; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[16:17]2314; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2315; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[18:19]2316; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[20:21]2317; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2318; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[22:23]2319; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[24:25]2320; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2321; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[26:27]2322; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[28:29]2323; GFX12-GISEL-NEXT: s_wait_loadcnt 0x22324; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)2325; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[30:31]2326; GFX12-GISEL-NEXT: s_wait_loadcnt 0x02327; GFX12-GISEL-NEXT: v_mul_f64_e32 v[0:1], v[0:1], v[2:3]2328; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]2329entry:2330 %res = call double @llvm.vector.reduce.fmul.v16double(double %sp, <16 x double> %v)2331 ret double %res2332}2333 2334declare half @llvm.vector.reduce.fmul.v2half(half, <2 x half>)2335declare half @llvm.vector.reduce.fmul.v3half(half, <3 x half>)2336declare half @llvm.vector.reduce.fmul.v4half(half, <4 x half>)2337declare half @llvm.vector.reduce.fmul.v8half(half, <8 x half>)2338declare half @llvm.vector.reduce.fmul.v16half(half, <16 x half>)2339declare float @llvm.vector.reduce.fmul.v2float(float, <2 x float>)2340declare float @llvm.vector.reduce.fmul.v3float(float, <3 x float>)2341declare float @llvm.vector.reduce.fmul.v4float(float, <4 x float>)2342declare float @llvm.vector.reduce.fmul.v8float(float, <8 x float>)2343declare float @llvm.vector.reduce.fmul.v16float(float, <16 x float>)2344declare double @llvm.vector.reduce.fmul.v2double(double, <2 x double>)2345declare double @llvm.vector.reduce.fmul.v3double(double, <3 x double>)2346declare double @llvm.vector.reduce.fmul.v4double(double, <4 x double>)2347declare double @llvm.vector.reduce.fmul.v8double(double, <8 x double>)2348declare double @llvm.vector.reduce.fmul.v16double(double, <16 x double>)2349