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1# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -start-before=amdgpu-lower-vgpr-encoding -o - %s | FileCheck -check-prefixes=GCN,ASM %s2# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -start-before=amdgpu-lower-vgpr-encoding -o - %s | llvm-mc -triple=amdgcn -mcpu=gfx1250 -filetype=obj -o - | llvm-objdump -d --mcpu=gfx1250 - | FileCheck -check-prefixes=GCN,DIS %s3 4# ASM-LABEL: {{^}}high_vgprs:5# DIS-LABEL: <high_vgprs>:6---7name: high_vgprs8tracksRegLiveness: true9body: |10 bb.0:11 ; ASM: %bb.0:12 13 ; VOP114 15 ; GCN-NEXT: s_set_vgpr_msb 0x4116 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=0 src2=017 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v255 /*v511*/18 $vgpr256 = V_MOV_B32_e32 undef $vgpr511, implicit $exec19 20 ; No mask change21 ; GCN-NEXT: v_mov_b32_e32 v1 /*v257*/, v254 /*v510*/22 $vgpr257 = V_MOV_B32_e32 undef $vgpr510, implicit $exec23 24 ; Single bit change25 ; GCN-NEXT: s_set_vgpr_msb 0x410126 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=0 src2=027 ; GCN-NEXT: v_rcp_f32_e64 v255, v2 /*v258*/28 $vgpr255 = V_RCP_F32_e64 0, undef $vgpr258, 0, 0, implicit $exec, implicit $mode29 30 ; Reset31 ; GCN-NEXT: s_set_vgpr_msb 0x10032 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=033 ; GCN-NEXT: v_rcp_f32_e64 v255, v134 $vgpr255 = V_RCP_F32_e64 0, undef $vgpr1, 0, 0, implicit $exec, implicit $mode35 36 ; VOP237 38 ; GCN-NEXT: s_set_vgpr_msb 539 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=1 src2=040 ; GCN-NEXT: v_add_nc_u32_e32 v0, v253 /*v509*/, v252 /*v508*/41 $vgpr0 = V_ADD_U32_e32 undef $vgpr509, undef $vgpr508, implicit $exec42 43 ; GCN-NEXT: s_set_vgpr_msb 0x54444 ; ASM-SAME: ; msbs: dst=1 src0=0 src1=1 src2=045 ; GCN-NEXT: s_delay_alu instid0(VALU_DEP_1)46 ; GCN-NEXT: v_add_f32_e64 v2 /*v258*/, v0, v251 /*v507*/47 $vgpr258 = V_ADD_F32_e64 0, $vgpr0, 0, undef $vgpr507, 0, 0, implicit $exec, implicit $mode48 49 ; VOP350 51 ; GCN-NEXT: s_set_vgpr_msb 0x445552 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=1 src2=153 ; GCN-NEXT: v_fma_f32 v3 /*v259*/, v4 /*v260*/, v5 /*v261*/, v6 /*v262*/54 $vgpr259 = V_FMA_F32_e64 0, undef $vgpr260, 0, undef $vgpr261, 0, undef $vgpr262, 0, 0, implicit $exec, implicit $mode55 56 ; No change57 ; GCN-NEXT: v_fma_f32 v3 /*v259*/, v4 /*v260*/, v5 /*v261*/, v6 /*v262*/58 $vgpr259 = V_FMA_F32_e64 0, undef $vgpr260, 0, undef $vgpr261, 0, undef $vgpr262, 0, 0, implicit $exec, implicit $mode59 60 ; Tuple crossing the 256 boundary61 ; GCN-NEXT: s_set_vgpr_msb 0x551162 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=0 src2=163 ; GCN-NEXT: v_mqsad_u32_u8 v[254:257], v[2:3] /*v[258:259]*/, v0, v[244:247] /*v[500:503]*/64 $vgpr254_vgpr255_vgpr256_vgpr257 = V_MQSAD_U32_U8_e64 $vgpr258_vgpr259, $vgpr0, undef $vgpr500_vgpr501_vgpr502_vgpr503, 0, implicit $exec65 66 ; DPP/tied operand67 ; GCN-NEXT: s_set_vgpr_msb 0x114568 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=1 src2=069 ; GCN-NEXT: s_delay_alu instid0(VALU_DEP_1)70 ; GCN-NEXT: v_add_nc_u16_e64_dpp v0 /*v256*/, v1 /*v257*/, v2 /*v258*/ quad_perm:[1,0,0,0] row_mask:0xf bank_mask:0xf bound_ctrl:171 $vgpr256 = V_ADD_NC_U16_fake16_e64_dpp $vgpr256, 0, $vgpr257, 0, undef $vgpr258, 0, 0, 1, 15, 15, 1, implicit $exec72 73 ; GCN-NEXT: s_set_vgpr_msb 0x451174 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=0 src2=175 ; GCN-NEXT: v_add3_u32_e64_dpp v0, v1 /*v257*/, v0, v2 /*v258*/ quad_perm:[1,0,0,0] row_mask:0xf bank_mask:0xf bound_ctrl:176 $vgpr0 = V_ADD3_U32_e64_dpp $vgpr0, $vgpr257, $vgpr0, undef $vgpr258, 1, 15, 15, 1, implicit $exec77 78 ; DS (addr, data0, and data1 operands)79 80 ; GCN-NEXT: s_set_vgpr_msb 0x111481 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=1 src2=182 ; GCN-NEXT: ds_store_2addr_b32 v0, v248 /*v504*/, v249 /*v505*/ offset1:183 DS_WRITE2_B32_gfx9 $vgpr0, undef $vgpr504, undef $vgpr505, 0, 1, 0, implicit $exec84 85 ; Reset86 ; GCN-NEXT: s_set_vgpr_msb 0x140087 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=088 ; GCN-NEXT: ds_store_2addr_b32 v0, v248, v249 offset1:189 DS_WRITE2_B32_gfx9 $vgpr0, undef $vgpr248, undef $vgpr249, 0, 1, 0, implicit $exec90 91 ; GCN-NEXT: s_set_vgpr_msb 192 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=0 src2=093 ; GCN-NEXT: ds_load_b32 v0, v255 /*v511*/94 $vgpr0 = DS_READ_B32_gfx9 $vgpr511, 0, 0, implicit $exec95 96 ; GCN-NEXT: s_set_vgpr_msb 0x14497 ; ASM-SAME: ; msbs: dst=1 src0=0 src1=1 src2=098 ; GCN-NEXT: ds_add_rtn_u32 v255 /*v511*/, v0, v248 /*v504*/99 $vgpr511 = DS_ADD_RTN_U32_gfx9 $vgpr0, undef $vgpr504, 0, 0, implicit $exec100 101 ; Reset102 ; GCN-NEXT: s_set_vgpr_msb 0x4400103 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=0104 ; GCN-NEXT: ds_add_rtn_u32 v0, v0, v0105 $vgpr0 = DS_ADD_RTN_U32_gfx9 $vgpr0, $vgpr0, 0, 0, implicit $exec106 107 ; FLAT (vaddr, vdata and vdst operands)108 109 ; GCN-NEXT: s_set_vgpr_msb 1110 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=0 src2=0111 ; GCN-NEXT: global_load_b32 v2, v[2:3] /*v[258:259]*/, off112 $vgpr2 = GLOBAL_LOAD_DWORD undef $vgpr258_vgpr259, 0, 0, implicit $exec113 114 ; GCN-NEXT: s_set_vgpr_msb 0x140115 ; ASM-SAME: ; msbs: dst=1 src0=0 src1=0 src2=0116 ; GCN-NEXT: global_load_b32 v255 /*v511*/, v0, s[0:1]117 $vgpr511 = GLOBAL_LOAD_DWORD_SADDR undef $sgpr0_sgpr1, $vgpr0, 0, 0, implicit $exec118 119 ; GCN-NEXT: s_set_vgpr_msb 0x4001120 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=0 src2=0121 ; GCN-NEXT: scratch_load_u8 v0, v255 /*v511*/, s0122 $vgpr0 = SCRATCH_LOAD_UBYTE_SVS $vgpr511, undef $sgpr0, 0, 0, implicit $exec, implicit $flat_scr123 124 ; GCN-NEXT: s_set_vgpr_msb 0x100125 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=0126 ; GCN-NEXT: global_store_b32 v[0:1], v2, off127 GLOBAL_STORE_DWORD $vgpr0_vgpr1, $vgpr2, 0, 0, implicit $exec128 129 ; GCN-NEXT: s_set_vgpr_msb 5130 ; ASM-SAME: ; msbs: dst=0 src0=1 src1=1 src2=0131 ; GCN-NEXT: global_store_b32 v[0:1] /*v[256:257]*/, v255 /*v511*/, off132 GLOBAL_STORE_DWORD $vgpr256_vgpr257, $vgpr511, 0, 0, implicit $exec133 134 ; No change135 ; GCN-NEXT: global_store_b96 v[0:1] /*v[256:257]*/, v[244:246] /*v[500:502]*/, off136 GLOBAL_STORE_DWORDX3 $vgpr256_vgpr257, $vgpr500_vgpr501_vgpr502, 0, 0, implicit $exec137 138 ; GCN-NEXT: s_set_vgpr_msb 0x544139 ; ASM-SAME: ; msbs: dst=1 src0=0 src1=1 src2=0140 ; GCN-NEXT: flat_atomic_add_u32 v254 /*v510*/, v[0:1], v255 /*v511*/ th:TH_ATOMIC_RETURN141 $vgpr510 = FLAT_ATOMIC_ADD_RTN $vgpr0_vgpr1, $vgpr511, 0, 1, implicit $exec, implicit $flat_scr142 143 ; Reset144 ; GCN-NEXT: s_set_vgpr_msb 0x4400145 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=0146 ; GCN-NEXT: flat_atomic_add_u32 v0, v[0:1], v255 th:TH_ATOMIC_RETURN147 $vgpr0 = FLAT_ATOMIC_ADD_RTN $vgpr0_vgpr1, $vgpr255, 0, 1, implicit $exec, implicit $flat_scr148 149 ; VBUFFER (vdata, vaddr operands)150 151 ; GCN-NEXT: buffer_load_b32 v1, v0, s[8:11], s3 offen152 $vgpr1 = BUFFER_LOAD_DWORD_VBUFFER_OFFEN $vgpr0, undef $sgpr8_sgpr9_sgpr10_sgpr11, undef $sgpr3, 0, 0, 0, implicit $exec153 154 ; GCN-NEXT: s_set_vgpr_msb 64155 ; ASM-SAME: ; msbs: dst=1 src0=0 src1=0 src2=0156 ; GCN-NEXT: buffer_load_b32 v1 /*v257*/, v0, s[8:11], s3 offen157 $vgpr257 = BUFFER_LOAD_DWORD_VBUFFER_OFFEN $vgpr0, undef $sgpr8_sgpr9_sgpr10_sgpr11, undef $sgpr3, 0, 0, 0, implicit $exec158 159 ; GCN-NEXT: s_set_vgpr_msb 0x4041160 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=0 src2=0161 ; GCN-NEXT: buffer_load_b32 v1 /*v257*/, v0 /*v256*/, s[8:11], s3 offen162 $vgpr257 = BUFFER_LOAD_DWORD_VBUFFER_OFFEN $vgpr256, undef $sgpr8_sgpr9_sgpr10_sgpr11, undef $sgpr3, 0, 0, 0, implicit $exec163 164 ; GCN-NEXT: s_set_vgpr_msb 0x4100165 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=0166 ; GCN-NEXT: buffer_store_b32 v0, v1, s[0:3], s3 offen167 BUFFER_STORE_DWORD_VBUFFER_OFFEN $vgpr0, $vgpr1, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr3, 0, 0, 0, implicit $exec168 169 ; GCN-NEXT: s_set_vgpr_msb 0x41170 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=0 src2=0171 ; GCN-NEXT: buffer_store_b32 v0 /*v256*/, v1 /*v257*/, s[0:3], s3 offen172 BUFFER_STORE_DWORD_VBUFFER_OFFEN $vgpr256, $vgpr257, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr3, 0, 0, 0, implicit $exec173 174 ; GCN-NEXT: s_set_vgpr_msb 0x4100175 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=0176 ; GCN-NEXT: buffer_atomic_add_f32 v0, v1, s[0:3], s3 offen177 BUFFER_ATOMIC_ADD_F32_VBUFFER_OFFEN $vgpr0, $vgpr1, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr3, 0, 0, implicit $exec178 179 ; GCN-NEXT: s_set_vgpr_msb 0x41180 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=0 src2=0181 ; GCN-NEXT: buffer_atomic_add_f32 v0 /*v256*/, v1 /*v257*/, s[0:3], s3 offen182 BUFFER_ATOMIC_ADD_F32_VBUFFER_OFFEN $vgpr256, $vgpr257, undef $sgpr0_sgpr1_sgpr2_sgpr3, undef $sgpr3, 0, 0, implicit $exec183 184 ; VGPRs above 512185 186 ; GCN-NEXT: s_set_vgpr_msb 0x41aa187 ; ASM-SAME: ; msbs: dst=2 src0=2 src1=2 src2=2188 ; GCN-NEXT: v_fma_f32 v0 /*v512*/, v1 /*v513*/, v2 /*v514*/, v3 /*v515*/189 $vgpr512 = V_FMA_F32_e64 0, undef $vgpr513, 0, undef $vgpr514, 0, undef $vgpr515, 0, 0, implicit $exec, implicit $mode190 191 ; GCN-NEXT: s_set_vgpr_msb 0xaaab192 ; ASM-SAME: ; msbs: dst=2 src0=3 src1=2 src2=2193 ; GCN-NEXT: v_fma_f32 v0 /*v512*/, v0 /*v768*/, v2 /*v514*/, v3 /*v515*/194 $vgpr512 = V_FMA_F32_e64 0, undef $vgpr768, 0, undef $vgpr514, 0, undef $vgpr515, 0, 0, implicit $exec, implicit $mode195 196 ; GCN-NEXT: s_set_vgpr_msb 0xabae197 ; ASM-SAME: ; msbs: dst=2 src0=2 src1=3 src2=2198 ; GCN-NEXT: v_fma_f32 v0 /*v512*/, v1 /*v513*/, v2 /*v770*/, v3 /*v515*/199 $vgpr512 = V_FMA_F32_e64 0, undef $vgpr513, 0, undef $vgpr770, 0, undef $vgpr515, 0, 0, implicit $exec, implicit $mode200 201 ; GCN-NEXT: s_set_vgpr_msb 0xaeba202 ; ASM-SAME: ; msbs: dst=2 src0=2 src1=2 src2=3203 ; GCN-NEXT: v_fma_f32 v0 /*v512*/, v1 /*v513*/, v2 /*v514*/, v3 /*v771*/204 $vgpr512 = V_FMA_F32_e64 0, undef $vgpr513, 0, undef $vgpr514, 0, undef $vgpr771, 0, 0, implicit $exec, implicit $mode205 206 ; GCN-NEXT: s_set_vgpr_msb 0xbaea207 ; ASM-SAME: ; msbs: dst=3 src0=2 src1=2 src2=2208 ; GCN-NEXT: v_fma_f32 v255 /*v1023*/, v1 /*v513*/, v2 /*v514*/, v3 /*v515*/209 $vgpr1023 = V_FMA_F32_e64 0, undef $vgpr513, 0, undef $vgpr514, 0, undef $vgpr515, 0, 0, implicit $exec, implicit $mode210 211 ; GCN-NEXT: s_set_vgpr_msb 0xeaff212 ; ASM-SAME: ; msbs: dst=3 src0=3 src1=3 src2=3213 ; GCN-NEXT: v_fma_f32 v0 /*v768*/, v1 /*v769*/, v2 /*v770*/, v3 /*v771*/214 $vgpr768 = V_FMA_F32_e64 0, undef $vgpr769, 0, undef $vgpr770, 0, undef $vgpr771, 0, 0, implicit $exec, implicit $mode215 216 ; GCN-NEXT: s_set_vgpr_msb 0xff42217 ; ASM-SAME: ; msbs: dst=1 src0=2 src1=0 src2=0218 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v0 /*v512*/219 $vgpr256 = V_MOV_B32_e32 undef $vgpr512, implicit $exec220 221 ; Reset222 223 ; GCN-NEXT: s_set_vgpr_msb 0x4200224 ; ASM-SAME: ; msbs: dst=0 src0=0 src1=0 src2=0225 ; GCN-NEXT: v_fma_f32 v0, v1, v2, v3226 $vgpr0 = V_FMA_F32_e64 0, undef $vgpr1, 0, undef $vgpr2, 0, undef $vgpr3, 0, 0, implicit $exec, implicit $mode227 228 ; Tuples229 230 ; GCN-NEXT: s_set_vgpr_msb 10231 ; ASM-SAME: ; msbs: dst=0 src0=2 src1=2 src2=0232 ; GCN-NEXT: global_store_b96 v[0:1] /*v[512:513]*/, v[0:2] /*v[512:514]*/, off233 GLOBAL_STORE_DWORDX3 $vgpr512_vgpr513, $vgpr512_vgpr513_vgpr514, 0, 0, implicit $exec234 235 ; GCN-NEXT: s_set_vgpr_msb 0xa0b236 ; ASM-SAME: ; msbs: dst=0 src0=3 src1=2 src2=0237 ; GCN-NEXT: global_store_b64 v[254:255] /*v[1022:1023]*/, v[254:255] /*v[766:767]*/, off238 GLOBAL_STORE_DWORDX2 $vgpr1022_vgpr1023, $vgpr766_vgpr767, 0, 0, implicit $exec239 240 ; GCN-NEXT: s_set_vgpr_msb 0xb55241 ; ASM-SAME: ; msbs: dst=1 src0=1 src1=1 src2=1242 ; GCN-NEXT: v_wmma_f32_16x16x32_bf16 v[14:21] /*v[270:277]*/, v[26:33] /*v[282:289]*/, v[34:41] /*v[290:297]*/, v[14:21] /*v[270:277]*/243 early-clobber $vgpr270_vgpr271_vgpr272_vgpr273_vgpr274_vgpr275_vgpr276_vgpr277 = V_WMMA_F32_16X16X32_BF16_w32_twoaddr 8, undef $vgpr282_vgpr283_vgpr284_vgpr285_vgpr286_vgpr287_vgpr288_vgpr289, 8, undef $vgpr290_vgpr291_vgpr292_vgpr293_vgpr294_vgpr295_vgpr296_vgpr297, 8, killed undef $vgpr270_vgpr271_vgpr272_vgpr273_vgpr274_vgpr275_vgpr276_vgpr277, 0, 0, 0, 0, implicit $exec244 245 ; ASM: NumVgprs: 1024246 247...248 249# ASM-LABEL: {{^}}vopd:250 251# DIS-LABEL: <vopd>:252---253name: vopd254tracksRegLiveness: true255body: |256 bb.0:257 ; ASM: %bb.0:258 259 ; GCN-NEXT: v_dual_sub_f32 v255, v1, v1 :: v_dual_mul_f32 v6, v0, v0260 $vgpr255, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx1250 undef $vgpr1, undef $vgpr1, undef $vgpr0, undef $vgpr0, implicit $mode, implicit $exec261 262 ; GCN-NEXT: s_set_vgpr_msb 64263 ; GCN-NEXT: v_dual_sub_f32 v244 /*v500*/, v1, v2 :: v_dual_mul_f32 v0 /*v256*/, v3, v4264 $vgpr500, $vgpr256 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx1250 undef $vgpr1, undef $vgpr2, undef $vgpr3, undef $vgpr4, implicit $mode, implicit $exec265 266 ; GCN-NEXT: s_set_vgpr_msb 0x4041267 ; GCN-NEXT: v_dual_sub_f32 v244 /*v500*/, s1, v2 :: v_dual_mul_f32 v0 /*v256*/, v44 /*v300*/, v4268 $vgpr500, $vgpr256 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx1250 undef $sgpr1, undef $vgpr2, undef $vgpr300, undef $vgpr4, implicit $mode, implicit $exec269 270 ; GCN-NEXT: s_set_vgpr_msb 0x4104271 ; GCN-NEXT: v_dual_sub_f32 v255, v1, v44 /*v300*/ :: v_dual_mul_f32 v6, v0, v1 /*v257*/272 $vgpr255, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx1250 undef $vgpr1, undef $vgpr300, undef $vgpr0, $vgpr257, implicit $mode, implicit $exec273 274 ; GCN-NEXT: s_set_vgpr_msb 0x401275 ; GCN-NEXT: v_dual_sub_f32 v255, 0, v1 :: v_dual_mul_f32 v6, v44 /*v300*/, v3276 $vgpr255, $vgpr6 = V_DUAL_SUB_F32_e32_X_MUL_F32_e32_gfx1250 0, undef $vgpr1, undef $vgpr300, undef $vgpr3, implicit $mode, implicit $exec277 278 ; GCN-NEXT: s_set_vgpr_msb 0x140279 ; GCN-NEXT: v_dual_fmamk_f32 v243 /*v499*/, v0, 0xa, v3 :: v_dual_fmac_f32 v0 /*v256*/, v1, v1280 $vgpr499, $vgpr256 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx1250 undef $vgpr0, 10, undef $vgpr3, undef $vgpr1, undef $vgpr1, $vgpr256, implicit $mode, implicit $exec281 282 ; GCN-NEXT: s_set_vgpr_msb 0x4005283 ; GCN-NEXT: v_dual_mov_b32 v2, v3 /*v259*/ :: v_dual_add_f32 v3, v1 /*v257*/, v2 /*v258*/284 $vgpr2, $vgpr3 = V_DUAL_MOV_B32_e32_X_ADD_F32_e32_gfx1250 undef $vgpr259, undef $vgpr257, undef $vgpr258, implicit $exec, implicit $mode285 286 ; GCN-NEXT: s_set_vgpr_msb 0x544287 ; GCN-NEXT: v_dual_fmamk_f32 v244 /*v500*/, v0, 0xa, v44 /*v300*/ :: v_dual_fmac_f32 v3 /*v259*/, v1, v1 /*v257*/288 $vgpr500, $vgpr259 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32_gfx1250 undef $vgpr0, 10, undef $vgpr300, undef $vgpr1, undef $vgpr257, $vgpr259, implicit $mode, implicit $exec289 290 ; GCN-NEXT: s_set_vgpr_msb 0x4410291 ; GCN-NEXT: v_dual_fma_f32 v0, v6, v6, v44 /*v300*/ :: v_dual_fma_f32 v1, v4, v5, v45 /*v301*/292 $vgpr0, $vgpr1 = V_DUAL_FMA_F32_e64_X_FMA_F32_e64_e96_gfx1250 0, undef $vgpr6, 0, undef $vgpr6, 0, undef $vgpr300, 0, undef $vgpr4, 0, undef $vgpr5, 0, undef $vgpr301, implicit $mode, implicit $exec293 294 ; GCN-NEXT: s_set_vgpr_msb 0x1000295 ; GCN-NEXT: v_dual_fmac_f32 v2, v6, v6 :: v_dual_fma_f32 v3, v4, v5, v3296 $vgpr2, $vgpr3 = V_DUAL_FMAC_F32_e32_X_FMA_F32_e64_e96_gfx1250 0, undef $vgpr6, 0, undef $vgpr6, undef $vgpr2, 0, undef $vgpr4, 0, undef $vgpr5, 0, $vgpr3, implicit $mode, implicit $exec297 298 ; GCN-NEXT: s_set_vgpr_msb 64299 ; GCN-NEXT: v_dual_fma_f32 v244 /*v500*/, v6, v7, v8 :: v_dual_add_f32 v3 /*v259*/, v4, v5300 $vgpr500, $vgpr259 = V_DUAL_FMA_F32_e64_X_ADD_F32_e32_e96_gfx1250 0, undef $vgpr6, 0, undef $vgpr7, 0, undef $vgpr8, 0, undef $vgpr4, 0, undef $vgpr5, implicit $mode, implicit $exec301 302 ; GCN-NEXT: s_set_vgpr_msb 0x40ae303 ; GCN-NEXT: v_dual_fmac_f32 v2 /*v514*/, v6 /*v518*/, v8 /*v776*/ :: v_dual_fma_f32 v3 /*v515*/, v4 /*v516*/, v7 /*v775*/, v3 /*v515*/304 $vgpr514, $vgpr515 = V_DUAL_FMAC_F32_e32_X_FMA_F32_e64_e96_gfx1250 0, undef $vgpr518, 0, undef $vgpr776, undef $vgpr514, 0, undef $vgpr516, 0, undef $vgpr775, 0, $vgpr515, implicit $mode, implicit $exec305 306 ; ASM: NumVgprs: 777307 308...309 310# ASM-LABEL: {{^}}fmaak_fmamk:311# DIS-LABEL: <fmaak_fmamk>:312---313name: fmaak_fmamk314tracksRegLiveness: true315body: |316 bb.0:317 ; ASM: %bb.0:318 319 ; GCN-NEXT: s_set_vgpr_msb 0x45320 ; GCN-NEXT: v_fmaak_f32 v0 /*v256*/, v1 /*v257*/, v2 /*v258*/, 0x1321 $vgpr256 = V_FMAAK_F32 undef $vgpr257, undef $vgpr258, 1, implicit $exec, implicit $mode322 323 ; GCN-NEXT: s_set_vgpr_msb 0x4505324 ; GCN-NEXT: v_fmaak_f32 v0, v1 /*v257*/, v2 /*v258*/, 0x1325 $vgpr0 = V_FMAAK_F32 undef $vgpr257, undef $vgpr258, 1, implicit $exec, implicit $mode326 327 ; GCN-NEXT: s_set_vgpr_msb 0x541328 ; GCN-NEXT: v_fmaak_f32 v0 /*v256*/, v1 /*v257*/, v2, 0x1329 $vgpr256 = V_FMAAK_F32 undef $vgpr257, undef $vgpr2, 1, implicit $exec, implicit $mode330 331 ; GCN-NEXT: s_set_vgpr_msb 0x4144332 ; GCN-NEXT: v_fmaak_f32 v0 /*v256*/, v1, v2 /*v258*/, 0x1333 $vgpr256 = V_FMAAK_F32 undef $vgpr1, undef $vgpr258, 1, implicit $exec, implicit $mode334 335 ; GCN-NEXT: s_set_vgpr_msb 0x4451336 ; GCN-NEXT: v_fmamk_f32 v0 /*v256*/, v1 /*v257*/, 0x1, v2 /*v258*/337 $vgpr256 = V_FMAMK_F32 undef $vgpr257, 1, undef $vgpr258, implicit $exec, implicit $mode338 339 ; GCN-NEXT: s_set_vgpr_msb 0x5111340 ; GCN-NEXT: v_fmamk_f32 v0, v1 /*v257*/, 0x1, v2 /*v258*/341 $vgpr0 = V_FMAMK_F32 undef $vgpr257, 1, undef $vgpr258, implicit $exec, implicit $mode342 343 ; GCN-NEXT: s_set_vgpr_msb 0x1141344 ; GCN-NEXT: v_fmamk_f32 v0 /*v256*/, v1 /*v257*/, 0x1, v2345 $vgpr256 = V_FMAMK_F32 undef $vgpr257, 1, undef $vgpr2, implicit $exec, implicit $mode346 347 ; GCN-NEXT: s_set_vgpr_msb 0x4150348 ; GCN-NEXT: v_fmamk_f32 v0 /*v256*/, v1, 0x1, v2 /*v258*/349 $vgpr256 = V_FMAMK_F32 undef $vgpr1, 1, undef $vgpr258, implicit $exec, implicit $mode350 351 ; GCN-NEXT: s_set_vgpr_msb 0x5051352 ; GCN-NEXT: v_fmamk_f64 v[4:5] /*v[260:261]*/, v[100:101] /*v[356:357]*/, 0x1, v[2:3] /*v[258:259]*/353 $vgpr260_vgpr261 = V_FMAMK_F64 undef $vgpr356_vgpr357, 1, undef $vgpr258_vgpr259, implicit $exec, implicit $mode354 355 ; GCN-NEXT: s_set_vgpr_msb 0x5101356 ; GCN-NEXT: v_fmamk_f64 v[0:1], v[100:101] /*v[356:357]*/, 0x1, v[2:3]357 $vgpr0_vgpr1 = V_FMAMK_F64 undef $vgpr356_vgpr357, 1, undef $vgpr2_vgpr3, implicit $exec, implicit $mode358 359 ; GCN-NEXT: s_set_vgpr_msb 0x110360 ; GCN-NEXT: v_fmamk_f64 v[0:1], v[2:3], 0x1, v[100:101] /*v[356:357]*/361 $vgpr0_vgpr1 = V_FMAMK_F64 undef $vgpr2_vgpr3, 1, undef $vgpr356_vgpr357, implicit $exec, implicit $mode362 363 ; GCN-NEXT: s_set_vgpr_msb 0x1040364 ; GCN-NEXT: v_fmamk_f64 v[0:1] /*v[256:257]*/, v[2:3], 0x1, v[4:5]365 $vgpr256_vgpr257 = V_FMAMK_F64 undef $vgpr2_vgpr3, 1, undef $vgpr4_vgpr5, implicit $exec, implicit $mode366 367 ; GCN-NEXT: s_set_vgpr_msb 0x4000368 ; GCN-NEXT: v_fmamk_f16 v26, v56, 0x1, v58369 $vgpr26 = V_FMAMK_F16_fake16 undef $vgpr56, 1, undef $vgpr58, implicit $exec, implicit $mode370 371 ; GCN-NEXT: v_fmamk_f16 v0, v35, 0x1, v2372 $vgpr0 = V_FMAMK_F16_fake16 undef $vgpr35, 1, undef $vgpr2, implicit $exec, implicit $mode373 374 ; GCN-NEXT: v_fmamk_f16 v0, v2, 0x1, v6375 $vgpr0 = V_FMAMK_F16_fake16 undef $vgpr2, 1, undef $vgpr6, implicit $exec, implicit $mode376 377 ; GCN-NEXT: v_fmamk_f16 v5, v2, 0x1, v4378 $vgpr5 = V_FMAMK_F16_fake16 undef $vgpr2, 1, undef $vgpr4, implicit $exec, implicit $mode379 380 ; ASM: NumVgprs: 358381 382...383 384# ASM-LABEL: {{^}}fmac:385# DIS-LABEL: <fmac>:386---387name: fmac388tracksRegLiveness: true389body: |390 bb.0:391 ; ASM: %bb.0:392 393 ; Accumulation instructions apply DST to both the destination and one of the source VGPRs394 ; GCN-NEXT: s_set_vgpr_msb 64395 ; GCN-NEXT: v_fmac_f32_e64 v0 /*v256*/, |v0|, |v1| clamp mul:4396 $vgpr256 = V_FMAC_F32_e64 2, undef $vgpr0, 2, undef $vgpr1, 2, undef $vgpr256, 1, 2, implicit $mode, implicit $exec397 398 ; GCN-NEXT: v_fmac_f32_e32 v1 /*v257*/, v0, v1399 $vgpr257 = V_FMAC_F32_e32 undef $vgpr0, undef $vgpr1, undef $vgpr257, implicit $mode, implicit $exec400 401 ; ASM: NumVgprs: 258402 403...404 405# ASM-LABEL: {{^}}rev_opcodes:406# DIS-LABEL: <rev_opcodes>:407---408name: rev_opcodes409tracksRegLiveness: true410body: |411 bb.0:412 ; ASM: %bb.0:413 414 ; V_LSHLREV, V_SUBREV: SRC0 and SRC1 apply to the operands in the order in the ISA (before "reversing")415 ; e.g. v_lshlrev_b32 v0(vdst), v1(src0), v2(src1) // v0 = v2 << v1416 ; DST applies to V0, SRC0 applies to V1, and SRC1 applies to V2.417 418 ; GCN-NEXT: s_set_vgpr_msb 1419 ; GCN-NEXT: v_lshlrev_b32_e64 v0, v0 /*v256*/, v2420 $vgpr0 = V_LSHLREV_B32_e64 undef $vgpr256, undef $vgpr2, implicit $exec421 422 ; GCN-NEXT: s_set_vgpr_msb 0x104423 ; GCN-NEXT: v_lshlrev_b32_e64 v0, v1, v0 /*v256*/424 $vgpr0 = V_LSHLREV_B32_e64 undef $vgpr1, undef $vgpr256, implicit $exec425 426 ; GCN-NEXT: s_set_vgpr_msb 0x401427 ; GCN-NEXT: v_subrev_nc_u32_e32 v0, v0 /*v256*/, v2428 $vgpr0 = V_SUBREV_U32_e32 undef $vgpr256, undef $vgpr2, implicit $exec429 430 ; GCN-NEXT: s_set_vgpr_msb 0x104431 ; GCN-NEXT: v_subrev_nc_u32_e32 v0, v1, v0 /*v256*/432 $vgpr0 = V_SUBREV_U32_e32 undef $vgpr1, undef $vgpr256, implicit $exec433 434 ; ASM: NumVgprs: 257435...436 437# ASM-LABEL: {{^}}minimal_mode_change:438# DIS-LABEL: <minimal_mode_change>:439---440name: minimal_mode_change441tracksRegLiveness: true442body: |443 bb.0:444 ; ASM: %bb.0:445 446 ; GCN-NEXT: s_set_vgpr_msb 0x55447 ; GCN-NEXT: v_fma_f32 v3 /*v259*/, v4 /*v260*/, v5 /*v261*/, v6 /*v262*/448 $vgpr259 = V_FMA_F32_e64 0, undef $vgpr260, 0, undef $vgpr261, 0, undef $vgpr262, 0, 0, implicit $exec, implicit $mode449 450 ; GCN-NEXT: s_set_vgpr_msb 0x5500451 ; GCN-NEXT: v_add_nc_u32_e32 v0, v1, v2452 $vgpr0 = V_ADD_U32_e32 undef $vgpr1, undef $vgpr2, implicit $exec453 454 ; GCN-NEXT: v_mov_b32_e32 v0, v1455 $vgpr0 = V_MOV_B32_e32 undef $vgpr1, implicit $exec456 457 ; GCN-NEXT: s_set_vgpr_msb 64458 ; GCN-NEXT: v_mov_b32_e32 v3 /*v259*/, v1459 $vgpr259 = V_MOV_B32_e32 undef $vgpr1, implicit $exec460 461 ; GCN-NEXT: v_add_nc_u32_e32 v0 /*v256*/, v1, v2462 $vgpr256 = V_ADD_U32_e32 undef $vgpr1, undef $vgpr2, implicit $exec463 464 ; GCN-NEXT: s_set_vgpr_msb 0x4000465 ; GCN-NEXT: v_fma_f32 v3, v4, v5, s2466 $vgpr3 = V_FMA_F32_e64 0, undef $vgpr4, 0, undef $vgpr5, 0, undef $sgpr2, 0, 0, implicit $exec, implicit $mode467 468 ; GCN-NEXT: s_set_vgpr_msb 1469 ; GCN-NEXT: v_fma_f32 v3, v4 /*v260*/, v5, 1470 $vgpr3 = V_FMA_F32_e64 0, undef $vgpr260, 0, undef $vgpr5, 0, 1, 0, 0, implicit $exec, implicit $mode471 472 ; GCN-NEXT: s_set_vgpr_msb 0x104473 ; GCN-NEXT: v_mov_b32_e32 v0, v1474 $vgpr0 = V_MOV_B32_e32 undef $vgpr1, implicit $exec475 476 ; GCN-NEXT: v_add_nc_u32_e32 v2, v1, v3 /*v259*/477 $vgpr2 = V_ADD_U32_e32 undef $vgpr1, undef $vgpr259, implicit $exec478 479 ; GCN-NEXT: s_set_vgpr_msb 0x401480 ; GCN-NEXT: v_mov_b32_e32 v0, v0 /*v256*/481 ; GCN-NEXT: v_add_nc_u32_e32 v1, v1 /*v257*/, v1482 ; GCN-NEXT: s_set_vgpr_msb 0x105483 ; GCN-NEXT: v_add_nc_u32_e32 v2, v2 /*v258*/, v2 /*v258*/484 $vgpr0 = V_MOV_B32_e32 undef $vgpr256, implicit $exec485 $vgpr1 = V_ADD_U32_e32 undef $vgpr257, undef $vgpr1, implicit $exec486 $vgpr2 = V_ADD_U32_e32 undef $vgpr258, undef $vgpr258, implicit $exec487 488 ; ASM: NumVgprs: 263489 490...491 492# ASM-LABEL: {{^}}terminators:493# DIS-LABEL: <terminators>:494---495name: terminators496tracksRegLiveness: true497body: |498 bb.0:499 ; ASM: %bb.0:500 ; GCN-NEXT: s_nop 0501 ; GCN-NEXT: s_branch502 S_NOP 0503 S_BRANCH %bb.1504 505 ; No mode switch if it was zero506 507 bb.1:508 ; ASM: .LBB{{.*_1}}:509 ; GCN-NEXT: s_set_vgpr_msb 64510 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1511 ; GCN-NEXT: s_set_vgpr_msb 0x4000512 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec513 514 ; Reset on fallthrough block end515 516 bb.2:517 ; ASM-NEXT: %bb.2:518 ; GCN-NEXT: s_set_vgpr_msb 64519 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1520 ; GCN-NEXT: s_set_vgpr_msb 0x4000521 ; GCN-NEXT: s_branch522 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec523 S_BRANCH %bb.3524 525 ; Reset mode on terminator526 527 bb.3:528 ; ASM: .LBB{{.*_3}}:529 ; GCN-NEXT: s_set_vgpr_msb 64530 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1531 ; GCN-NEXT: s_set_vgpr_msb 0x4000532 ; GCN-NEXT: s_swap_pc_i64533 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec534 $exec = S_SWAPPC_B64 undef $sgpr0_sgpr1535 536 ; Reset mode before a call537 538 bb.4:539 ; ASM-NEXT: %bb.4:540 ; GCN-NEXT: s_set_vgpr_msb 64541 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1542 ; GCN-NEXT: s_endpgm543 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec544 S_ENDPGM 0545 546 ; No mode reset before S_ENDPGM547 548 bb.5:549 ; ASM-NEXT: %bb.5:550 ; GCN-NEXT: v_mov_b32_e32 v0, v1551 ; GCN-NEXT: s_set_vgpr_msb 64552 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1553 ; GCN-NEXT: s_set_vgpr_msb 0x4000554 ; GCN-NEXT: s_set_pc_i64555 $vgpr0 = V_MOV_B32_e32 undef $vgpr1, implicit $exec556 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec557 S_SETPC_B64 undef $sgpr0_sgpr1, implicit-def $exec558 559 ; Assume mode zero at block begin even if we did not reset if before560 ; Reset mode before branch561 562 bb.6:563 ; ASM-NEXT: %bb.6:564 ; GCN-NEXT: s_set_pc_i64565 S_SETPC_B64 undef $sgpr0_sgpr1, implicit-def $exec566 567 ; But do not reset mode before a branch if it was zero568 569 bb.7:570 ; ASM-NEXT: %bb.7:571 ; GCN-NEXT: s_set_vgpr_msb 64572 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1573 ; GCN-NEXT: s_set_vgpr_msb 0x4000574 ; ASM-NEXT: ; return to shader part epilog575 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec576 SI_RETURN_TO_EPILOG undef $vgpr0, implicit-def $exec577 578 ; Reset mode before returning from a call579 580 bb.8:581 ; ASM-NEXT: %bb.8:582 ; ASM-NEXT: ; return to shader part epilog583 SI_RETURN_TO_EPILOG undef $vgpr0, implicit-def $exec584 585 ; But do not reset mode before a call return if it was zero586 587 bb.9:588 ; ASM-NEXT: %bb.9:589 ; GCN-NEXT: s_set_vgpr_msb 64590 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1591 ; GCN-NEXT: s_set_vgpr_msb 0x4000592 ; GCN-NEXT: s_set_pc_i64593 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec594 S_SETPC_B64_return undef $sgpr0_sgpr1, implicit-def $exec595 596 ; ASM: NumVgprs: 257597...598 599# ASM-LABEL: {{^}}control_flow:600# DIS-LABEL: <control_flow>:601---602name: control_flow603tracksRegLiveness: true604body: |605 bb.0:606 ; ASM: %bb.0:607 ; GCN-NEXT: s_set_vgpr_msb 64608 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v0609 ; GCN-NEXT: s_set_vgpr_msb 0x4000610 $vgpr256 = V_MOV_B32_e32 undef $vgpr0, implicit $exec611 612 bb.1:613 ; ASM: .LBB{{[0-9]+}}_1:614 ; GCN-NEXT: s_set_vgpr_msb 64615 ; GCN-NEXT: v_mov_b32_e32 v1 /*v257*/, v1616 ; GCN-NEXT: s_set_vgpr_msb 0x4000617 ; GCN-NEXT: s_cbranch_scc0618 $vgpr257 = V_MOV_B32_e32 undef $vgpr1, implicit $exec619 S_CBRANCH_SCC0 %bb.1, undef implicit $scc620 621 bb.2:622 ; ASM: %bb.2:623 ; GCN-NEXT: s_set_vgpr_msb 64624 ; GCN-NEXT: v_mov_b32_e32 v2 /*v258*/, v2625 ; GCN-NEXT: s_endpgm626 $vgpr258 = V_MOV_B32_e32 undef $vgpr2, implicit $exec627 S_ENDPGM 0628...629 630# ASM-LABEL: {{^}}inline_asm:631# DIS-LABEL: <inline_asm>:632---633name: inline_asm634tracksRegLiveness: true635body: |636 bb.0:637 ; ASM: %bb.0:638 ; GCN-NEXT: s_set_vgpr_msb 64639 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1640 ; GCN-NEXT: s_set_vgpr_msb 0x4000641 ; ASM: def v0642 ; GCN-NOT: s_set_vgpr_msb643 ; ASM: use v0644 ; GCN-NOT: s_set_vgpr_msb645 ; ASM: use v1646 ; GCN: s_set_vgpr_msb 64647 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1648 ; GCN-NOT: s_set_vgpr_msb649 ; ASM: no vgprs, mode preserved650 ; GCN-NOT: s_set_vgpr_msb651 ; GCN: v_mov_b32_e32 v0 /*v256*/, v1652 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec653 INLINEASM &"; def v0", 1, 327690, def $vgpr0654 INLINEASM &"; use v0", 1, 327690, $vgpr0655 INLINEASM &"; use v1", 1, 327690, undef $vgpr1656 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec657 INLINEASM &"; no vgprs, mode preserved", 1, 327690, undef $sgpr0658 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec659 660 ; ASM: NumVgprs: 257661...662 663# ASM-LABEL: {{^}}bundle:664# DIS-LABEL: <bundle>:665---666name: bundle667tracksRegLiveness: true668body: |669 bb.0:670 ; ASM: %bb.0:671 ; GCN-NEXT: s_set_vgpr_msb 64672 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1673 ; GCN-NEXT: s_nop 0674 ; GCN-NEXT: s_set_vgpr_msb 0x4001675 ; GCN-NEXT: v_mov_b32_e32 v1, v0 /*v256*/676 BUNDLE implicit-def $vgpr256 {677 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec678 }679 BUNDLE implicit $vgpr256 {680 S_NOP 0681 $vgpr1 = V_MOV_B32_e32 $vgpr256, implicit $exec682 }683 684 ; ASM: NumVgprs: 257685...686 687# ASM-LABEL: {{^}}hard_clauses:688# DIS-LABEL: <hard_clauses>:689---690name: hard_clauses691tracksRegLiveness: true692body: |693 bb.0:694 ; ASM: %bb.0:695 696 ; s_set_vgpr_msb cannot be a first instruction in a clause and must be placed before it.697 698 ; GCN-NEXT: s_set_vgpr_msb 64699 ; GCN-NEXT: s_clause 0x2700 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1701 ; GCN-NEXT: v_mov_b32_e32 v1 /*v257*/, v1702 ; GCN-NEXT: v_mov_b32_e32 v2 /*v258*/, v1703 BUNDLE implicit-def $vgpr256, implicit-def $vgpr257, implicit-def $vgpr248, implicit undef $vgpr1 {704 S_CLAUSE 2705 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec706 $vgpr257 = V_MOV_B32_e32 undef $vgpr1, implicit $exec707 $vgpr258 = V_MOV_B32_e32 undef $vgpr1, implicit $exec708 }709 710 ; S_CLAUSE 515 means 4 instructions broken in groups of 2.711 ; A mode change cannot be a first instruction of each group.712 ; If we cannot insert a mode change right before the clause just drop it.713 714 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1715 ; GCN-NEXT: v_mov_b32_e32 v1 /*v257*/, v1716 ; GCN-NEXT: s_set_vgpr_msb 0x4000717 ; GCN-NEXT: v_mov_b32_e32 v2, v1718 ; GCN-NEXT: v_mov_b32_e32 v3, v1719 BUNDLE implicit-def $vgpr256, implicit-def $vgpr257, implicit-def $vgpr2, implicit-def $vgpr3, implicit undef $vgpr1 {720 S_CLAUSE 515721 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec722 $vgpr257 = V_MOV_B32_e32 undef $vgpr1, implicit $exec723 $vgpr2 = V_MOV_B32_e32 undef $vgpr1, implicit $exec724 $vgpr3 = V_MOV_B32_e32 undef $vgpr1, implicit $exec725 }726 727 ; Check that we properly update the clause length.728 729 ; GCN-NEXT: s_clause 0x3730 ; GCN-NEXT: v_mov_b32_e32 v0, v1731 ; GCN-NEXT: s_set_vgpr_msb 64732 ; GCN-NEXT: v_mov_b32_e32 v1 /*v257*/, v1733 ; GCN-NEXT: v_mov_b32_e32 v2 /*v258*/, v1734 BUNDLE implicit-def $vgpr0, implicit-def $vgpr257, implicit-def $vgpr248, implicit undef $vgpr1 {735 S_CLAUSE 2736 $vgpr0 = V_MOV_B32_e32 undef $vgpr1, implicit $exec737 $vgpr257 = V_MOV_B32_e32 undef $vgpr1, implicit $exec738 $vgpr258 = V_MOV_B32_e32 undef $vgpr1, implicit $exec739 }740 741 ; Check that we do not exceed the limit of 63 instructions or simm16 value of 62.742 743 ; GCN-NEXT: s_clause 0x3e744 ; GCN-NEXT: v_mov_b32_e32 v0 /*v256*/, v1745 ; GCN-NEXT: s_set_vgpr_msb 0x4000746 ; GCN-NEXT: v_mov_b32_e32 v1, v1747 ; GCN-NEXT: v_mov_b32_e32 v2, v1748 ; GCN-COUNT-60: v_mov_b32_e32 v1, v1749 BUNDLE implicit-def $vgpr256, implicit-def $vgpr1, implicit-def $vgpr2, implicit undef $vgpr1 {750 S_CLAUSE 62751 $vgpr256 = V_MOV_B32_e32 undef $vgpr1, implicit $exec752 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec753 $vgpr2 = V_MOV_B32_e32 undef $vgpr1, implicit $exec754 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec755 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec756 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec757 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec758 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec759 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec760 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec761 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec762 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec763 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec764 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec765 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec766 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec767 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec768 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec769 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec770 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec771 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec772 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec773 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec774 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec775 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec776 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec777 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec778 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec779 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec780 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec781 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec782 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec783 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec784 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec785 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec786 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec787 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec788 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec789 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec790 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec791 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec792 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec793 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec794 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec795 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec796 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec797 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec798 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec799 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec800 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec801 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec802 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec803 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec804 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec805 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec806 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec807 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec808 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec809 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec810 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec811 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec812 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec813 $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec814 }815 816 ; ASM: NumVgprs: 259817...818 819# ASM-LABEL: {{^}}pseudo:820# DIS-LABEL: <pseudo>:821---822name: pseudo823body: |824 bb.0:825 liveins: $vgpr0826 827 $sgpr0 = SI_ILLEGAL_COPY killed $vgpr0, implicit-def $exec, implicit-def $vcc, implicit $exec828 ; Just do not assert here.829 ; ASM: illegal copy v0 to s0830 SI_RETURN_TO_EPILOG killed $sgpr0831 S_ENDPGM 0832...833 834# LD_SCALE operands ignores MSB and always use low 256 VGPRs.835 836# ASM-LABEL: {{^}}ld_scale:837# DIS-LABEL: <ld_scale>:838---839name: ld_scale840tracksRegLiveness: true841body: |842 bb.0:843 ; ASM: %bb.0:844 845 ; GCN: s_set_vgpr_msb 5846 ; GCN-NEXT: v_add_nc_u32_e32 v0, v253 /*v509*/, v252 /*v508*/847 $vgpr0 = V_ADD_U32_e32 undef $vgpr509, undef $vgpr508, implicit $exec848 849 ; Do not change mode for LD_SCALE.850 851 ; GCN-NOT: s_set_vgpr_msb852 ; GCN-NEXT: v_wmma_ld_scale_paired_b32 v1, v2853 V_WMMA_LD_SCALE_PAIRED_B32 undef $vgpr1, undef $vgpr2, 0, 0, 0, 0, 0, 0, implicit $exec854 855 ; GCN-NOT: s_set_vgpr_msb856 ; GCN-NEXT: v_wmma_scale_f32_16x16x128_f8f6f4 v[210:217], v[244:259] /*v[500:515]*/, v[244:259] /*v[500:515]*/, v[10:17], v1, v2857 $vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217 = V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr undef $vgpr500_vgpr501_vgpr502_vgpr503_vgpr504_vgpr505_vgpr506_vgpr507_vgpr508_vgpr509_vgpr510_vgpr511_vgpr512_vgpr513_vgpr514_vgpr515, undef $vgpr500_vgpr501_vgpr502_vgpr503_vgpr504_vgpr505_vgpr506_vgpr507_vgpr508_vgpr509_vgpr510_vgpr511_vgpr512_vgpr513_vgpr514_vgpr515, 0, undef $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17, undef $vgpr1, undef $vgpr2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec858 859 ; GCN-NEXT: s_set_vgpr_msb 0x500860 ; GCN-NEXT: v_wmma_scale_f32_16x16x128_f8f6f4 v[210:217], v[100:115], v[100:115], v[10:17], v1, v2861 $vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217 = V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr undef $vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115, undef $vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115, 0, undef $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17, undef $vgpr1, undef $vgpr2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec862 863 ; GCN-NEXT: s_set_vgpr_msb 1864 ; GCN-NEXT: v_wmma_scale_f32_16x16x128_f8f6f4 v[210:217], v[244:259] /*v[500:515]*/, v[0:15], v[10:17], v1, v2865 $vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217 = V_WMMA_SCALE_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr undef $vgpr500_vgpr501_vgpr502_vgpr503_vgpr504_vgpr505_vgpr506_vgpr507_vgpr508_vgpr509_vgpr510_vgpr511_vgpr512_vgpr513_vgpr514_vgpr515, undef $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, 0, undef $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17, undef $vgpr1, undef $vgpr2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec866 867 ; GCN-NOT: s_set_vgpr_msb868 ; GCN-NEXT: v_wmma_ld_scale16_paired_b64 v[0:1], v[2:3]869 V_WMMA_LD_SCALE16_PAIRED_B64 undef $vgpr0_vgpr1, undef $vgpr2_vgpr3, 0, 0, 0, 0, 0, 0, implicit $exec870 871 ; GCN-NEXT: s_set_vgpr_msb 0x105872 ; GCN-NEXT: v_wmma_scale16_f32_16x16x128_f8f6f4 v[210:217], v[244:259] /*v[500:515]*/, v[244:259] /*v[500:515]*/, v[10:17], v[0:1], v[2:3]873 $vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217 = V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr undef $vgpr500_vgpr501_vgpr502_vgpr503_vgpr504_vgpr505_vgpr506_vgpr507_vgpr508_vgpr509_vgpr510_vgpr511_vgpr512_vgpr513_vgpr514_vgpr515, undef $vgpr500_vgpr501_vgpr502_vgpr503_vgpr504_vgpr505_vgpr506_vgpr507_vgpr508_vgpr509_vgpr510_vgpr511_vgpr512_vgpr513_vgpr514_vgpr515, 0, undef $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17, undef $vgpr0_vgpr1, undef $vgpr2_vgpr3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec874 875 ; GCN-NEXT: s_set_vgpr_msb 0x500876 ; GCN-NEXT: v_wmma_scale16_f32_16x16x128_f8f6f4 v[210:217], v[100:115], v[100:115], v[10:17], v[0:1], v[2:3]877 $vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217 = V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr undef $vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115, undef $vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115, 0, undef $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17, undef $vgpr0_vgpr1, undef $vgpr2_vgpr3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec878 879 ; GCN-NEXT: s_set_vgpr_msb 1880 ; GCN-NEXT: v_wmma_scale16_f32_16x16x128_f8f6f4 v[210:217], v[244:259] /*v[500:515]*/, v[0:15], v[10:17], v[0:1], v[2:3]881 $vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217 = V_WMMA_SCALE16_F32_16X16X128_F8F6F4_f8_f8_w32_threeaddr undef $vgpr500_vgpr501_vgpr502_vgpr503_vgpr504_vgpr505_vgpr506_vgpr507_vgpr508_vgpr509_vgpr510_vgpr511_vgpr512_vgpr513_vgpr514_vgpr515, undef $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, 0, undef $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17, undef $vgpr0_vgpr1, undef $vgpr2_vgpr3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec882...883