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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -run-pass=register-coalescer -o - %s | FileCheck %s3 4---5name: test_remat_v_pk_mov_b326tracksRegLiveness: true7body: |8 ; CHECK-LABEL: name: test_remat_v_pk_mov_b329 ; CHECK: bb.0:10 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)11 ; CHECK-NEXT: liveins: $sgpr012 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 8, 0, 8, 0, 0, 0, 0, 0, 0, implicit $exec14 ; CHECK-NEXT: [[V_PK_MOV_B32_1:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 8, 0, 8, 0, 0, 0, 0, 0, 0, implicit $exec15 ; CHECK-NEXT: [[V_PK_MOV_B32_2:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 8, 0, 8, 0, 0, 0, 0, 0, 0, implicit $exec16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr017 ; CHECK-NEXT: $exec = S_MOV_B64_term [[COPY]]18 ; CHECK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec19 ; CHECK-NEXT: S_BRANCH %bb.120 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: bb.1:22 ; CHECK-NEXT: successors: %bb.2(0x80000000)23 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: [[V_PK_MOV_B32_1:%[0-9]+]]:vreg_64_align2 = V_PK_ADD_F32 8, [[V_PK_MOV_B32_1]], 8, [[V_PK_MOV_B32_1]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec25 ; CHECK-NEXT: [[V_PK_MOV_B32_2:%[0-9]+]]:vreg_64_align2 = V_PK_ADD_F32 8, [[V_PK_MOV_B32_2]], 8, [[V_PK_MOV_B32_2]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec26 ; CHECK-NEXT: {{ $}}27 ; CHECK-NEXT: bb.2:28 ; CHECK-NEXT: S_NOP 0, implicit [[V_PK_MOV_B32_1]]29 ; CHECK-NEXT: S_NOP 0, implicit [[V_PK_MOV_B32_2]]30 ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_PK_MOV_B32_]]31 bb.0:32 liveins: $sgpr033 %0:vreg_64_align2 = V_PK_MOV_B32 8, 0, 8, 0, 0, 0, 0, 0, 0, implicit $exec34 %1:vreg_64_align2 = COPY %0:vreg_64_align235 %2:vreg_64_align2 = COPY %0:vreg_64_align236 %3:sreg_64 = COPY $sgpr037 $exec = S_MOV_B64_term %3:sreg_6438 S_CBRANCH_EXECZ %bb.2, implicit $exec39 S_BRANCH %bb.140 41 bb.1:42 %1:vreg_64_align2 = V_PK_ADD_F32 8, %1, 8, %1, 11, 0, 0, 0, 0, implicit $mode, implicit $exec43 %2:vreg_64_align2 = V_PK_ADD_F32 8, %2, 8, %2, 11, 0, 0, 0, 0, implicit $mode, implicit $exec44 45 bb.2:46 S_NOP 0, implicit %147 S_NOP 0, implicit %248 S_ENDPGM 0, implicit %049...50