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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck --check-prefix=GFX942 %s3 4define amdgpu_kernel void @v3i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {5; GFX942-LABEL: v3i8_liveout:6; GFX942: ; %bb.0: ; %entry7; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x248; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x349; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v010; GFX942-NEXT: v_lshlrev_b32_e32 v1, 2, v011; GFX942-NEXT: v_mov_b32_e32 v2, 812; GFX942-NEXT: s_waitcnt lgkmcnt(0)13; GFX942-NEXT: global_load_dword v3, v1, s[0:1]14; GFX942-NEXT: s_mov_b32 s4, 0xff000015; GFX942-NEXT: v_mov_b32_e32 v1, 016; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v017; GFX942-NEXT: s_waitcnt vmcnt(0)18; GFX942-NEXT: v_lshrrev_b32_sdwa v4, v2, v3 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD19; GFX942-NEXT: s_nop 020; GFX942-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD21; GFX942-NEXT: v_and_b32_e32 v4, 0xffff, v422; GFX942-NEXT: v_and_or_b32 v3, v3, s4, v423; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc24; GFX942-NEXT: s_cbranch_execz .LBB0_225; GFX942-NEXT: ; %bb.1: ; %bb.126; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v027; GFX942-NEXT: global_load_dword v0, v0, s[2:3]28; GFX942-NEXT: s_waitcnt vmcnt(0)29; GFX942-NEXT: v_lshrrev_b32_sdwa v2, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD30; GFX942-NEXT: s_nop 031; GFX942-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD32; GFX942-NEXT: v_and_b32_e32 v2, 0xffff, v233; GFX942-NEXT: v_and_or_b32 v3, v0, s4, v234; GFX942-NEXT: .LBB0_2: ; %bb.235; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]36; GFX942-NEXT: global_store_byte_d16_hi v1, v3, s[6:7] offset:237; GFX942-NEXT: global_store_short v1, v3, s[6:7]38; GFX942-NEXT: s_endpgm39entry:40 %idx = call i32 @llvm.amdgcn.workitem.id.x()41 %gep1 = getelementptr <3 x i8>, ptr addrspace(1) %src1, i32 %idx42 %vec1 = load <3 x i8>, ptr addrspace(1) %gep143 %gep2 = getelementptr <3 x i8>, ptr addrspace(1) %src2, i32 %idx44 %vec2 = load <3 x i8>, ptr addrspace(1) %gep245 %cmp = icmp ult i32 %idx, 1546 br i1 %cmp, label %bb.1, label %bb.247bb.1:48 br label %bb.249 50bb.2:51 %tmp5 = phi <3 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]52 store <3 x i8> %tmp5, ptr addrspace(1) %dst, align 453 ret void54}55 56define amdgpu_kernel void @v4i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {57; GFX942-LABEL: v4i8_liveout:58; GFX942: ; %bb.0: ; %entry59; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2460; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3461; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v062; GFX942-NEXT: v_lshlrev_b32_e32 v1, 2, v063; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v064; GFX942-NEXT: s_waitcnt lgkmcnt(0)65; GFX942-NEXT: global_load_dword v2, v1, s[0:1]66; GFX942-NEXT: v_mov_b32_e32 v1, 067; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc68; GFX942-NEXT: s_cbranch_execz .LBB1_269; GFX942-NEXT: ; %bb.1: ; %bb.170; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v071; GFX942-NEXT: global_load_dword v2, v0, s[2:3]72; GFX942-NEXT: .LBB1_2: ; %bb.273; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]74; GFX942-NEXT: s_waitcnt vmcnt(0)75; GFX942-NEXT: global_store_dword v1, v2, s[6:7]76; GFX942-NEXT: s_endpgm77entry:78 %idx = call i32 @llvm.amdgcn.workitem.id.x()79 %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx80 %vec1 = load <4 x i8>, ptr addrspace(1) %gep181 %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx82 %vec2 = load <4 x i8>, ptr addrspace(1) %gep283 %cmp = icmp ult i32 %idx, 1584 br i1 %cmp, label %bb.1, label %bb.285bb.1:86 br label %bb.287 88bb.2:89 %tmp5 = phi <4 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]90 store <4 x i8> %tmp5, ptr addrspace(1) %dst, align 491 ret void92}93 94define amdgpu_kernel void @v5i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {95; GFX942-LABEL: v5i8_liveout:96; GFX942: ; %bb.0: ; %entry97; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2498; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3499; GFX942-NEXT: v_and_b32_e32 v2, 0x3ff, v0100; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v2101; GFX942-NEXT: v_mov_b32_e32 v3, 0102; GFX942-NEXT: s_waitcnt lgkmcnt(0)103; GFX942-NEXT: global_load_dwordx2 v[0:1], v0, s[0:1]104; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v2105; GFX942-NEXT: s_waitcnt vmcnt(0)106; GFX942-NEXT: v_and_b32_e32 v1, 0xff, v1107; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc108; GFX942-NEXT: s_cbranch_execz .LBB2_2109; GFX942-NEXT: ; %bb.1: ; %bb.1110; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v2111; GFX942-NEXT: global_load_dwordx2 v[0:1], v0, s[2:3]112; GFX942-NEXT: s_waitcnt vmcnt(0)113; GFX942-NEXT: v_and_b32_e32 v1, 0xff, v1114; GFX942-NEXT: .LBB2_2: ; %bb.2115; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]116; GFX942-NEXT: global_store_byte v3, v1, s[6:7] offset:4117; GFX942-NEXT: global_store_dword v3, v0, s[6:7]118; GFX942-NEXT: s_endpgm119entry:120 %idx = call i32 @llvm.amdgcn.workitem.id.x()121 %gep1 = getelementptr <5 x i8>, ptr addrspace(1) %src1, i32 %idx122 %vec1 = load <5 x i8>, ptr addrspace(1) %gep1123 %gep2 = getelementptr <5 x i8>, ptr addrspace(1) %src2, i32 %idx124 %vec2 = load <5 x i8>, ptr addrspace(1) %gep2125 %cmp = icmp ult i32 %idx, 15126 br i1 %cmp, label %bb.1, label %bb.2127bb.1:128 br label %bb.2129 130bb.2:131 %tmp5 = phi <5 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]132 store <5 x i8> %tmp5, ptr addrspace(1) %dst, align 4133 ret void134}135 136define amdgpu_kernel void @v8i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {137; GFX942-LABEL: v8i8_liveout:138; GFX942: ; %bb.0: ; %entry139; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24140; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34141; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0142; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0143; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0144; GFX942-NEXT: s_waitcnt lgkmcnt(0)145; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[0:1]146; GFX942-NEXT: v_mov_b32_e32 v1, 0147; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc148; GFX942-NEXT: s_cbranch_execz .LBB3_2149; GFX942-NEXT: ; %bb.1: ; %bb.1150; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v0151; GFX942-NEXT: global_load_dwordx2 v[2:3], v0, s[2:3]152; GFX942-NEXT: .LBB3_2: ; %bb.2153; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]154; GFX942-NEXT: s_waitcnt vmcnt(0)155; GFX942-NEXT: global_store_dwordx2 v1, v[2:3], s[6:7]156; GFX942-NEXT: s_endpgm157entry:158 %idx = call i32 @llvm.amdgcn.workitem.id.x()159 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx160 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1161 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx162 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2163 %cmp = icmp ult i32 %idx, 15164 br i1 %cmp, label %bb.1, label %bb.2165bb.1:166 br label %bb.2167 168bb.2:169 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]170 store <8 x i8> %tmp5, ptr addrspace(1) %dst, align 4171 ret void172}173 174define amdgpu_kernel void @v16i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {175; GFX942-LABEL: v16i8_liveout:176; GFX942: ; %bb.0: ; %entry177; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24178; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34179; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0180; GFX942-NEXT: v_lshlrev_b32_e32 v1, 4, v0181; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0182; GFX942-NEXT: s_waitcnt lgkmcnt(0)183; GFX942-NEXT: global_load_dwordx4 v[2:5], v1, s[0:1]184; GFX942-NEXT: v_mov_b32_e32 v1, 0185; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc186; GFX942-NEXT: s_cbranch_execz .LBB4_2187; GFX942-NEXT: ; %bb.1: ; %bb.1188; GFX942-NEXT: v_lshlrev_b32_e32 v0, 4, v0189; GFX942-NEXT: global_load_dwordx4 v[2:5], v0, s[2:3]190; GFX942-NEXT: .LBB4_2: ; %bb.2191; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]192; GFX942-NEXT: s_waitcnt vmcnt(0)193; GFX942-NEXT: global_store_dwordx4 v1, v[2:5], s[6:7]194; GFX942-NEXT: s_endpgm195entry:196 %idx = call i32 @llvm.amdgcn.workitem.id.x()197 %gep1 = getelementptr <16 x i8>, ptr addrspace(1) %src1, i32 %idx198 %vec1 = load <16 x i8>, ptr addrspace(1) %gep1199 %gep2 = getelementptr <16 x i8>, ptr addrspace(1) %src2, i32 %idx200 %vec2 = load <16 x i8>, ptr addrspace(1) %gep2201 %cmp = icmp ult i32 %idx, 15202 br i1 %cmp, label %bb.1, label %bb.2203bb.1:204 br label %bb.2205 206bb.2:207 %tmp5 = phi <16 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]208 store <16 x i8> %tmp5, ptr addrspace(1) %dst, align 4209 ret void210}211 212define amdgpu_kernel void @v32i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {213; GFX942-LABEL: v32i8_liveout:214; GFX942: ; %bb.0: ; %entry215; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24216; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34217; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0218; GFX942-NEXT: v_lshlrev_b32_e32 v1, 5, v0219; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0220; GFX942-NEXT: s_waitcnt lgkmcnt(0)221; GFX942-NEXT: global_load_dwordx4 v[6:9], v1, s[0:1] offset:16222; GFX942-NEXT: global_load_dwordx4 v[2:5], v1, s[0:1]223; GFX942-NEXT: v_mov_b32_e32 v1, 0224; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc225; GFX942-NEXT: s_cbranch_execz .LBB5_2226; GFX942-NEXT: ; %bb.1: ; %bb.1227; GFX942-NEXT: v_lshlrev_b32_e32 v0, 5, v0228; GFX942-NEXT: global_load_dwordx4 v[6:9], v0, s[2:3] offset:16229; GFX942-NEXT: global_load_dwordx4 v[2:5], v0, s[2:3]230; GFX942-NEXT: .LBB5_2: ; %bb.2231; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]232; GFX942-NEXT: s_waitcnt vmcnt(1)233; GFX942-NEXT: global_store_dwordx4 v1, v[6:9], s[6:7] offset:16234; GFX942-NEXT: s_waitcnt vmcnt(1)235; GFX942-NEXT: global_store_dwordx4 v1, v[2:5], s[6:7]236; GFX942-NEXT: s_endpgm237entry:238 %idx = call i32 @llvm.amdgcn.workitem.id.x()239 %gep1 = getelementptr <32 x i8>, ptr addrspace(1) %src1, i32 %idx240 %vec1 = load <32 x i8>, ptr addrspace(1) %gep1241 %gep2 = getelementptr <32 x i8>, ptr addrspace(1) %src2, i32 %idx242 %vec2 = load <32 x i8>, ptr addrspace(1) %gep2243 %cmp = icmp ult i32 %idx, 15244 br i1 %cmp, label %bb.1, label %bb.2245bb.1:246 br label %bb.2247 248bb.2:249 %tmp5 = phi <32 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]250 store <32 x i8> %tmp5, ptr addrspace(1) %dst, align 4251 ret void252}253 254define amdgpu_kernel void @v256i8_liveout(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {255; GFX942-LABEL: v256i8_liveout:256; GFX942: ; %bb.0: ; %entry257; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24258; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34259; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0260; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0261; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0262; GFX942-NEXT: s_waitcnt lgkmcnt(0)263; GFX942-NEXT: global_load_dwordx4 v[30:33], v1, s[0:1] offset:240264; GFX942-NEXT: global_load_dwordx4 v[26:29], v1, s[0:1] offset:224265; GFX942-NEXT: global_load_dwordx4 v[22:25], v1, s[0:1] offset:208266; GFX942-NEXT: global_load_dwordx4 v[18:21], v1, s[0:1] offset:192267; GFX942-NEXT: global_load_dwordx4 v[14:17], v1, s[0:1] offset:176268; GFX942-NEXT: global_load_dwordx4 v[10:13], v1, s[0:1] offset:160269; GFX942-NEXT: global_load_dwordx4 v[6:9], v1, s[0:1] offset:144270; GFX942-NEXT: global_load_dwordx4 v[2:5], v1, s[0:1] offset:128271; GFX942-NEXT: global_load_dwordx4 a[0:3], v1, s[0:1] offset:112272; GFX942-NEXT: global_load_dwordx4 v[58:61], v1, s[0:1] offset:96273; GFX942-NEXT: global_load_dwordx4 v[54:57], v1, s[0:1] offset:80274; GFX942-NEXT: global_load_dwordx4 v[50:53], v1, s[0:1] offset:64275; GFX942-NEXT: global_load_dwordx4 v[46:49], v1, s[0:1] offset:48276; GFX942-NEXT: global_load_dwordx4 v[42:45], v1, s[0:1] offset:32277; GFX942-NEXT: global_load_dwordx4 v[38:41], v1, s[0:1] offset:16278; GFX942-NEXT: global_load_dwordx4 v[34:37], v1, s[0:1]279; GFX942-NEXT: v_mov_b32_e32 v1, 0280; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc281; GFX942-NEXT: s_cbranch_execz .LBB6_2282; GFX942-NEXT: ; %bb.1: ; %bb.1283; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v0284; GFX942-NEXT: global_load_dwordx4 v[30:33], v0, s[2:3] offset:240285; GFX942-NEXT: global_load_dwordx4 v[26:29], v0, s[2:3] offset:224286; GFX942-NEXT: global_load_dwordx4 v[22:25], v0, s[2:3] offset:208287; GFX942-NEXT: global_load_dwordx4 v[18:21], v0, s[2:3] offset:192288; GFX942-NEXT: global_load_dwordx4 v[14:17], v0, s[2:3] offset:176289; GFX942-NEXT: global_load_dwordx4 v[10:13], v0, s[2:3] offset:160290; GFX942-NEXT: global_load_dwordx4 v[6:9], v0, s[2:3] offset:144291; GFX942-NEXT: global_load_dwordx4 v[2:5], v0, s[2:3] offset:128292; GFX942-NEXT: global_load_dwordx4 a[0:3], v0, s[2:3] offset:112293; GFX942-NEXT: global_load_dwordx4 v[58:61], v0, s[2:3] offset:96294; GFX942-NEXT: global_load_dwordx4 v[54:57], v0, s[2:3] offset:80295; GFX942-NEXT: global_load_dwordx4 v[50:53], v0, s[2:3] offset:64296; GFX942-NEXT: global_load_dwordx4 v[46:49], v0, s[2:3] offset:48297; GFX942-NEXT: global_load_dwordx4 v[42:45], v0, s[2:3] offset:32298; GFX942-NEXT: global_load_dwordx4 v[38:41], v0, s[2:3] offset:16299; GFX942-NEXT: global_load_dwordx4 v[34:37], v0, s[2:3]300; GFX942-NEXT: .LBB6_2: ; %bb.2301; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]302; GFX942-NEXT: s_waitcnt vmcnt(7)303; GFX942-NEXT: global_store_dwordx4 v1, a[0:3], s[6:7] offset:112304; GFX942-NEXT: s_waitcnt vmcnt(7)305; GFX942-NEXT: global_store_dwordx4 v1, v[58:61], s[6:7] offset:96306; GFX942-NEXT: s_waitcnt vmcnt(7)307; GFX942-NEXT: global_store_dwordx4 v1, v[54:57], s[6:7] offset:80308; GFX942-NEXT: s_waitcnt vmcnt(7)309; GFX942-NEXT: global_store_dwordx4 v1, v[50:53], s[6:7] offset:64310; GFX942-NEXT: s_waitcnt vmcnt(7)311; GFX942-NEXT: global_store_dwordx4 v1, v[46:49], s[6:7] offset:48312; GFX942-NEXT: s_waitcnt vmcnt(7)313; GFX942-NEXT: global_store_dwordx4 v1, v[42:45], s[6:7] offset:32314; GFX942-NEXT: s_waitcnt vmcnt(7)315; GFX942-NEXT: global_store_dwordx4 v1, v[38:41], s[6:7] offset:16316; GFX942-NEXT: s_waitcnt vmcnt(7)317; GFX942-NEXT: global_store_dwordx4 v1, v[34:37], s[6:7]318; GFX942-NEXT: global_store_dwordx4 v1, v[30:33], s[6:7] offset:240319; GFX942-NEXT: global_store_dwordx4 v1, v[26:29], s[6:7] offset:224320; GFX942-NEXT: global_store_dwordx4 v1, v[22:25], s[6:7] offset:208321; GFX942-NEXT: global_store_dwordx4 v1, v[18:21], s[6:7] offset:192322; GFX942-NEXT: global_store_dwordx4 v1, v[14:17], s[6:7] offset:176323; GFX942-NEXT: global_store_dwordx4 v1, v[10:13], s[6:7] offset:160324; GFX942-NEXT: global_store_dwordx4 v1, v[6:9], s[6:7] offset:144325; GFX942-NEXT: global_store_dwordx4 v1, v[2:5], s[6:7] offset:128326; GFX942-NEXT: s_endpgm327entry:328 %idx = call i32 @llvm.amdgcn.workitem.id.x()329 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx330 %vec1 = load <256 x i8>, ptr addrspace(1) %gep1331 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx332 %vec2 = load <256 x i8>, ptr addrspace(1) %gep2333 %cmp = icmp ult i32 %idx, 15334 br i1 %cmp, label %bb.1, label %bb.2335bb.1:336 br label %bb.2337 338bb.2:339 %tmp5 = phi <256 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]340 store <256 x i8> %tmp5, ptr addrspace(1) %dst, align 4341 ret void342}343 344define amdgpu_kernel void @repeat_successor(i32 %in, ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {345; GFX942-LABEL: repeat_successor:346; GFX942: ; %bb.0: ; %entry347; GFX942-NEXT: s_load_dword s8, s[4:5], 0x24348; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c349; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x3c350; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0351; GFX942-NEXT: s_waitcnt lgkmcnt(0)352; GFX942-NEXT: s_cmp_lt_i32 s8, 3353; GFX942-NEXT: s_cbranch_scc0 .LBB7_3354; GFX942-NEXT: ; %bb.1: ; %LeafBlock355; GFX942-NEXT: s_cmp_gt_i32 s8, 0356; GFX942-NEXT: s_cbranch_scc0 .LBB7_6357; GFX942-NEXT: ; %bb.2:358; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v0359; GFX942-NEXT: global_load_dword v0, v0, s[0:1]360; GFX942-NEXT: s_branch .LBB7_5361; GFX942-NEXT: .LBB7_3: ; %LeafBlock5362; GFX942-NEXT: s_cmp_eq_u32 s8, 3363; GFX942-NEXT: s_cbranch_scc0 .LBB7_6364; GFX942-NEXT: ; %bb.4: ; %sw.bb5365; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v0366; GFX942-NEXT: global_load_dword v0, v0, s[2:3]367; GFX942-NEXT: .LBB7_5: ; %return.sink.split368; GFX942-NEXT: v_mov_b32_e32 v1, 0369; GFX942-NEXT: s_waitcnt vmcnt(0)370; GFX942-NEXT: global_store_dword v1, v0, s[6:7]371; GFX942-NEXT: .LBB7_6: ; %return372; GFX942-NEXT: s_endpgm373entry:374 %idx = call i32 @llvm.amdgcn.workitem.id.x()375 %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %src1, i32 %idx376 %vec1 = load <4 x i8>, ptr addrspace(1) %gep1377 %gep2 = getelementptr <4 x i8>, ptr addrspace(1) %src2, i32 %idx378 %vec2 = load <4 x i8>, ptr addrspace(1) %gep2379 switch i32 %in, label %return [380 i32 1, label %return.sink.split381 i32 2, label %return.sink.split382 i32 3, label %sw.bb5383 ]384 385sw.bb5:386 br label %return.sink.split387 388return.sink.split:389 %tmp5 = phi <4 x i8> [ %vec2, %sw.bb5 ], [ %vec1, %entry ], [ %vec1, %entry ]390 store <4 x i8> %tmp5, ptr addrspace(1) %dst, align 4391 ret void392 393return:394 ret void395}396 397define amdgpu_kernel void @v8i8_phi_chain(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst0, ptr addrspace(1) nocapture %dst1) {398; GFX942-LABEL: v8i8_phi_chain:399; GFX942: ; %bb.0: ; %entry400; GFX942-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24401; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0402; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0403; GFX942-NEXT: v_cmp_lt_u32_e64 s[0:1], 14, v0404; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0405; GFX942-NEXT: s_waitcnt lgkmcnt(0)406; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[8:9]407; GFX942-NEXT: s_and_saveexec_b64 s[2:3], vcc408; GFX942-NEXT: s_cbranch_execz .LBB8_2409; GFX942-NEXT: ; %bb.1: ; %bb.1410; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0411; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[10:11]412; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 7, v0413; GFX942-NEXT: s_andn2_b64 s[0:1], s[0:1], exec414; GFX942-NEXT: s_and_b64 s[4:5], vcc, exec415; GFX942-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]416; GFX942-NEXT: .LBB8_2: ; %Flow417; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]418; GFX942-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]419; GFX942-NEXT: s_cbranch_execz .LBB8_4420; GFX942-NEXT: ; %bb.3: ; %bb.2421; GFX942-NEXT: v_mov_b32_e32 v0, 0422; GFX942-NEXT: s_waitcnt vmcnt(0)423; GFX942-NEXT: global_store_dwordx2 v0, v[2:3], s[12:13]424; GFX942-NEXT: .LBB8_4: ; %bb.3425; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]426; GFX942-NEXT: v_mov_b32_e32 v0, 0427; GFX942-NEXT: s_waitcnt vmcnt(0)428; GFX942-NEXT: global_store_dwordx2 v0, v[2:3], s[14:15]429; GFX942-NEXT: s_endpgm430entry:431 %idx = call i32 @llvm.amdgcn.workitem.id.x()432 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx433 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1434 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx435 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2436 %cmp = icmp ult i32 %idx, 15437 br i1 %cmp, label %bb.1, label %bb.2438bb.1:439 %cmp2 = icmp ult i32 %idx, 7440 br i1 %cmp2, label %bb.2, label %bb.3441 442bb.2:443 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]444 store <8 x i8> %tmp5, ptr addrspace(1) %dst0, align 4445 br label %bb.3446 447bb.3:448 %tmp7 = phi <8 x i8> [ %vec2, %bb.1], [%tmp5, %bb.2]449 store <8 x i8> %tmp7, ptr addrspace(1) %dst1, align 4450 ret void451}452 453 454define amdgpu_kernel void @v8i8_phi_zeroinit(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst0, ptr addrspace(1) nocapture %dst1) {455; GFX942-LABEL: v8i8_phi_zeroinit:456; GFX942: ; %bb.0: ; %entry457; GFX942-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24458; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0459; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0460; GFX942-NEXT: v_cmp_lt_u32_e64 s[0:1], 14, v0461; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0462; GFX942-NEXT: s_waitcnt lgkmcnt(0)463; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[8:9]464; GFX942-NEXT: ; implicit-def: $vgpr4_vgpr5465; GFX942-NEXT: s_and_saveexec_b64 s[2:3], vcc466; GFX942-NEXT: s_cbranch_execz .LBB9_2467; GFX942-NEXT: ; %bb.1: ; %bb.1468; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0469; GFX942-NEXT: global_load_dwordx2 v[4:5], v1, s[10:11]470; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 7, v0471; GFX942-NEXT: s_waitcnt vmcnt(1)472; GFX942-NEXT: v_mov_b32_e32 v2, 0473; GFX942-NEXT: s_andn2_b64 s[0:1], s[0:1], exec474; GFX942-NEXT: s_and_b64 s[4:5], vcc, exec475; GFX942-NEXT: v_mov_b32_e32 v3, v2476; GFX942-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]477; GFX942-NEXT: .LBB9_2: ; %Flow478; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]479; GFX942-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]480; GFX942-NEXT: s_cbranch_execz .LBB9_4481; GFX942-NEXT: ; %bb.3: ; %bb.2482; GFX942-NEXT: v_mov_b32_e32 v0, 0483; GFX942-NEXT: s_waitcnt vmcnt(0)484; GFX942-NEXT: v_mov_b64_e32 v[4:5], v[2:3]485; GFX942-NEXT: global_store_dwordx2 v0, v[2:3], s[12:13]486; GFX942-NEXT: .LBB9_4: ; %bb.3487; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]488; GFX942-NEXT: v_mov_b32_e32 v0, 0489; GFX942-NEXT: s_waitcnt vmcnt(0)490; GFX942-NEXT: global_store_dwordx2 v0, v[4:5], s[14:15]491; GFX942-NEXT: s_endpgm492entry:493 %idx = call i32 @llvm.amdgcn.workitem.id.x()494 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx495 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1496 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx497 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2498 %cmp = icmp ult i32 %idx, 15499 br i1 %cmp, label %bb.1, label %bb.2500bb.1:501 %cmp2 = icmp ult i32 %idx, 7502 br i1 %cmp2, label %bb.2, label %bb.3503 504bb.2:505 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ zeroinitializer, %bb.1 ]506 store <8 x i8> %tmp5, ptr addrspace(1) %dst0, align 4507 br label %bb.3508 509bb.3:510 %tmp7 = phi <8 x i8> [ %vec2, %bb.1], [%tmp5, %bb.2]511 store <8 x i8> %tmp7, ptr addrspace(1) %dst1, align 4512 ret void513}514 515define amdgpu_kernel void @v8i8_phi_const(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst0, ptr addrspace(1) nocapture %dst1) {516; GFX942-LABEL: v8i8_phi_const:517; GFX942: ; %bb.0: ; %entry518; GFX942-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24519; GFX942-NEXT: v_and_b32_e32 v4, 0x3ff, v0520; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v4521; GFX942-NEXT: v_cmp_lt_u32_e64 s[0:1], 14, v4522; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v4523; GFX942-NEXT: s_waitcnt lgkmcnt(0)524; GFX942-NEXT: global_load_dwordx2 v[0:1], v0, s[8:9]525; GFX942-NEXT: ; implicit-def: $vgpr2526; GFX942-NEXT: ; implicit-def: $vgpr13527; GFX942-NEXT: ; implicit-def: $vgpr11528; GFX942-NEXT: ; implicit-def: $vgpr14529; GFX942-NEXT: ; implicit-def: $vgpr15530; GFX942-NEXT: ; implicit-def: $vgpr12531; GFX942-NEXT: ; implicit-def: $vgpr16532; GFX942-NEXT: s_waitcnt vmcnt(0)533; GFX942-NEXT: v_lshrrev_b32_e32 v5, 24, v1534; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v1535; GFX942-NEXT: v_lshrrev_b32_e32 v7, 8, v1536; GFX942-NEXT: v_lshrrev_b32_e32 v8, 24, v0537; GFX942-NEXT: v_lshrrev_b32_e32 v9, 16, v0538; GFX942-NEXT: v_lshrrev_b32_e32 v10, 8, v0539; GFX942-NEXT: s_and_saveexec_b64 s[2:3], vcc540; GFX942-NEXT: s_cbranch_execz .LBB10_2541; GFX942-NEXT: ; %bb.1: ; %bb.1542; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v4543; GFX942-NEXT: global_load_dwordx2 v[2:3], v0, s[10:11]544; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 7, v4545; GFX942-NEXT: s_andn2_b64 s[0:1], s[0:1], exec546; GFX942-NEXT: s_and_b64 s[4:5], vcc, exec547; GFX942-NEXT: v_mov_b32_e32 v0, 1548; GFX942-NEXT: v_mov_b32_e32 v10, 2549; GFX942-NEXT: v_mov_b32_e32 v9, 3550; GFX942-NEXT: v_mov_b32_e32 v8, 4551; GFX942-NEXT: v_mov_b32_e32 v1, 5552; GFX942-NEXT: v_mov_b32_e32 v7, 6553; GFX942-NEXT: v_mov_b32_e32 v6, 7554; GFX942-NEXT: v_mov_b32_e32 v5, 8555; GFX942-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]556; GFX942-NEXT: s_waitcnt vmcnt(0)557; GFX942-NEXT: v_lshrrev_b32_e32 v16, 24, v3558; GFX942-NEXT: v_lshrrev_b32_e32 v12, 16, v3559; GFX942-NEXT: v_lshrrev_b32_e32 v15, 8, v3560; GFX942-NEXT: v_lshrrev_b32_e32 v14, 24, v2561; GFX942-NEXT: v_lshrrev_b32_e32 v11, 16, v2562; GFX942-NEXT: v_lshrrev_b32_e32 v13, 8, v2563; GFX942-NEXT: .LBB10_2: ; %Flow564; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]565; GFX942-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]566; GFX942-NEXT: s_cbranch_execz .LBB10_4567; GFX942-NEXT: ; %bb.3: ; %bb.2568; GFX942-NEXT: v_lshlrev_b16_e32 v2, 8, v10569; GFX942-NEXT: v_lshlrev_b16_e32 v3, 8, v8570; GFX942-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD571; GFX942-NEXT: v_or_b32_sdwa v3, v9, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD572; GFX942-NEXT: v_lshlrev_b16_e32 v11, 8, v5573; GFX942-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD574; GFX942-NEXT: v_lshlrev_b16_e32 v3, 8, v7575; GFX942-NEXT: v_or_b32_sdwa v3, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD576; GFX942-NEXT: v_or_b32_sdwa v11, v6, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD577; GFX942-NEXT: v_mov_b32_e32 v4, 0578; GFX942-NEXT: v_or_b32_sdwa v3, v3, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD579; GFX942-NEXT: global_store_dwordx2 v4, v[2:3], s[12:13]580; GFX942-NEXT: v_mov_b32_e32 v2, v0581; GFX942-NEXT: v_mov_b32_e32 v13, v10582; GFX942-NEXT: v_mov_b32_e32 v11, v9583; GFX942-NEXT: v_mov_b32_e32 v14, v8584; GFX942-NEXT: v_mov_b32_e32 v3, v1585; GFX942-NEXT: v_mov_b32_e32 v15, v7586; GFX942-NEXT: v_mov_b32_e32 v12, v6587; GFX942-NEXT: v_mov_b32_e32 v16, v5588; GFX942-NEXT: .LBB10_4: ; %bb.3589; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]590; GFX942-NEXT: v_lshlrev_b16_e32 v0, 8, v13591; GFX942-NEXT: v_lshlrev_b16_e32 v1, 8, v14592; GFX942-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD593; GFX942-NEXT: v_or_b32_sdwa v1, v11, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD594; GFX942-NEXT: v_lshlrev_b16_e32 v2, 8, v16595; GFX942-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD596; GFX942-NEXT: v_lshlrev_b16_e32 v1, 8, v15597; GFX942-NEXT: v_or_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD598; GFX942-NEXT: v_or_b32_sdwa v2, v12, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD599; GFX942-NEXT: v_mov_b32_e32 v4, 0600; GFX942-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD601; GFX942-NEXT: global_store_dwordx2 v4, v[0:1], s[14:15]602; GFX942-NEXT: s_endpgm603entry:604 %idx = call i32 @llvm.amdgcn.workitem.id.x()605 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx606 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1607 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx608 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2609 %cmp = icmp ult i32 %idx, 15610 br i1 %cmp, label %bb.1, label %bb.2611bb.1:612 %cmp2 = icmp ult i32 %idx, 7613 br i1 %cmp2, label %bb.2, label %bb.3614 615bb.2:616 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [<i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, %bb.1 ]617 store <8 x i8> %tmp5, ptr addrspace(1) %dst0, align 4618 br label %bb.3619 620bb.3:621 %tmp7 = phi <8 x i8> [ %vec2, %bb.1], [%tmp5, %bb.2]622 store <8 x i8> %tmp7, ptr addrspace(1) %dst1, align 4623 ret void624}625 626define amdgpu_kernel void @v8i8_multi_block(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst0, ptr addrspace(1) nocapture %dst1) {627; GFX942-LABEL: v8i8_multi_block:628; GFX942: ; %bb.0: ; %entry629; GFX942-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24630; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0631; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0632; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0633; GFX942-NEXT: s_waitcnt lgkmcnt(0)634; GFX942-NEXT: global_load_dwordx2 v[4:5], v1, s[8:9]635; GFX942-NEXT: v_mov_b32_e32 v1, 0636; GFX942-NEXT: s_waitcnt vmcnt(0)637; GFX942-NEXT: v_mov_b64_e32 v[2:3], v[4:5]638; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc639; GFX942-NEXT: s_cbranch_execz .LBB11_4640; GFX942-NEXT: ; %bb.1: ; %bb.1641; GFX942-NEXT: v_lshlrev_b32_e32 v2, 3, v0642; GFX942-NEXT: global_load_dwordx2 v[2:3], v2, s[10:11]643; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 7, v0644; GFX942-NEXT: s_and_saveexec_b64 s[2:3], vcc645; GFX942-NEXT: s_cbranch_execz .LBB11_3646; GFX942-NEXT: ; %bb.2: ; %bb.2647; GFX942-NEXT: v_mov_b32_e32 v0, 0648; GFX942-NEXT: global_store_dwordx2 v0, v[4:5], s[12:13]649; GFX942-NEXT: .LBB11_3: ; %Flow650; GFX942-NEXT: s_or_b64 exec, exec, s[2:3]651; GFX942-NEXT: .LBB11_4: ; %bb.3652; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]653; GFX942-NEXT: s_waitcnt vmcnt(0)654; GFX942-NEXT: global_store_dwordx2 v1, v[2:3], s[14:15]655; GFX942-NEXT: s_endpgm656entry:657 %idx = call i32 @llvm.amdgcn.workitem.id.x()658 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx659 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1660 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx661 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2662 %cmp = icmp ult i32 %idx, 15663 br i1 %cmp, label %bb.1, label %bb.3664bb.1:665 %cmp2 = icmp ult i32 %idx, 7666 br i1 %cmp2, label %bb.2, label %bb.3667 668bb.2:669 store <8 x i8> %vec1, ptr addrspace(1) %dst0, align 4670 br label %bb.3671 672bb.3:673 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ], [ %vec2, %bb.2]674 store <8 x i8> %tmp5, ptr addrspace(1) %dst1, align 4675 ret void676}677 678define amdgpu_kernel void @v32i8_loop_carried(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {679; GFX942-LABEL: v32i8_loop_carried:680; GFX942: ; %bb.0: ; %entry681; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24682; GFX942-NEXT: v_and_b32_e32 v1, 0x3ff, v0683; GFX942-NEXT: v_lshlrev_b32_e32 v0, 5, v1684; GFX942-NEXT: v_cmp_lt_u32_e32 vcc, 14, v1685; GFX942-NEXT: s_mov_b32 s2, 0x2000604686; GFX942-NEXT: s_waitcnt lgkmcnt(0)687; GFX942-NEXT: global_load_dword v0, v0, s[0:1]688; GFX942-NEXT: s_mov_b64 s[0:1], 0689; GFX942-NEXT: s_waitcnt vmcnt(0)690; GFX942-NEXT: v_mov_b32_e32 v1, v0691; GFX942-NEXT: .LBB12_1: ; %bb.1692; GFX942-NEXT: ; =>This Inner Loop Header: Depth=1693; GFX942-NEXT: s_and_b64 s[6:7], exec, vcc694; GFX942-NEXT: s_or_b64 s[0:1], s[6:7], s[0:1]695; GFX942-NEXT: v_perm_b32 v1, v0, v1, s2696; GFX942-NEXT: s_andn2_b64 exec, exec, s[0:1]697; GFX942-NEXT: s_cbranch_execnz .LBB12_1698; GFX942-NEXT: ; %bb.2: ; %bb.2.loopexit699; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]700; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34701; GFX942-NEXT: v_mov_b32_e32 v0, 0702; GFX942-NEXT: s_waitcnt lgkmcnt(0)703; GFX942-NEXT: global_store_dword v0, v1, s[0:1]704; GFX942-NEXT: s_endpgm705entry:706 %idx = call i32 @llvm.amdgcn.workitem.id.x()707 %gep1 = getelementptr <32 x i8>, ptr addrspace(1) %src1, i32 %idx708 %vec1 = load <4 x i8>, ptr addrspace(1) %gep1709 br label %bb.1710 711bb.1:712 %temp = phi <4 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]713 %vec2 = shufflevector <4 x i8> %vec1, <4 x i8> %temp, <4 x i32> <i32 0, i32 2, i32 4, i32 6>714 %cmp = icmp ult i32 %idx, 15715 br i1 %cmp, label %bb.1, label %bb.2716 br label %bb.2717 718bb.2:719 store <4 x i8> %vec2, ptr addrspace(1) %dst, align 4720 ret void721}722 723; Should not have instances of "Instruction does not dominate all uses!"724 725define amdgpu_kernel void @v8i8_multiuse_multiblock(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst1, ptr addrspace(1) nocapture %dst2, ptr addrspace(1) nocapture %dst3) {726; GFX942-LABEL: v8i8_multiuse_multiblock:727; GFX942: ; %bb.0: ; %entry728; GFX942-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24729; GFX942-NEXT: v_and_b32_e32 v2, 0x3ff, v0730; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v2731; GFX942-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x44732; GFX942-NEXT: v_cmp_lt_u32_e64 s[2:3], 14, v2733; GFX942-NEXT: s_waitcnt lgkmcnt(0)734; GFX942-NEXT: global_load_dwordx2 v[0:1], v0, s[8:9]735; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v2736; GFX942-NEXT: s_waitcnt vmcnt(0)737; GFX942-NEXT: v_lshrrev_b32_e32 v1, 16, v0738; GFX942-NEXT: s_and_saveexec_b64 s[4:5], vcc739; GFX942-NEXT: s_cbranch_execz .LBB13_2740; GFX942-NEXT: ; %bb.1: ; %bb.1741; GFX942-NEXT: s_movk_i32 s6, 0xff00742; GFX942-NEXT: v_mov_b32_e32 v5, 8743; GFX942-NEXT: v_and_b32_sdwa v6, v0, s6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD744; GFX942-NEXT: s_mov_b32 s6, 0x6070504745; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 7, v2746; GFX942-NEXT: v_and_b32_e32 v4, 0xffffff00, v0747; GFX942-NEXT: v_lshlrev_b16_sdwa v5, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1748; GFX942-NEXT: v_perm_b32 v7, v0, v0, s6749; GFX942-NEXT: s_andn2_b64 s[2:3], s[2:3], exec750; GFX942-NEXT: s_and_b64 s[6:7], vcc, exec751; GFX942-NEXT: v_mov_b32_e32 v3, 0752; GFX942-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD753; GFX942-NEXT: v_or_b32_sdwa v5, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD754; GFX942-NEXT: v_or_b32_sdwa v6, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD755; GFX942-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]756; GFX942-NEXT: v_or_b32_sdwa v6, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD757; GFX942-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD758; GFX942-NEXT: global_store_dword v3, v0, s[12:13]759; GFX942-NEXT: global_store_dword v3, v7, s[12:13] offset:8760; GFX942-NEXT: global_store_dword v3, v6, s[12:13] offset:16761; GFX942-NEXT: global_store_dword v3, v4, s[12:13] offset:24762; GFX942-NEXT: .LBB13_2: ; %Flow763; GFX942-NEXT: s_or_b64 exec, exec, s[4:5]764; GFX942-NEXT: s_and_saveexec_b64 s[4:5], s[2:3]765; GFX942-NEXT: s_cbranch_execz .LBB13_4766; GFX942-NEXT: ; %bb.3: ; %bb.2767; GFX942-NEXT: v_lshlrev_b16_e32 v3, 8, v1768; GFX942-NEXT: v_and_b32_e32 v4, 0xffffff00, v1769; GFX942-NEXT: v_and_b32_e32 v5, 0xffffff00, v0770; GFX942-NEXT: s_mov_b32 s2, 0xc0c0001771; GFX942-NEXT: v_or_b32_sdwa v3, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD772; GFX942-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD773; GFX942-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD774; GFX942-NEXT: v_perm_b32 v1, 0, v1, s2775; GFX942-NEXT: v_mov_b32_e32 v2, 0776; GFX942-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD777; GFX942-NEXT: v_perm_b32 v6, 0, v0, s2778; GFX942-NEXT: s_mov_b32 s3, 0xffff0000779; GFX942-NEXT: v_lshlrev_b32_e32 v1, 16, v1780; GFX942-NEXT: v_and_or_b32 v7, v0, s3, v6781; GFX942-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD782; GFX942-NEXT: v_or_b32_e32 v1, v6, v1783; GFX942-NEXT: global_store_dword v2, v3, s[14:15]784; GFX942-NEXT: global_store_dword v2, v4, s[14:15] offset:8785; GFX942-NEXT: global_store_dword v2, v7, s[14:15] offset:16786; GFX942-NEXT: global_store_dword v2, v1, s[14:15] offset:24787; GFX942-NEXT: .LBB13_4: ; %bb.3788; GFX942-NEXT: s_or_b64 exec, exec, s[4:5]789; GFX942-NEXT: s_movk_i32 s3, 0xff00790; GFX942-NEXT: v_mov_b32_e32 v4, 8791; GFX942-NEXT: s_movk_i32 s2, 0xff792; GFX942-NEXT: v_and_b32_sdwa v2, v0, s3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD793; GFX942-NEXT: v_lshlrev_b16_sdwa v4, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1794; GFX942-NEXT: v_or_b32_sdwa v3, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD795; GFX942-NEXT: v_or_b32_sdwa v5, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD796; GFX942-NEXT: v_lshlrev_b16_e32 v6, 8, v0797; GFX942-NEXT: v_and_b32_sdwa v7, v0, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD798; GFX942-NEXT: v_mov_b32_e32 v1, 0799; GFX942-NEXT: v_or_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD800; GFX942-NEXT: v_or_b32_sdwa v7, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD801; GFX942-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD802; GFX942-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD803; GFX942-NEXT: v_or_b32_sdwa v0, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD804; GFX942-NEXT: v_or_b32_sdwa v4, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD805; GFX942-NEXT: v_or_b32_sdwa v0, v5, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD806; GFX942-NEXT: v_or_b32_sdwa v2, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD807; GFX942-NEXT: global_store_dword v1, v3, s[0:1]808; GFX942-NEXT: global_store_dword v1, v0, s[0:1] offset:8809; GFX942-NEXT: global_store_dword v1, v4, s[0:1] offset:16810; GFX942-NEXT: global_store_dword v1, v2, s[0:1] offset:24811; GFX942-NEXT: s_endpgm812entry:813 %idx = call i32 @llvm.amdgcn.workitem.id.x()814 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx815 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1816 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx817 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2818 %cmp = icmp ult i32 %idx, 15819 br i1 %cmp, label %bb.1, label %bb.2820bb.1:821 %s1 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>822 %s2 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 0, i32 1, i32 3, i32 2>823 %s3 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 0, i32 2, i32 1, i32 3>824 %s4 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 0, i32 2, i32 3, i32 1>825 %gep4 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst1, i32 0826 %gep5 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst1, i32 1827 %gep6 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst1, i32 2828 %gep7 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst1, i32 3829 store <4 x i8> %s1, ptr addrspace(1) %gep4, align 4830 store <4 x i8> %s2, ptr addrspace(1) %gep5, align 4831 store <4 x i8> %s3, ptr addrspace(1) %gep6, align 4832 store <4 x i8> %s4, ptr addrspace(1) %gep7, align 4833 %cmp2 = icmp ult i32 %idx, 7834 br i1 %cmp2, label %bb.2, label %bb.3835 836bb.2:837 %s5 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 0, i32 3, i32 1, i32 2>838 %s6 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 0, i32 3, i32 2, i32 1>839 %s7 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 1, i32 0, i32 2, i32 3>840 %s8 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 1, i32 0, i32 3, i32 2>841 %gep8 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst2, i32 0842 %gep9 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst2, i32 1843 %gep10 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst2, i32 2844 %gep11 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst2, i32 3845 store <4 x i8> %s5, ptr addrspace(1) %gep8, align 4846 store <4 x i8> %s6, ptr addrspace(1) %gep9, align 4847 store <4 x i8> %s7, ptr addrspace(1) %gep10, align 4848 store <4 x i8> %s8, ptr addrspace(1) %gep11, align 4849 br label %bb.3850 851bb.3:852 %s9 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 1, i32 2, i32 0, i32 3>853 %s10 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 1, i32 2, i32 3, i32 0>854 %s11 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 1, i32 3, i32 0, i32 2>855 %s12 = shufflevector <8 x i8> %vec1, <8 x i8> %vec2, <4 x i32> <i32 1, i32 3, i32 2, i32 0>856 %gep12 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst3, i32 0857 %gep13 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst3, i32 1858 %gep14 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst3, i32 2859 %gep15 = getelementptr ptr addrspace(1), ptr addrspace(1) %dst3, i32 3860 store <4 x i8> %s9, ptr addrspace(1) %gep12, align 4861 store <4 x i8> %s10, ptr addrspace(1) %gep13, align 4862 store <4 x i8> %s11, ptr addrspace(1) %gep14, align 4863 store <4 x i8> %s12, ptr addrspace(1) %gep15, align 4864 ret void865}866 867 868define amdgpu_kernel void @v8i8_mfma_i8(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst, ptr addrspace(1) %arg) {869; GFX942-LABEL: v8i8_mfma_i8:870; GFX942: ; %bb.0: ; %entry871; GFX942-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24872; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0873; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0874; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0875; GFX942-NEXT: s_waitcnt lgkmcnt(0)876; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[8:9]877; GFX942-NEXT: v_mov_b32_e32 v1, 0878; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc879; GFX942-NEXT: s_cbranch_execz .LBB14_2880; GFX942-NEXT: ; %bb.1: ; %bb.1881; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v0882; GFX942-NEXT: global_load_dwordx2 v[2:3], v0, s[10:11]883; GFX942-NEXT: .LBB14_2: ; %bb.2884; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]885; GFX942-NEXT: s_load_dwordx4 s[0:3], s[14:15], 0x0886; GFX942-NEXT: s_waitcnt lgkmcnt(0)887; GFX942-NEXT: v_accvgpr_write_b32 a0, s0888; GFX942-NEXT: v_accvgpr_write_b32 a1, s1889; GFX942-NEXT: v_accvgpr_write_b32 a2, s2890; GFX942-NEXT: v_accvgpr_write_b32 a3, s3891; GFX942-NEXT: s_waitcnt vmcnt(0)892; GFX942-NEXT: s_nop 0893; GFX942-NEXT: v_mfma_i32_16x16x32_i8 a[0:3], v[2:3], v[2:3], a[0:3] cbsz:1 abid:2 blgp:3894; GFX942-NEXT: s_nop 6895; GFX942-NEXT: global_store_dwordx4 v1, a[0:3], s[12:13]896; GFX942-NEXT: s_endpgm897entry:898 %idx = call i32 @llvm.amdgcn.workitem.id.x()899 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx900 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1901 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx902 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2903 %cmp = icmp ult i32 %idx, 15904 br i1 %cmp, label %bb.1, label %bb.2905bb.1:906 br label %bb.2907 908bb.2:909 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]910 %mfmaop = bitcast <8 x i8> %tmp5 to i64911 %in.1 = load <4 x i32>, ptr addrspace(1) %arg912 %mai.1 = tail call <4 x i32> @llvm.amdgcn.mfma.i32.16x16x32.i8(i64 %mfmaop, i64 %mfmaop, <4 x i32> %in.1, i32 1, i32 2, i32 3)913 store <4 x i32> %mai.1, ptr addrspace(1) %dst, align 4914 ret void915}916 917; Demonstrates that even if the intrinsic is not an 8 bit intrinsic, we will still apply type coercion918 919define amdgpu_kernel void @v8i8_mfma_half(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst, ptr addrspace(1) %arg) {920; GFX942-LABEL: v8i8_mfma_half:921; GFX942: ; %bb.0: ; %entry922; GFX942-NEXT: s_load_dwordx8 s[36:43], s[4:5], 0x24923; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v0924; GFX942-NEXT: v_lshlrev_b32_e32 v1, 3, v0925; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v0926; GFX942-NEXT: s_waitcnt lgkmcnt(0)927; GFX942-NEXT: global_load_dwordx2 v[2:3], v1, s[36:37]928; GFX942-NEXT: v_mov_b32_e32 v1, 0929; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc930; GFX942-NEXT: s_cbranch_execz .LBB15_2931; GFX942-NEXT: ; %bb.1: ; %bb.1932; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v0933; GFX942-NEXT: global_load_dwordx2 v[2:3], v0, s[38:39]934; GFX942-NEXT: .LBB15_2: ; %bb.2935; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]936; GFX942-NEXT: s_load_dwordx16 s[16:31], s[42:43], 0x0937; GFX942-NEXT: s_load_dwordx16 s[0:15], s[42:43], 0x40938; GFX942-NEXT: s_waitcnt lgkmcnt(0)939; GFX942-NEXT: v_accvgpr_write_b32 a0, s16940; GFX942-NEXT: v_accvgpr_write_b32 a1, s17941; GFX942-NEXT: v_accvgpr_write_b32 a2, s18942; GFX942-NEXT: v_accvgpr_write_b32 a3, s19943; GFX942-NEXT: v_accvgpr_write_b32 a4, s20944; GFX942-NEXT: v_accvgpr_write_b32 a5, s21945; GFX942-NEXT: v_accvgpr_write_b32 a6, s22946; GFX942-NEXT: v_accvgpr_write_b32 a7, s23947; GFX942-NEXT: v_accvgpr_write_b32 a8, s24948; GFX942-NEXT: v_accvgpr_write_b32 a9, s25949; GFX942-NEXT: v_accvgpr_write_b32 a10, s26950; GFX942-NEXT: v_accvgpr_write_b32 a11, s27951; GFX942-NEXT: v_accvgpr_write_b32 a12, s28952; GFX942-NEXT: v_accvgpr_write_b32 a13, s29953; GFX942-NEXT: v_accvgpr_write_b32 a14, s30954; GFX942-NEXT: v_accvgpr_write_b32 a15, s31955; GFX942-NEXT: v_accvgpr_write_b32 a16, s0956; GFX942-NEXT: v_accvgpr_write_b32 a17, s1957; GFX942-NEXT: v_accvgpr_write_b32 a18, s2958; GFX942-NEXT: v_accvgpr_write_b32 a19, s3959; GFX942-NEXT: v_accvgpr_write_b32 a20, s4960; GFX942-NEXT: v_accvgpr_write_b32 a21, s5961; GFX942-NEXT: v_accvgpr_write_b32 a22, s6962; GFX942-NEXT: v_accvgpr_write_b32 a23, s7963; GFX942-NEXT: v_accvgpr_write_b32 a24, s8964; GFX942-NEXT: v_accvgpr_write_b32 a25, s9965; GFX942-NEXT: v_accvgpr_write_b32 a26, s10966; GFX942-NEXT: v_accvgpr_write_b32 a27, s11967; GFX942-NEXT: v_accvgpr_write_b32 a28, s12968; GFX942-NEXT: v_accvgpr_write_b32 a29, s13969; GFX942-NEXT: v_accvgpr_write_b32 a30, s14970; GFX942-NEXT: v_accvgpr_write_b32 a31, s15971; GFX942-NEXT: s_waitcnt vmcnt(0)972; GFX942-NEXT: s_nop 0973; GFX942-NEXT: v_mfma_f32_32x32x4_2b_f16 a[0:31], v[2:3], v[2:3], a[0:31] cbsz:1 abid:2 blgp:3974; GFX942-NEXT: s_nop 15975; GFX942-NEXT: s_nop 2976; GFX942-NEXT: global_store_dwordx4 v1, a[28:31], s[40:41] offset:112977; GFX942-NEXT: global_store_dwordx4 v1, a[24:27], s[40:41] offset:96978; GFX942-NEXT: global_store_dwordx4 v1, a[20:23], s[40:41] offset:80979; GFX942-NEXT: global_store_dwordx4 v1, a[16:19], s[40:41] offset:64980; GFX942-NEXT: global_store_dwordx4 v1, a[12:15], s[40:41] offset:48981; GFX942-NEXT: global_store_dwordx4 v1, a[8:11], s[40:41] offset:32982; GFX942-NEXT: global_store_dwordx4 v1, a[4:7], s[40:41] offset:16983; GFX942-NEXT: global_store_dwordx4 v1, a[0:3], s[40:41]984; GFX942-NEXT: s_endpgm985entry:986 %idx = call i32 @llvm.amdgcn.workitem.id.x()987 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx988 %vec1 = load <8 x i8>, ptr addrspace(1) %gep1989 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx990 %vec2 = load <8 x i8>, ptr addrspace(1) %gep2991 %cmp = icmp ult i32 %idx, 15992 br i1 %cmp, label %bb.1, label %bb.2993bb.1:994 br label %bb.2995 996bb.2:997 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]998 %mfmaop = bitcast <8 x i8> %tmp5 to <4 x half>999 %in.1 = load <32 x float>, ptr addrspace(1) %arg1000 %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x4f16(<4 x half> %mfmaop, <4 x half> %mfmaop, <32 x float> %in.1, i32 1, i32 2, i32 3)1001 store <32 x float> %mai.1, ptr addrspace(1) %dst, align 41002 ret void1003}1004 1005 1006define amdgpu_kernel void @v8i8_intrinsic(ptr addrspace(1) %src1, ptr addrspace(1) %src2, ptr addrspace(1) nocapture %dst) {1007; GFX942-LABEL: v8i8_intrinsic:1008; GFX942: ; %bb.0: ; %entry1009; GFX942-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241010; GFX942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341011; GFX942-NEXT: v_and_b32_e32 v2, 0x3ff, v01012; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v21013; GFX942-NEXT: v_mov_b32_e32 v3, 01014; GFX942-NEXT: s_waitcnt lgkmcnt(0)1015; GFX942-NEXT: global_load_dwordx2 v[0:1], v0, s[0:1]1016; GFX942-NEXT: v_cmp_gt_u32_e32 vcc, 15, v21017; GFX942-NEXT: s_and_saveexec_b64 s[0:1], vcc1018; GFX942-NEXT: s_cbranch_execz .LBB16_21019; GFX942-NEXT: ; %bb.1: ; %bb.11020; GFX942-NEXT: s_waitcnt vmcnt(0)1021; GFX942-NEXT: v_lshlrev_b32_e32 v0, 3, v21022; GFX942-NEXT: global_load_dwordx2 v[0:1], v0, s[2:3]1023; GFX942-NEXT: .LBB16_2: ; %bb.21024; GFX942-NEXT: s_or_b64 exec, exec, s[0:1]1025; GFX942-NEXT: s_waitcnt vmcnt(0)1026; GFX942-NEXT: v_pk_fma_f32 v[0:1], v[0:1], v[0:1], v[0:1]1027; GFX942-NEXT: global_store_dwordx2 v3, v[0:1], s[6:7]1028; GFX942-NEXT: s_endpgm1029entry:1030 %idx = call i32 @llvm.amdgcn.workitem.id.x()1031 %gep1 = getelementptr <8 x i8>, ptr addrspace(1) %src1, i32 %idx1032 %vec1 = load <8 x i8>, ptr addrspace(1) %gep11033 %gep2 = getelementptr <8 x i8>, ptr addrspace(1) %src2, i32 %idx1034 %vec2 = load <8 x i8>, ptr addrspace(1) %gep21035 %cmp = icmp ult i32 %idx, 151036 br i1 %cmp, label %bb.1, label %bb.21037bb.1:1038 br label %bb.21039 1040bb.2:1041 %tmp5 = phi <8 x i8> [ %vec1, %entry ], [ %vec2, %bb.1 ]1042 %op = bitcast <8 x i8> %tmp5 to <2 x float>1043 %result = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %op, <2 x float> %op, <2 x float> %op)1044 store <2 x float> %result, ptr addrspace(1) %dst, align 81045 ret void1046}1047 1048declare i32 @llvm.amdgcn.workitem.id.x()1049