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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX1200 %s3; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX1200 %s4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250-SDAG %s5; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefix=GFX1250-GISEL %s6 7define amdgpu_ps void @intrinsic_store_system_scope(i32 %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {8; GFX1200-LABEL: intrinsic_store_system_scope:9; GFX1200: ; %bb.0:10; GFX1200-NEXT: buffer_store_b32 v0, v[1:2], s[0:3], s4 idxen offen scope:SCOPE_SYS11; GFX1200-NEXT: s_endpgm12;13; GFX1250-SDAG-LABEL: intrinsic_store_system_scope:14; GFX1250-SDAG: ; %bb.0:15; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 116; GFX1250-SDAG-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v117; GFX1250-SDAG-NEXT: buffer_store_b32 v0, v[2:3], s[0:3], s4 idxen offen scope:SCOPE_SYS18; GFX1250-SDAG-NEXT: s_endpgm19;20; GFX1250-GISEL-LABEL: intrinsic_store_system_scope:21; GFX1250-GISEL: ; %bb.0:22; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 123; GFX1250-GISEL-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v224; GFX1250-GISEL-NEXT: buffer_store_b32 v0, v[4:5], s[0:3], s4 idxen offen scope:SCOPE_SYS25; GFX1250-GISEL-NEXT: s_endpgm26 call void @llvm.amdgcn.struct.buffer.store.i32(i32 %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 24)27 ret void28}29 30define amdgpu_ps void @generic_store_volatile(i32 %val, ptr addrspace(1) %out) {31; GFX1200-LABEL: generic_store_volatile:32; GFX1200: ; %bb.0:33; GFX1200-NEXT: global_store_b32 v[1:2], v0, off scope:SCOPE_SYS34; GFX1200-NEXT: s_wait_storecnt 0x035; GFX1200-NEXT: s_endpgm36;37; GFX1250-SDAG-LABEL: generic_store_volatile:38; GFX1250-SDAG: ; %bb.0:39; GFX1250-SDAG-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 140; GFX1250-SDAG-NEXT: v_dual_mov_b32 v3, v2 :: v_dual_mov_b32 v2, v141; GFX1250-SDAG-NEXT: global_store_b32 v[2:3], v0, off scope:SCOPE_SYS42; GFX1250-SDAG-NEXT: s_wait_storecnt 0x043; GFX1250-SDAG-NEXT: s_endpgm44;45; GFX1250-GISEL-LABEL: generic_store_volatile:46; GFX1250-GISEL: ; %bb.0:47; GFX1250-GISEL-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 148; GFX1250-GISEL-NEXT: v_dual_mov_b32 v4, v1 :: v_dual_mov_b32 v5, v249; GFX1250-GISEL-NEXT: global_store_b32 v[4:5], v0, off scope:SCOPE_SYS50; GFX1250-GISEL-NEXT: s_wait_storecnt 0x051; GFX1250-GISEL-NEXT: s_endpgm52 store volatile i32 %val, ptr addrspace(1) %out53 ret void54}55