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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1032 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -amdgpu-early-ifcvt=1 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1032 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -amdgpu-early-ifcvt=1 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1032,GFX10DEFWAVE %s7 8define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) {9; GFX1032-LABEL: test_vopc_i32:10; GFX1032: ; %bb.0:11; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2412; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v013; GFX1032-NEXT: s_waitcnt lgkmcnt(0)14; GFX1032-NEXT: global_load_dword v1, v0, s[0:1]15; GFX1032-NEXT: s_waitcnt vmcnt(0)16; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0, v117; GFX1032-NEXT: v_cndmask_b32_e64 v1, 2, 1, vcc_lo18; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]19; GFX1032-NEXT: s_endpgm20;21; GFX1064-LABEL: test_vopc_i32:22; GFX1064: ; %bb.0:23; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2424; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v025; GFX1064-NEXT: s_waitcnt lgkmcnt(0)26; GFX1064-NEXT: global_load_dword v1, v0, s[0:1]27; GFX1064-NEXT: s_waitcnt vmcnt(0)28; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, 0, v129; GFX1064-NEXT: v_cndmask_b32_e64 v1, 2, 1, vcc30; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]31; GFX1064-NEXT: s_endpgm32 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()33 %gep = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %lid34 %load = load i32, ptr addrspace(1) %gep, align 435 %cmp = icmp sgt i32 %load, 036 %sel = select i1 %cmp, i32 1, i32 237 store i32 %sel, ptr addrspace(1) %gep, align 438 ret void39}40 41define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) {42; GFX1032-LABEL: test_vopc_f32:43; GFX1032: ; %bb.0:44; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2445; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v046; GFX1032-NEXT: s_waitcnt lgkmcnt(0)47; GFX1032-NEXT: global_load_dword v1, v0, s[0:1]48; GFX1032-NEXT: s_waitcnt vmcnt(0)49; GFX1032-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v150; GFX1032-NEXT: v_cndmask_b32_e64 v1, 2.0, 1.0, vcc_lo51; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]52; GFX1032-NEXT: s_endpgm53;54; GFX1064-LABEL: test_vopc_f32:55; GFX1064: ; %bb.0:56; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2457; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v058; GFX1064-NEXT: s_waitcnt lgkmcnt(0)59; GFX1064-NEXT: global_load_dword v1, v0, s[0:1]60; GFX1064-NEXT: s_waitcnt vmcnt(0)61; GFX1064-NEXT: v_cmp_nge_f32_e32 vcc, 0, v162; GFX1064-NEXT: v_cndmask_b32_e64 v1, 2.0, 1.0, vcc63; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]64; GFX1064-NEXT: s_endpgm65 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()66 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %lid67 %load = load float, ptr addrspace(1) %gep, align 468 %cmp = fcmp ugt float %load, 0.069 %sel = select i1 %cmp, float 1.0, float 2.070 store float %sel, ptr addrspace(1) %gep, align 471 ret void72}73 74define amdgpu_ps void @test_vopc_vcmp(float %x) {75; GFX1032-LABEL: test_vopc_vcmp:76; GFX1032: ; %bb.0:77; GFX1032-NEXT: v_cmp_nle_f32_e32 vcc_lo, 0, v078; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, vcc_lo79; GFX1032-NEXT: s_cbranch_scc0 .LBB2_180; GFX1032-NEXT: s_endpgm81; GFX1032-NEXT: .LBB2_1:82; GFX1032-NEXT: s_mov_b32 exec_lo, 083; GFX1032-NEXT: exp null off, off, off, off done vm84; GFX1032-NEXT: s_endpgm85;86; GFX1064-LABEL: test_vopc_vcmp:87; GFX1064: ; %bb.0:88; GFX1064-NEXT: v_cmp_nle_f32_e32 vcc, 0, v089; GFX1064-NEXT: s_andn2_b64 exec, exec, vcc90; GFX1064-NEXT: s_cbranch_scc0 .LBB2_191; GFX1064-NEXT: s_endpgm92; GFX1064-NEXT: .LBB2_1:93; GFX1064-NEXT: s_mov_b64 exec, 094; GFX1064-NEXT: exp null off, off, off, off done vm95; GFX1064-NEXT: s_endpgm96 %cmp = fcmp oge float %x, 0.097 call void @llvm.amdgcn.kill(i1 %cmp)98 ret void99}100 101define amdgpu_kernel void @test_vopc_2xf16(ptr addrspace(1) %arg) {102; GFX1032-LABEL: test_vopc_2xf16:103; GFX1032: ; %bb.0:104; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24105; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v0106; GFX1032-NEXT: v_mov_b32_e32 v2, 0107; GFX1032-NEXT: s_waitcnt lgkmcnt(0)108; GFX1032-NEXT: global_load_dword v1, v0, s[0:1]109; GFX1032-NEXT: s_waitcnt vmcnt(0)110; GFX1032-NEXT: v_cmp_le_f16_sdwa vcc_lo, v1, v2 src0_sel:WORD_1 src1_sel:DWORD111; GFX1032-NEXT: v_cndmask_b32_e32 v1, 0x3c003c00, v1, vcc_lo112; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]113; GFX1032-NEXT: s_endpgm114;115; GFX1064-LABEL: test_vopc_2xf16:116; GFX1064: ; %bb.0:117; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24118; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v0119; GFX1064-NEXT: v_mov_b32_e32 v2, 0120; GFX1064-NEXT: s_waitcnt lgkmcnt(0)121; GFX1064-NEXT: global_load_dword v1, v0, s[0:1]122; GFX1064-NEXT: s_waitcnt vmcnt(0)123; GFX1064-NEXT: v_cmp_le_f16_sdwa vcc, v1, v2 src0_sel:WORD_1 src1_sel:DWORD124; GFX1064-NEXT: v_cndmask_b32_e32 v1, 0x3c003c00, v1, vcc125; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]126; GFX1064-NEXT: s_endpgm127 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()128 %gep = getelementptr inbounds <2 x half>, ptr addrspace(1) %arg, i32 %lid129 %load = load <2 x half>, ptr addrspace(1) %gep, align 4130 %elt = extractelement <2 x half> %load, i32 1131 %cmp = fcmp ugt half %elt, 0.0132 %sel = select i1 %cmp, <2 x half> <half 1.0, half 1.0>, <2 x half> %load133 store <2 x half> %sel, ptr addrspace(1) %gep, align 4134 ret void135}136 137define amdgpu_kernel void @test_vopc_class(ptr addrspace(1) %out, float %x) #0 {138; GFX1032-LABEL: test_vopc_class:139; GFX1032: ; %bb.0:140; GFX1032-NEXT: s_clause 0x1141; GFX1032-NEXT: s_load_dword s2, s[4:5], 0x2c142; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24143; GFX1032-NEXT: v_mov_b32_e32 v0, 0144; GFX1032-NEXT: s_waitcnt lgkmcnt(0)145; GFX1032-NEXT: v_cmp_class_f32_e64 s2, s2, 0x204146; GFX1032-NEXT: v_cndmask_b32_e64 v1, 0, 1, s2147; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]148; GFX1032-NEXT: s_endpgm149;150; GFX1064-LABEL: test_vopc_class:151; GFX1064: ; %bb.0:152; GFX1064-NEXT: s_clause 0x1153; GFX1064-NEXT: s_load_dword s2, s[4:5], 0x2c154; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24155; GFX1064-NEXT: v_mov_b32_e32 v0, 0156; GFX1064-NEXT: s_waitcnt lgkmcnt(0)157; GFX1064-NEXT: v_cmp_class_f32_e64 s[2:3], s2, 0x204158; GFX1064-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[2:3]159; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]160; GFX1064-NEXT: s_endpgm161 %fabs = tail call float @llvm.fabs.f32(float %x)162 %cmp = fcmp oeq float %fabs, 0x7FF0000000000000163 %ext = zext i1 %cmp to i32164 store i32 %ext, ptr addrspace(1) %out, align 4165 ret void166}167 168define amdgpu_kernel void @test_vcmp_vcnd_f16(ptr addrspace(1) %out, half %x) #0 {169; GFX1032-LABEL: test_vcmp_vcnd_f16:170; GFX1032: ; %bb.0:171; GFX1032-NEXT: s_clause 0x1172; GFX1032-NEXT: s_load_dword s2, s[4:5], 0x2c173; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24174; GFX1032-NEXT: v_mov_b32_e32 v1, 0175; GFX1032-NEXT: s_waitcnt lgkmcnt(0)176; GFX1032-NEXT: v_mov_b32_e32 v0, s2177; GFX1032-NEXT: v_cmp_neq_f16_e64 vcc_lo, 0x7c00, s2178; GFX1032-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v0, vcc_lo179; GFX1032-NEXT: global_store_short v1, v0, s[0:1]180; GFX1032-NEXT: s_endpgm181;182; GFX1064-LABEL: test_vcmp_vcnd_f16:183; GFX1064: ; %bb.0:184; GFX1064-NEXT: s_clause 0x1185; GFX1064-NEXT: s_load_dword s2, s[4:5], 0x2c186; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24187; GFX1064-NEXT: v_mov_b32_e32 v1, 0188; GFX1064-NEXT: s_waitcnt lgkmcnt(0)189; GFX1064-NEXT: v_mov_b32_e32 v0, s2190; GFX1064-NEXT: v_cmp_neq_f16_e64 vcc, 0x7c00, s2191; GFX1064-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v0, vcc192; GFX1064-NEXT: global_store_short v1, v0, s[0:1]193; GFX1064-NEXT: s_endpgm194 %cmp = fcmp oeq half %x, 0x7FF0000000000000195 %sel = select i1 %cmp, half 1.0, half %x196 store half %sel, ptr addrspace(1) %out, align 2197 ret void198}199 200define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) {201; GFX1032-LABEL: test_vop3_cmp_f32_sop_and:202; GFX1032: ; %bb.0:203; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24204; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v0205; GFX1032-NEXT: s_waitcnt lgkmcnt(0)206; GFX1032-NEXT: global_load_dword v1, v0, s[2:3]207; GFX1032-NEXT: s_waitcnt vmcnt(0)208; GFX1032-NEXT: v_cmp_nge_f32_e32 vcc_lo, 0, v1209; GFX1032-NEXT: v_cmp_nle_f32_e64 s0, 1.0, v1210; GFX1032-NEXT: s_and_b32 s0, vcc_lo, s0211; GFX1032-NEXT: v_cndmask_b32_e64 v1, 2.0, 1.0, s0212; GFX1032-NEXT: global_store_dword v0, v1, s[2:3]213; GFX1032-NEXT: s_endpgm214;215; GFX1064-LABEL: test_vop3_cmp_f32_sop_and:216; GFX1064: ; %bb.0:217; GFX1064-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24218; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v0219; GFX1064-NEXT: s_waitcnt lgkmcnt(0)220; GFX1064-NEXT: global_load_dword v1, v0, s[2:3]221; GFX1064-NEXT: s_waitcnt vmcnt(0)222; GFX1064-NEXT: v_cmp_nge_f32_e32 vcc, 0, v1223; GFX1064-NEXT: v_cmp_nle_f32_e64 s[0:1], 1.0, v1224; GFX1064-NEXT: s_and_b64 s[0:1], vcc, s[0:1]225; GFX1064-NEXT: v_cndmask_b32_e64 v1, 2.0, 1.0, s[0:1]226; GFX1064-NEXT: global_store_dword v0, v1, s[2:3]227; GFX1064-NEXT: s_endpgm228 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()229 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %lid230 %load = load float, ptr addrspace(1) %gep, align 4231 %cmp = fcmp ugt float %load, 0.0232 %cmp2 = fcmp ult float %load, 1.0233 %and = and i1 %cmp, %cmp2234 %sel = select i1 %and, float 1.0, float 2.0235 store float %sel, ptr addrspace(1) %gep, align 4236 ret void237}238 239define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) {240; GFX1032-LABEL: test_vop3_cmp_i32_sop_xor:241; GFX1032: ; %bb.0:242; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24243; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v0244; GFX1032-NEXT: s_waitcnt lgkmcnt(0)245; GFX1032-NEXT: global_load_dword v1, v0, s[2:3]246; GFX1032-NEXT: s_waitcnt vmcnt(0)247; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0, v1248; GFX1032-NEXT: v_cmp_gt_i32_e64 s0, 1, v1249; GFX1032-NEXT: s_xor_b32 s0, vcc_lo, s0250; GFX1032-NEXT: v_cndmask_b32_e64 v1, 2, 1, s0251; GFX1032-NEXT: global_store_dword v0, v1, s[2:3]252; GFX1032-NEXT: s_endpgm253;254; GFX1064-LABEL: test_vop3_cmp_i32_sop_xor:255; GFX1064: ; %bb.0:256; GFX1064-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24257; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v0258; GFX1064-NEXT: s_waitcnt lgkmcnt(0)259; GFX1064-NEXT: global_load_dword v1, v0, s[2:3]260; GFX1064-NEXT: s_waitcnt vmcnt(0)261; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, 0, v1262; GFX1064-NEXT: v_cmp_gt_i32_e64 s[0:1], 1, v1263; GFX1064-NEXT: s_xor_b64 s[0:1], vcc, s[0:1]264; GFX1064-NEXT: v_cndmask_b32_e64 v1, 2, 1, s[0:1]265; GFX1064-NEXT: global_store_dword v0, v1, s[2:3]266; GFX1064-NEXT: s_endpgm267 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()268 %gep = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %lid269 %load = load i32, ptr addrspace(1) %gep, align 4270 %cmp = icmp sgt i32 %load, 0271 %cmp2 = icmp slt i32 %load, 1272 %xor = xor i1 %cmp, %cmp2273 %sel = select i1 %xor, i32 1, i32 2274 store i32 %sel, ptr addrspace(1) %gep, align 4275 ret void276}277 278define amdgpu_kernel void @test_vop3_cmp_u32_sop_or(ptr addrspace(1) %arg) {279; GFX1032-LABEL: test_vop3_cmp_u32_sop_or:280; GFX1032: ; %bb.0:281; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24282; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v0283; GFX1032-NEXT: s_waitcnt lgkmcnt(0)284; GFX1032-NEXT: global_load_dword v1, v0, s[2:3]285; GFX1032-NEXT: s_waitcnt vmcnt(0)286; GFX1032-NEXT: v_cmp_lt_u32_e32 vcc_lo, 3, v1287; GFX1032-NEXT: v_cmp_gt_u32_e64 s0, 2, v1288; GFX1032-NEXT: s_or_b32 s0, vcc_lo, s0289; GFX1032-NEXT: v_cndmask_b32_e64 v1, 2, 1, s0290; GFX1032-NEXT: global_store_dword v0, v1, s[2:3]291; GFX1032-NEXT: s_endpgm292;293; GFX1064-LABEL: test_vop3_cmp_u32_sop_or:294; GFX1064: ; %bb.0:295; GFX1064-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24296; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v0297; GFX1064-NEXT: s_waitcnt lgkmcnt(0)298; GFX1064-NEXT: global_load_dword v1, v0, s[2:3]299; GFX1064-NEXT: s_waitcnt vmcnt(0)300; GFX1064-NEXT: v_cmp_lt_u32_e32 vcc, 3, v1301; GFX1064-NEXT: v_cmp_gt_u32_e64 s[0:1], 2, v1302; GFX1064-NEXT: s_or_b64 s[0:1], vcc, s[0:1]303; GFX1064-NEXT: v_cndmask_b32_e64 v1, 2, 1, s[0:1]304; GFX1064-NEXT: global_store_dword v0, v1, s[2:3]305; GFX1064-NEXT: s_endpgm306 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()307 %gep = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %lid308 %load = load i32, ptr addrspace(1) %gep, align 4309 %cmp = icmp ugt i32 %load, 3310 %cmp2 = icmp ult i32 %load, 2311 %or = or i1 %cmp, %cmp2312 %sel = select i1 %or, i32 1, i32 2313 store i32 %sel, ptr addrspace(1) %gep, align 4314 ret void315}316 317define amdgpu_kernel void @test_mask_if(ptr addrspace(1) %arg) #0 {318; GFX1032-LABEL: test_mask_if:319; GFX1032: ; %bb.0:320; GFX1032-NEXT: v_cmp_lt_u32_e32 vcc_lo, 10, v0321; GFX1032-NEXT: s_and_saveexec_b32 s0, vcc_lo322; GFX1032-NEXT: s_cbranch_execz .LBB9_2323; GFX1032-NEXT: ; %bb.1: ; %if324; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24325; GFX1032-NEXT: v_mov_b32_e32 v0, 0326; GFX1032-NEXT: s_waitcnt lgkmcnt(0)327; GFX1032-NEXT: global_store_dword v0, v0, s[0:1]328; GFX1032-NEXT: .LBB9_2: ; %endif329; GFX1032-NEXT: s_endpgm330;331; GFX1064-LABEL: test_mask_if:332; GFX1064: ; %bb.0:333; GFX1064-NEXT: v_cmp_lt_u32_e32 vcc, 10, v0334; GFX1064-NEXT: s_and_saveexec_b64 s[0:1], vcc335; GFX1064-NEXT: s_cbranch_execz .LBB9_2336; GFX1064-NEXT: ; %bb.1: ; %if337; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24338; GFX1064-NEXT: v_mov_b32_e32 v0, 0339; GFX1064-NEXT: s_waitcnt lgkmcnt(0)340; GFX1064-NEXT: global_store_dword v0, v0, s[0:1]341; GFX1064-NEXT: .LBB9_2: ; %endif342; GFX1064-NEXT: s_endpgm343 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()344 %cmp = icmp ugt i32 %lid, 10345 br i1 %cmp, label %if, label %endif346 347if:348 store i32 0, ptr addrspace(1) %arg, align 4349 br label %endif350 351endif:352 ret void353}354 355define amdgpu_kernel void @test_loop_with_if(ptr addrspace(1) %arg) #0 {356; GFX1032-LABEL: test_loop_with_if:357; GFX1032: ; %bb.0: ; %bb358; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24359; GFX1032-NEXT: v_mov_b32_e32 v1, 0360; GFX1032-NEXT: s_mov_b32 s2, 0361; GFX1032-NEXT: ; implicit-def: $vgpr2_vgpr3362; GFX1032-NEXT: s_branch .LBB10_2363; GFX1032-NEXT: .LBB10_1: ; %bb13364; GFX1032-NEXT: ; in Loop: Header=BB10_2 Depth=1365; GFX1032-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)366; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s4367; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0xfe, v4368; GFX1032-NEXT: v_add_nc_u32_e32 v1, 1, v4369; GFX1032-NEXT: s_or_b32 s2, vcc_lo, s2370; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, s2371; GFX1032-NEXT: s_cbranch_execz .LBB10_8372; GFX1032-NEXT: .LBB10_2: ; %bb2373; GFX1032-NEXT: ; =>This Inner Loop Header: Depth=1374; GFX1032-NEXT: v_cmp_ge_i32_e64 s4, v1, v0375; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, v1, v0376; GFX1032-NEXT: s_mov_b32 s3, 0377; GFX1032-NEXT: s_and_saveexec_b32 s5, vcc_lo378; GFX1032-NEXT: s_cbranch_execz .LBB10_4379; GFX1032-NEXT: ; %bb.3: ; %bb5380; GFX1032-NEXT: ; in Loop: Header=BB10_2 Depth=1381; GFX1032-NEXT: v_ashrrev_i32_e32 v2, 31, v1382; GFX1032-NEXT: s_andn2_b32 s4, s4, exec_lo383; GFX1032-NEXT: s_mov_b32 s3, exec_lo384; GFX1032-NEXT: v_lshlrev_b64 v[2:3], 2, v[1:2]385; GFX1032-NEXT: s_waitcnt lgkmcnt(0)386; GFX1032-NEXT: v_add_co_u32 v2, vcc_lo, s0, v2387; GFX1032-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo388; GFX1032-NEXT: global_load_dword v4, v[2:3], off389; GFX1032-NEXT: s_waitcnt vmcnt(0)390; GFX1032-NEXT: v_cmp_gt_i32_e32 vcc_lo, 11, v4391; GFX1032-NEXT: s_and_b32 s6, vcc_lo, exec_lo392; GFX1032-NEXT: s_or_b32 s4, s4, s6393; GFX1032-NEXT: .LBB10_4: ; %Flow394; GFX1032-NEXT: ; in Loop: Header=BB10_2 Depth=1395; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s5396; GFX1032-NEXT: ; implicit-def: $vgpr4397; GFX1032-NEXT: s_and_saveexec_b32 s5, s4398; GFX1032-NEXT: s_xor_b32 s4, exec_lo, s5399; GFX1032-NEXT: ; %bb.5: ; %bb11400; GFX1032-NEXT: ; in Loop: Header=BB10_2 Depth=1401; GFX1032-NEXT: v_lshrrev_b32_e32 v4, 31, v1402; GFX1032-NEXT: s_andn2_b32 s3, s3, exec_lo403; GFX1032-NEXT: v_add_nc_u32_e32 v4, v1, v4404; GFX1032-NEXT: v_ashrrev_i32_e32 v4, 1, v4405; GFX1032-NEXT: ; %bb.6: ; %Flow1406; GFX1032-NEXT: ; in Loop: Header=BB10_2 Depth=1407; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s4408; GFX1032-NEXT: s_and_saveexec_b32 s4, s3409; GFX1032-NEXT: s_cbranch_execz .LBB10_1410; GFX1032-NEXT: ; %bb.7: ; %bb10411; GFX1032-NEXT: ; in Loop: Header=BB10_2 Depth=1412; GFX1032-NEXT: v_mov_b32_e32 v4, v1413; GFX1032-NEXT: global_store_dword v[2:3], v0, off414; GFX1032-NEXT: s_branch .LBB10_1415; GFX1032-NEXT: .LBB10_8: ; %bb1416; GFX1032-NEXT: s_endpgm417;418; GFX1064-LABEL: test_loop_with_if:419; GFX1064: ; %bb.0: ; %bb420; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24421; GFX1064-NEXT: v_mov_b32_e32 v1, 0422; GFX1064-NEXT: s_mov_b64 s[2:3], 0423; GFX1064-NEXT: ; implicit-def: $vgpr2_vgpr3424; GFX1064-NEXT: s_branch .LBB10_2425; GFX1064-NEXT: .LBB10_1: ; %bb13426; GFX1064-NEXT: ; in Loop: Header=BB10_2 Depth=1427; GFX1064-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)428; GFX1064-NEXT: s_or_b64 exec, exec, s[6:7]429; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, 0xfe, v4430; GFX1064-NEXT: v_add_nc_u32_e32 v1, 1, v4431; GFX1064-NEXT: s_or_b64 s[2:3], vcc, s[2:3]432; GFX1064-NEXT: s_andn2_b64 exec, exec, s[2:3]433; GFX1064-NEXT: s_cbranch_execz .LBB10_8434; GFX1064-NEXT: .LBB10_2: ; %bb2435; GFX1064-NEXT: ; =>This Inner Loop Header: Depth=1436; GFX1064-NEXT: v_cmp_ge_i32_e64 s[6:7], v1, v0437; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, v1, v0438; GFX1064-NEXT: s_mov_b64 s[4:5], 0439; GFX1064-NEXT: s_and_saveexec_b64 s[8:9], vcc440; GFX1064-NEXT: s_cbranch_execz .LBB10_4441; GFX1064-NEXT: ; %bb.3: ; %bb5442; GFX1064-NEXT: ; in Loop: Header=BB10_2 Depth=1443; GFX1064-NEXT: v_ashrrev_i32_e32 v2, 31, v1444; GFX1064-NEXT: s_andn2_b64 s[6:7], s[6:7], exec445; GFX1064-NEXT: s_mov_b64 s[4:5], exec446; GFX1064-NEXT: v_lshlrev_b64 v[2:3], 2, v[1:2]447; GFX1064-NEXT: s_waitcnt lgkmcnt(0)448; GFX1064-NEXT: v_add_co_u32 v2, vcc, s0, v2449; GFX1064-NEXT: v_add_co_ci_u32_e32 v3, vcc, s1, v3, vcc450; GFX1064-NEXT: global_load_dword v4, v[2:3], off451; GFX1064-NEXT: s_waitcnt vmcnt(0)452; GFX1064-NEXT: v_cmp_gt_i32_e32 vcc, 11, v4453; GFX1064-NEXT: s_and_b64 s[10:11], vcc, exec454; GFX1064-NEXT: s_or_b64 s[6:7], s[6:7], s[10:11]455; GFX1064-NEXT: .LBB10_4: ; %Flow456; GFX1064-NEXT: ; in Loop: Header=BB10_2 Depth=1457; GFX1064-NEXT: s_or_b64 exec, exec, s[8:9]458; GFX1064-NEXT: ; implicit-def: $vgpr4459; GFX1064-NEXT: s_and_saveexec_b64 s[8:9], s[6:7]460; GFX1064-NEXT: s_xor_b64 s[6:7], exec, s[8:9]461; GFX1064-NEXT: ; %bb.5: ; %bb11462; GFX1064-NEXT: ; in Loop: Header=BB10_2 Depth=1463; GFX1064-NEXT: v_lshrrev_b32_e32 v4, 31, v1464; GFX1064-NEXT: s_andn2_b64 s[4:5], s[4:5], exec465; GFX1064-NEXT: v_add_nc_u32_e32 v4, v1, v4466; GFX1064-NEXT: v_ashrrev_i32_e32 v4, 1, v4467; GFX1064-NEXT: ; %bb.6: ; %Flow1468; GFX1064-NEXT: ; in Loop: Header=BB10_2 Depth=1469; GFX1064-NEXT: s_or_b64 exec, exec, s[6:7]470; GFX1064-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]471; GFX1064-NEXT: s_cbranch_execz .LBB10_1472; GFX1064-NEXT: ; %bb.7: ; %bb10473; GFX1064-NEXT: ; in Loop: Header=BB10_2 Depth=1474; GFX1064-NEXT: v_mov_b32_e32 v4, v1475; GFX1064-NEXT: global_store_dword v[2:3], v0, off476; GFX1064-NEXT: s_branch .LBB10_1477; GFX1064-NEXT: .LBB10_8: ; %bb1478; GFX1064-NEXT: s_endpgm479bb:480 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()481 br label %bb2482 483bb1:484 ret void485 486bb2:487 %tmp3 = phi i32 [ 0, %bb ], [ %tmp15, %bb13 ]488 %tmp4 = icmp slt i32 %tmp3, %tmp489 br i1 %tmp4, label %bb5, label %bb11490 491bb5:492 %tmp6 = sext i32 %tmp3 to i64493 %tmp7 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tmp6494 %tmp8 = load i32, ptr addrspace(1) %tmp7, align 4495 %tmp9 = icmp sgt i32 %tmp8, 10496 br i1 %tmp9, label %bb10, label %bb11497 498bb10:499 store i32 %tmp, ptr addrspace(1) %tmp7, align 4500 br label %bb13501 502bb11:503 %tmp12 = sdiv i32 %tmp3, 2504 br label %bb13505 506bb13:507 %tmp14 = phi i32 [ %tmp3, %bb10 ], [ %tmp12, %bb11 ]508 %tmp15 = add nsw i32 %tmp14, 1509 %tmp16 = icmp slt i32 %tmp14, 255510 br i1 %tmp16, label %bb2, label %bb1511}512 513 514 515define amdgpu_kernel void @test_loop_with_if_else_break(ptr addrspace(1) %arg) #0 {516; GFX1032-LABEL: test_loop_with_if_else_break:517; GFX1032: ; %bb.0: ; %bb518; GFX1032-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0519; GFX1032-NEXT: s_mov_b32 s2, 0520; GFX1032-NEXT: s_and_saveexec_b32 s0, vcc_lo521; GFX1032-NEXT: s_cbranch_execz .LBB11_6522; GFX1032-NEXT: ; %bb.1: ; %.preheader523; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24524; GFX1032-NEXT: v_min_u32_e32 v1, 0x100, v0525; GFX1032-NEXT: v_mov_b32_e32 v2, 0526; GFX1032-NEXT: s_mov_b32 s3, 0527; GFX1032-NEXT: ; implicit-def: $sgpr4528; GFX1032-NEXT: s_branch .LBB11_4529; GFX1032-NEXT: .LBB11_2: ; %bb8530; GFX1032-NEXT: ; in Loop: Header=BB11_4 Depth=1531; GFX1032-NEXT: s_add_i32 s3, s3, 1532; GFX1032-NEXT: global_store_dword v2, v0, s[0:1]533; GFX1032-NEXT: v_cmp_ge_u32_e32 vcc_lo, s3, v1534; GFX1032-NEXT: s_add_u32 s0, s0, 4535; GFX1032-NEXT: s_addc_u32 s1, s1, 0536; GFX1032-NEXT: s_andn2_b32 s4, s4, exec_lo537; GFX1032-NEXT: s_and_b32 s5, vcc_lo, exec_lo538; GFX1032-NEXT: s_or_b32 s4, s4, s5539; GFX1032-NEXT: .LBB11_3: ; %Flow540; GFX1032-NEXT: ; in Loop: Header=BB11_4 Depth=1541; GFX1032-NEXT: s_and_b32 s5, exec_lo, s4542; GFX1032-NEXT: s_or_b32 s2, s5, s2543; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, s2544; GFX1032-NEXT: s_cbranch_execz .LBB11_6545; GFX1032-NEXT: .LBB11_4: ; %bb2546; GFX1032-NEXT: ; =>This Inner Loop Header: Depth=1547; GFX1032-NEXT: s_waitcnt lgkmcnt(0)548; GFX1032-NEXT: global_load_dword v3, v2, s[0:1]549; GFX1032-NEXT: s_or_b32 s4, s4, exec_lo550; GFX1032-NEXT: s_waitcnt vmcnt(0)551; GFX1032-NEXT: v_cmp_gt_i32_e32 vcc_lo, 11, v3552; GFX1032-NEXT: s_cbranch_vccz .LBB11_2553; GFX1032-NEXT: ; %bb.5: ; in Loop: Header=BB11_4 Depth=1554; GFX1032-NEXT: ; implicit-def: $sgpr3555; GFX1032-NEXT: ; implicit-def: $sgpr0_sgpr1556; GFX1032-NEXT: s_branch .LBB11_3557; GFX1032-NEXT: .LBB11_6: ; %.loopexit558; GFX1032-NEXT: s_endpgm559;560; GFX1064-LABEL: test_loop_with_if_else_break:561; GFX1064: ; %bb.0: ; %bb562; GFX1064-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0563; GFX1064-NEXT: s_mov_b32 s6, 0564; GFX1064-NEXT: s_and_saveexec_b64 s[0:1], vcc565; GFX1064-NEXT: s_cbranch_execz .LBB11_6566; GFX1064-NEXT: ; %bb.1: ; %.preheader567; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24568; GFX1064-NEXT: v_min_u32_e32 v1, 0x100, v0569; GFX1064-NEXT: v_mov_b32_e32 v2, 0570; GFX1064-NEXT: s_mov_b64 s[2:3], 0571; GFX1064-NEXT: ; implicit-def: $sgpr4_sgpr5572; GFX1064-NEXT: s_branch .LBB11_4573; GFX1064-NEXT: .LBB11_2: ; %bb8574; GFX1064-NEXT: ; in Loop: Header=BB11_4 Depth=1575; GFX1064-NEXT: s_add_i32 s6, s6, 1576; GFX1064-NEXT: global_store_dword v2, v0, s[0:1]577; GFX1064-NEXT: v_cmp_ge_u32_e32 vcc, s6, v1578; GFX1064-NEXT: s_add_u32 s0, s0, 4579; GFX1064-NEXT: s_addc_u32 s1, s1, 0580; GFX1064-NEXT: s_andn2_b64 s[4:5], s[4:5], exec581; GFX1064-NEXT: s_and_b64 s[8:9], vcc, exec582; GFX1064-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]583; GFX1064-NEXT: .LBB11_3: ; %Flow584; GFX1064-NEXT: ; in Loop: Header=BB11_4 Depth=1585; GFX1064-NEXT: s_and_b64 s[8:9], exec, s[4:5]586; GFX1064-NEXT: s_or_b64 s[2:3], s[8:9], s[2:3]587; GFX1064-NEXT: s_andn2_b64 exec, exec, s[2:3]588; GFX1064-NEXT: s_cbranch_execz .LBB11_6589; GFX1064-NEXT: .LBB11_4: ; %bb2590; GFX1064-NEXT: ; =>This Inner Loop Header: Depth=1591; GFX1064-NEXT: s_waitcnt lgkmcnt(0)592; GFX1064-NEXT: global_load_dword v3, v2, s[0:1]593; GFX1064-NEXT: s_or_b64 s[4:5], s[4:5], exec594; GFX1064-NEXT: s_waitcnt vmcnt(0)595; GFX1064-NEXT: v_cmp_gt_i32_e32 vcc, 11, v3596; GFX1064-NEXT: s_cbranch_vccz .LBB11_2597; GFX1064-NEXT: ; %bb.5: ; in Loop: Header=BB11_4 Depth=1598; GFX1064-NEXT: ; implicit-def: $sgpr6599; GFX1064-NEXT: ; implicit-def: $sgpr0_sgpr1600; GFX1064-NEXT: s_branch .LBB11_3601; GFX1064-NEXT: .LBB11_6: ; %.loopexit602; GFX1064-NEXT: s_endpgm603bb:604 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()605 %tmp1 = icmp eq i32 %tmp, 0606 br i1 %tmp1, label %.loopexit, label %.preheader607 608.preheader:609 br label %bb2610 611bb2:612 %tmp3 = phi i32 [ %tmp9, %bb8 ], [ 0, %.preheader ]613 %tmp4 = zext i32 %tmp3 to i64614 %tmp5 = getelementptr inbounds i32, ptr addrspace(1) %arg, i64 %tmp4615 %tmp6 = load i32, ptr addrspace(1) %tmp5, align 4616 %tmp7 = icmp sgt i32 %tmp6, 10617 br i1 %tmp7, label %bb8, label %.loopexit618 619bb8:620 store i32 %tmp, ptr addrspace(1) %tmp5, align 4621 %tmp9 = add nuw nsw i32 %tmp3, 1622 %tmp10 = icmp ult i32 %tmp9, 256623 %tmp11 = icmp ult i32 %tmp9, %tmp624 %tmp12 = and i1 %tmp10, %tmp11625 br i1 %tmp12, label %bb2, label %.loopexit626 627.loopexit:628 ret void629}630 631define amdgpu_kernel void @test_addc_vop2b(ptr addrspace(1) %arg, i64 %arg1) #0 {632; GFX1032-LABEL: test_addc_vop2b:633; GFX1032: ; %bb.0: ; %bb634; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24635; GFX1032-NEXT: v_lshlrev_b32_e32 v2, 3, v0636; GFX1032-NEXT: s_waitcnt lgkmcnt(0)637; GFX1032-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]638; GFX1032-NEXT: s_waitcnt vmcnt(0)639; GFX1032-NEXT: v_add_co_u32 v0, vcc_lo, v0, s2640; GFX1032-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo641; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]642; GFX1032-NEXT: s_endpgm643;644; GFX1064-LABEL: test_addc_vop2b:645; GFX1064: ; %bb.0: ; %bb646; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24647; GFX1064-NEXT: v_lshlrev_b32_e32 v2, 3, v0648; GFX1064-NEXT: s_waitcnt lgkmcnt(0)649; GFX1064-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]650; GFX1064-NEXT: s_waitcnt vmcnt(0)651; GFX1064-NEXT: v_add_co_u32 v0, vcc, v0, s2652; GFX1064-NEXT: v_add_co_ci_u32_e32 v1, vcc, s3, v1, vcc653; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]654; GFX1064-NEXT: s_endpgm655bb:656 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()657 %tmp3 = getelementptr inbounds i64, ptr addrspace(1) %arg, i32 %tmp658 %tmp4 = load i64, ptr addrspace(1) %tmp3, align 8659 %tmp5 = add nsw i64 %tmp4, %arg1660 store i64 %tmp5, ptr addrspace(1) %tmp3, align 8661 ret void662}663 664define amdgpu_kernel void @test_subbrev_vop2b(ptr addrspace(1) %arg, i64 %arg1) #0 {665; GFX1032-LABEL: test_subbrev_vop2b:666; GFX1032: ; %bb.0: ; %bb667; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24668; GFX1032-NEXT: v_lshlrev_b32_e32 v2, 3, v0669; GFX1032-NEXT: s_waitcnt lgkmcnt(0)670; GFX1032-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]671; GFX1032-NEXT: s_waitcnt vmcnt(0)672; GFX1032-NEXT: v_sub_co_u32 v0, vcc_lo, v0, s2673; GFX1032-NEXT: v_subrev_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo674; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]675; GFX1032-NEXT: s_endpgm676;677; GFX1064-LABEL: test_subbrev_vop2b:678; GFX1064: ; %bb.0: ; %bb679; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24680; GFX1064-NEXT: v_lshlrev_b32_e32 v2, 3, v0681; GFX1064-NEXT: s_waitcnt lgkmcnt(0)682; GFX1064-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]683; GFX1064-NEXT: s_waitcnt vmcnt(0)684; GFX1064-NEXT: v_sub_co_u32 v0, vcc, v0, s2685; GFX1064-NEXT: v_subrev_co_ci_u32_e32 v1, vcc, s3, v1, vcc686; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]687; GFX1064-NEXT: s_endpgm688bb:689 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()690 %tmp3 = getelementptr inbounds i64, ptr addrspace(1) %arg, i32 %tmp691 %tmp4 = load i64, ptr addrspace(1) %tmp3, align 8692 %tmp5 = sub nsw i64 %tmp4, %arg1693 store i64 %tmp5, ptr addrspace(1) %tmp3, align 8694 ret void695}696 697define amdgpu_kernel void @test_subb_vop2b(ptr addrspace(1) %arg, i64 %arg1) #0 {698; GFX1032-LABEL: test_subb_vop2b:699; GFX1032: ; %bb.0: ; %bb700; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24701; GFX1032-NEXT: v_lshlrev_b32_e32 v2, 3, v0702; GFX1032-NEXT: s_waitcnt lgkmcnt(0)703; GFX1032-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]704; GFX1032-NEXT: s_waitcnt vmcnt(0)705; GFX1032-NEXT: v_sub_co_u32 v0, vcc_lo, s2, v0706; GFX1032-NEXT: v_sub_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo707; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]708; GFX1032-NEXT: s_endpgm709;710; GFX1064-LABEL: test_subb_vop2b:711; GFX1064: ; %bb.0: ; %bb712; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24713; GFX1064-NEXT: v_lshlrev_b32_e32 v2, 3, v0714; GFX1064-NEXT: s_waitcnt lgkmcnt(0)715; GFX1064-NEXT: global_load_dwordx2 v[0:1], v2, s[0:1]716; GFX1064-NEXT: s_waitcnt vmcnt(0)717; GFX1064-NEXT: v_sub_co_u32 v0, vcc, s2, v0718; GFX1064-NEXT: v_sub_co_ci_u32_e32 v1, vcc, s3, v1, vcc719; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]720; GFX1064-NEXT: s_endpgm721bb:722 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()723 %tmp3 = getelementptr inbounds i64, ptr addrspace(1) %arg, i32 %tmp724 %tmp4 = load i64, ptr addrspace(1) %tmp3, align 8725 %tmp5 = sub nsw i64 %arg1, %tmp4726 store i64 %tmp5, ptr addrspace(1) %tmp3, align 8727 ret void728}729 730define amdgpu_kernel void @test_udiv64(ptr addrspace(1) %arg) #0 {731; GFX1032-LABEL: test_udiv64:732; GFX1032: ; %bb.0: ; %bb733; GFX1032-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24734; GFX1032-NEXT: s_waitcnt lgkmcnt(0)735; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0736; GFX1032-NEXT: s_waitcnt lgkmcnt(0)737; GFX1032-NEXT: s_or_b64 s[4:5], s[2:3], s[0:1]738; GFX1032-NEXT: s_mov_b32 s4, 0739; GFX1032-NEXT: s_cmp_lg_u64 s[4:5], 0740; GFX1032-NEXT: s_cbranch_scc0 .LBB15_4741; GFX1032-NEXT: ; %bb.1:742; GFX1032-NEXT: v_cvt_f32_u32_e32 v0, s0743; GFX1032-NEXT: v_cvt_f32_u32_e32 v1, s1744; GFX1032-NEXT: s_sub_u32 s9, 0, s0745; GFX1032-NEXT: s_subb_u32 s10, 0, s1746; GFX1032-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v0747; GFX1032-NEXT: v_rcp_f32_e32 v0, v0748; GFX1032-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0749; GFX1032-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0750; GFX1032-NEXT: v_trunc_f32_e32 v1, v1751; GFX1032-NEXT: v_madmk_f32 v0, v1, 0xcf800000, v0752; GFX1032-NEXT: v_cvt_u32_f32_e32 v1, v1753; GFX1032-NEXT: v_cvt_u32_f32_e32 v0, v0754; GFX1032-NEXT: v_readfirstlane_b32 s5, v1755; GFX1032-NEXT: v_readfirstlane_b32 s8, v0756; GFX1032-NEXT: s_mul_i32 s11, s9, s5757; GFX1032-NEXT: s_mul_hi_u32 s13, s9, s8758; GFX1032-NEXT: s_mul_i32 s12, s10, s8759; GFX1032-NEXT: s_add_i32 s11, s13, s11760; GFX1032-NEXT: s_mul_i32 s14, s9, s8761; GFX1032-NEXT: s_add_i32 s11, s11, s12762; GFX1032-NEXT: s_mul_hi_u32 s13, s8, s14763; GFX1032-NEXT: s_mul_i32 s16, s8, s11764; GFX1032-NEXT: s_mul_hi_u32 s15, s5, s14765; GFX1032-NEXT: s_mul_i32 s12, s5, s14766; GFX1032-NEXT: s_mul_hi_u32 s14, s8, s11767; GFX1032-NEXT: s_add_u32 s13, s13, s16768; GFX1032-NEXT: s_addc_u32 s14, 0, s14769; GFX1032-NEXT: s_mul_hi_u32 s17, s5, s11770; GFX1032-NEXT: s_add_u32 s12, s13, s12771; GFX1032-NEXT: s_mul_i32 s11, s5, s11772; GFX1032-NEXT: s_addc_u32 s12, s14, s15773; GFX1032-NEXT: s_addc_u32 s13, s17, 0774; GFX1032-NEXT: s_add_u32 s11, s12, s11775; GFX1032-NEXT: s_addc_u32 s12, 0, s13776; GFX1032-NEXT: s_add_u32 s8, s8, s11777; GFX1032-NEXT: s_addc_u32 s5, s5, s12778; GFX1032-NEXT: s_mul_hi_u32 s11, s9, s8779; GFX1032-NEXT: s_mul_i32 s12, s9, s8780; GFX1032-NEXT: s_mul_i32 s9, s9, s5781; GFX1032-NEXT: s_mul_i32 s10, s10, s8782; GFX1032-NEXT: s_add_i32 s9, s11, s9783; GFX1032-NEXT: s_mul_i32 s11, s5, s12784; GFX1032-NEXT: s_add_i32 s9, s9, s10785; GFX1032-NEXT: s_mul_hi_u32 s10, s8, s12786; GFX1032-NEXT: s_mul_i32 s15, s8, s9787; GFX1032-NEXT: s_mul_hi_u32 s14, s8, s9788; GFX1032-NEXT: s_add_u32 s10, s10, s15789; GFX1032-NEXT: s_mul_hi_u32 s13, s5, s12790; GFX1032-NEXT: s_addc_u32 s14, 0, s14791; GFX1032-NEXT: s_mul_hi_u32 s12, s5, s9792; GFX1032-NEXT: s_add_u32 s10, s10, s11793; GFX1032-NEXT: s_mul_i32 s9, s5, s9794; GFX1032-NEXT: s_addc_u32 s10, s14, s13795; GFX1032-NEXT: s_addc_u32 s11, s12, 0796; GFX1032-NEXT: s_add_u32 s9, s10, s9797; GFX1032-NEXT: s_addc_u32 s10, 0, s11798; GFX1032-NEXT: s_add_u32 s8, s8, s9799; GFX1032-NEXT: s_addc_u32 s5, s5, s10800; GFX1032-NEXT: s_mul_hi_u32 s9, s2, s8801; GFX1032-NEXT: s_mul_i32 s12, s2, s5802; GFX1032-NEXT: s_mul_hi_u32 s11, s2, s5803; GFX1032-NEXT: s_mul_hi_u32 s10, s3, s8804; GFX1032-NEXT: s_mul_i32 s8, s3, s8805; GFX1032-NEXT: s_add_u32 s9, s9, s12806; GFX1032-NEXT: s_addc_u32 s11, 0, s11807; GFX1032-NEXT: s_mul_hi_u32 s13, s3, s5808; GFX1032-NEXT: s_add_u32 s8, s9, s8809; GFX1032-NEXT: s_mul_i32 s5, s3, s5810; GFX1032-NEXT: s_addc_u32 s8, s11, s10811; GFX1032-NEXT: s_addc_u32 s9, s13, 0812; GFX1032-NEXT: s_add_u32 s5, s8, s5813; GFX1032-NEXT: s_addc_u32 s8, 0, s9814; GFX1032-NEXT: s_mul_hi_u32 s9, s0, s5815; GFX1032-NEXT: s_mul_i32 s10, s0, s8816; GFX1032-NEXT: s_mul_i32 s11, s1, s5817; GFX1032-NEXT: s_add_i32 s9, s9, s10818; GFX1032-NEXT: s_mul_i32 s10, s0, s5819; GFX1032-NEXT: s_add_i32 s9, s9, s11820; GFX1032-NEXT: s_sub_i32 s11, s3, s9821; GFX1032-NEXT: s_sub_u32 s10, s2, s10822; GFX1032-NEXT: s_cselect_b32 s12, -1, 0823; GFX1032-NEXT: s_subb_u32 s11, s11, s1824; GFX1032-NEXT: s_sub_u32 s13, s10, s0825; GFX1032-NEXT: s_subb_u32 s11, s11, 0826; GFX1032-NEXT: s_cmp_ge_u32 s11, s1827; GFX1032-NEXT: s_cselect_b32 s14, -1, 0828; GFX1032-NEXT: s_cmp_ge_u32 s13, s0829; GFX1032-NEXT: s_cselect_b32 s13, -1, 0830; GFX1032-NEXT: s_cmp_eq_u32 s11, s1831; GFX1032-NEXT: s_cselect_b32 s11, s13, s14832; GFX1032-NEXT: s_add_u32 s13, s5, 1833; GFX1032-NEXT: s_addc_u32 s14, s8, 0834; GFX1032-NEXT: s_add_u32 s15, s5, 2835; GFX1032-NEXT: s_addc_u32 s16, s8, 0836; GFX1032-NEXT: s_cmp_lg_u32 s11, 0837; GFX1032-NEXT: s_cselect_b32 s11, s15, s13838; GFX1032-NEXT: s_cselect_b32 s13, s16, s14839; GFX1032-NEXT: s_cmp_lg_u32 s12, 0840; GFX1032-NEXT: s_subb_u32 s3, s3, s9841; GFX1032-NEXT: s_cmp_ge_u32 s3, s1842; GFX1032-NEXT: s_cselect_b32 s9, -1, 0843; GFX1032-NEXT: s_cmp_ge_u32 s10, s0844; GFX1032-NEXT: s_cselect_b32 s10, -1, 0845; GFX1032-NEXT: s_cmp_eq_u32 s3, s1846; GFX1032-NEXT: s_cselect_b32 s1, s10, s9847; GFX1032-NEXT: s_cmp_lg_u32 s1, 0848; GFX1032-NEXT: s_cselect_b32 s9, s13, s8849; GFX1032-NEXT: s_cselect_b32 s8, s11, s5850; GFX1032-NEXT: s_andn2_b32 vcc_lo, exec_lo, s4851; GFX1032-NEXT: s_cbranch_vccnz .LBB15_3852; GFX1032-NEXT: .LBB15_2:853; GFX1032-NEXT: v_cvt_f32_u32_e32 v0, s0854; GFX1032-NEXT: s_sub_i32 s3, 0, s0855; GFX1032-NEXT: s_mov_b32 s9, 0856; GFX1032-NEXT: v_rcp_iflag_f32_e32 v0, v0857; GFX1032-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0858; GFX1032-NEXT: v_cvt_u32_f32_e32 v0, v0859; GFX1032-NEXT: v_readfirstlane_b32 s1, v0860; GFX1032-NEXT: s_mul_i32 s3, s3, s1861; GFX1032-NEXT: s_mul_hi_u32 s3, s1, s3862; GFX1032-NEXT: s_add_i32 s1, s1, s3863; GFX1032-NEXT: s_mul_hi_u32 s1, s2, s1864; GFX1032-NEXT: s_mul_i32 s3, s1, s0865; GFX1032-NEXT: s_sub_i32 s2, s2, s3866; GFX1032-NEXT: s_add_i32 s3, s1, 1867; GFX1032-NEXT: s_sub_i32 s4, s2, s0868; GFX1032-NEXT: s_cmp_ge_u32 s2, s0869; GFX1032-NEXT: s_cselect_b32 s1, s3, s1870; GFX1032-NEXT: s_cselect_b32 s2, s4, s2871; GFX1032-NEXT: s_add_i32 s3, s1, 1872; GFX1032-NEXT: s_cmp_ge_u32 s2, s0873; GFX1032-NEXT: s_cselect_b32 s8, s3, s1874; GFX1032-NEXT: .LBB15_3:875; GFX1032-NEXT: v_mov_b32_e32 v0, s8876; GFX1032-NEXT: v_mov_b32_e32 v2, 0877; GFX1032-NEXT: v_mov_b32_e32 v1, s9878; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7] offset:16879; GFX1032-NEXT: s_endpgm880; GFX1032-NEXT: .LBB15_4:881; GFX1032-NEXT: ; implicit-def: $sgpr8_sgpr9882; GFX1032-NEXT: s_branch .LBB15_2883;884; GFX1064-LABEL: test_udiv64:885; GFX1064: ; %bb.0: ; %bb886; GFX1064-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24887; GFX1064-NEXT: s_waitcnt lgkmcnt(0)888; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0889; GFX1064-NEXT: s_waitcnt lgkmcnt(0)890; GFX1064-NEXT: s_or_b64 s[4:5], s[2:3], s[0:1]891; GFX1064-NEXT: s_mov_b32 s4, 0892; GFX1064-NEXT: s_cmp_lg_u64 s[4:5], 0893; GFX1064-NEXT: s_cbranch_scc0 .LBB15_4894; GFX1064-NEXT: ; %bb.1:895; GFX1064-NEXT: v_cvt_f32_u32_e32 v0, s0896; GFX1064-NEXT: v_cvt_f32_u32_e32 v1, s1897; GFX1064-NEXT: s_sub_u32 s8, 0, s0898; GFX1064-NEXT: s_subb_u32 s9, 0, s1899; GFX1064-NEXT: v_madmk_f32 v0, v1, 0x4f800000, v0900; GFX1064-NEXT: v_rcp_f32_e32 v0, v0901; GFX1064-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0902; GFX1064-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0903; GFX1064-NEXT: v_trunc_f32_e32 v1, v1904; GFX1064-NEXT: v_madmk_f32 v0, v1, 0xcf800000, v0905; GFX1064-NEXT: v_cvt_u32_f32_e32 v1, v1906; GFX1064-NEXT: v_cvt_u32_f32_e32 v0, v0907; GFX1064-NEXT: v_readfirstlane_b32 s4, v1908; GFX1064-NEXT: v_readfirstlane_b32 s5, v0909; GFX1064-NEXT: s_mul_i32 s10, s8, s4910; GFX1064-NEXT: s_mul_hi_u32 s12, s8, s5911; GFX1064-NEXT: s_mul_i32 s11, s9, s5912; GFX1064-NEXT: s_add_i32 s10, s12, s10913; GFX1064-NEXT: s_mul_i32 s13, s8, s5914; GFX1064-NEXT: s_add_i32 s10, s10, s11915; GFX1064-NEXT: s_mul_hi_u32 s12, s5, s13916; GFX1064-NEXT: s_mul_i32 s15, s5, s10917; GFX1064-NEXT: s_mul_hi_u32 s14, s4, s13918; GFX1064-NEXT: s_mul_i32 s11, s4, s13919; GFX1064-NEXT: s_mul_hi_u32 s13, s5, s10920; GFX1064-NEXT: s_add_u32 s12, s12, s15921; GFX1064-NEXT: s_addc_u32 s13, 0, s13922; GFX1064-NEXT: s_mul_hi_u32 s16, s4, s10923; GFX1064-NEXT: s_add_u32 s11, s12, s11924; GFX1064-NEXT: s_mul_i32 s10, s4, s10925; GFX1064-NEXT: s_addc_u32 s11, s13, s14926; GFX1064-NEXT: s_addc_u32 s12, s16, 0927; GFX1064-NEXT: s_add_u32 s10, s11, s10928; GFX1064-NEXT: s_addc_u32 s11, 0, s12929; GFX1064-NEXT: s_add_u32 s5, s5, s10930; GFX1064-NEXT: s_addc_u32 s4, s4, s11931; GFX1064-NEXT: s_mul_hi_u32 s10, s8, s5932; GFX1064-NEXT: s_mul_i32 s11, s8, s5933; GFX1064-NEXT: s_mul_i32 s8, s8, s4934; GFX1064-NEXT: s_mul_i32 s9, s9, s5935; GFX1064-NEXT: s_add_i32 s8, s10, s8936; GFX1064-NEXT: s_mul_i32 s10, s4, s11937; GFX1064-NEXT: s_add_i32 s8, s8, s9938; GFX1064-NEXT: s_mul_hi_u32 s9, s5, s11939; GFX1064-NEXT: s_mul_i32 s14, s5, s8940; GFX1064-NEXT: s_mul_hi_u32 s13, s5, s8941; GFX1064-NEXT: s_add_u32 s9, s9, s14942; GFX1064-NEXT: s_mul_hi_u32 s12, s4, s11943; GFX1064-NEXT: s_addc_u32 s13, 0, s13944; GFX1064-NEXT: s_mul_hi_u32 s11, s4, s8945; GFX1064-NEXT: s_add_u32 s9, s9, s10946; GFX1064-NEXT: s_mul_i32 s8, s4, s8947; GFX1064-NEXT: s_addc_u32 s9, s13, s12948; GFX1064-NEXT: s_addc_u32 s10, s11, 0949; GFX1064-NEXT: s_add_u32 s8, s9, s8950; GFX1064-NEXT: s_addc_u32 s9, 0, s10951; GFX1064-NEXT: s_add_u32 s5, s5, s8952; GFX1064-NEXT: s_addc_u32 s4, s4, s9953; GFX1064-NEXT: s_mul_hi_u32 s8, s2, s5954; GFX1064-NEXT: s_mul_i32 s11, s2, s4955; GFX1064-NEXT: s_mul_hi_u32 s10, s2, s4956; GFX1064-NEXT: s_mul_hi_u32 s9, s3, s5957; GFX1064-NEXT: s_mul_i32 s5, s3, s5958; GFX1064-NEXT: s_add_u32 s8, s8, s11959; GFX1064-NEXT: s_addc_u32 s10, 0, s10960; GFX1064-NEXT: s_mul_hi_u32 s12, s3, s4961; GFX1064-NEXT: s_add_u32 s5, s8, s5962; GFX1064-NEXT: s_mul_i32 s4, s3, s4963; GFX1064-NEXT: s_addc_u32 s5, s10, s9964; GFX1064-NEXT: s_addc_u32 s8, s12, 0965; GFX1064-NEXT: s_add_u32 s10, s5, s4966; GFX1064-NEXT: s_addc_u32 s11, 0, s8967; GFX1064-NEXT: s_mul_hi_u32 s4, s0, s10968; GFX1064-NEXT: s_mul_i32 s5, s0, s11969; GFX1064-NEXT: s_mul_i32 s8, s1, s10970; GFX1064-NEXT: s_add_i32 s4, s4, s5971; GFX1064-NEXT: s_add_i32 s8, s4, s8972; GFX1064-NEXT: s_mul_i32 s4, s0, s10973; GFX1064-NEXT: s_sub_i32 s9, s3, s8974; GFX1064-NEXT: s_sub_u32 s12, s2, s4975; GFX1064-NEXT: s_cselect_b64 s[4:5], -1, 0976; GFX1064-NEXT: s_subb_u32 s9, s9, s1977; GFX1064-NEXT: s_sub_u32 s13, s12, s0978; GFX1064-NEXT: s_subb_u32 s9, s9, 0979; GFX1064-NEXT: s_cmp_ge_u32 s9, s1980; GFX1064-NEXT: s_cselect_b32 s14, -1, 0981; GFX1064-NEXT: s_cmp_ge_u32 s13, s0982; GFX1064-NEXT: s_cselect_b32 s13, -1, 0983; GFX1064-NEXT: s_cmp_eq_u32 s9, s1984; GFX1064-NEXT: s_cselect_b32 s9, s13, s14985; GFX1064-NEXT: s_add_u32 s13, s10, 1986; GFX1064-NEXT: s_addc_u32 s14, s11, 0987; GFX1064-NEXT: s_add_u32 s15, s10, 2988; GFX1064-NEXT: s_addc_u32 s16, s11, 0989; GFX1064-NEXT: s_cmp_lg_u32 s9, 0990; GFX1064-NEXT: s_cselect_b32 s13, s15, s13991; GFX1064-NEXT: s_cselect_b32 s14, s16, s14992; GFX1064-NEXT: s_cmp_lg_u64 s[4:5], 0993; GFX1064-NEXT: s_subb_u32 s3, s3, s8994; GFX1064-NEXT: s_cmp_ge_u32 s3, s1995; GFX1064-NEXT: s_cselect_b32 s4, -1, 0996; GFX1064-NEXT: s_cmp_ge_u32 s12, s0997; GFX1064-NEXT: s_cselect_b32 s5, -1, 0998; GFX1064-NEXT: s_cmp_eq_u32 s3, s1999; GFX1064-NEXT: s_cselect_b32 s1, s5, s41000; GFX1064-NEXT: s_cmp_lg_u32 s1, 01001; GFX1064-NEXT: s_cselect_b32 s5, s14, s111002; GFX1064-NEXT: s_cselect_b32 s4, s13, s101003; GFX1064-NEXT: s_cbranch_execnz .LBB15_31004; GFX1064-NEXT: .LBB15_2:1005; GFX1064-NEXT: v_cvt_f32_u32_e32 v0, s01006; GFX1064-NEXT: s_sub_i32 s3, 0, s01007; GFX1064-NEXT: s_mov_b32 s5, 01008; GFX1064-NEXT: v_rcp_iflag_f32_e32 v0, v01009; GFX1064-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v01010; GFX1064-NEXT: v_cvt_u32_f32_e32 v0, v01011; GFX1064-NEXT: v_readfirstlane_b32 s1, v01012; GFX1064-NEXT: s_mul_i32 s3, s3, s11013; GFX1064-NEXT: s_mul_hi_u32 s3, s1, s31014; GFX1064-NEXT: s_add_i32 s1, s1, s31015; GFX1064-NEXT: s_mul_hi_u32 s1, s2, s11016; GFX1064-NEXT: s_mul_i32 s3, s1, s01017; GFX1064-NEXT: s_sub_i32 s2, s2, s31018; GFX1064-NEXT: s_add_i32 s3, s1, 11019; GFX1064-NEXT: s_sub_i32 s4, s2, s01020; GFX1064-NEXT: s_cmp_ge_u32 s2, s01021; GFX1064-NEXT: s_cselect_b32 s1, s3, s11022; GFX1064-NEXT: s_cselect_b32 s2, s4, s21023; GFX1064-NEXT: s_add_i32 s3, s1, 11024; GFX1064-NEXT: s_cmp_ge_u32 s2, s01025; GFX1064-NEXT: s_cselect_b32 s4, s3, s11026; GFX1064-NEXT: .LBB15_3:1027; GFX1064-NEXT: v_mov_b32_e32 v0, s41028; GFX1064-NEXT: v_mov_b32_e32 v2, 01029; GFX1064-NEXT: v_mov_b32_e32 v1, s51030; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7] offset:161031; GFX1064-NEXT: s_endpgm1032; GFX1064-NEXT: .LBB15_4:1033; GFX1064-NEXT: ; implicit-def: $sgpr4_sgpr51034; GFX1064-NEXT: s_branch .LBB15_21035bb:1036 %tmp = getelementptr inbounds i64, ptr addrspace(1) %arg, i64 11037 %tmp1 = load i64, ptr addrspace(1) %tmp, align 81038 %tmp2 = load i64, ptr addrspace(1) %arg, align 81039 %tmp3 = udiv i64 %tmp1, %tmp21040 %tmp4 = getelementptr inbounds i64, ptr addrspace(1) %arg, i64 21041 store i64 %tmp3, ptr addrspace(1) %tmp4, align 81042 ret void1043}1044 1045define amdgpu_kernel void @test_div_scale_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {1046; GFX1032-LABEL: test_div_scale_f32:1047; GFX1032: ; %bb.0:1048; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241049; GFX1032-NEXT: v_lshlrev_b32_e32 v0, 2, v01050; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1051; GFX1032-NEXT: global_load_dword v1, v0, s[2:3] glc dlc1052; GFX1032-NEXT: s_waitcnt vmcnt(0)1053; GFX1032-NEXT: global_load_dword v2, v0, s[2:3] offset:4 glc dlc1054; GFX1032-NEXT: s_waitcnt vmcnt(0)1055; GFX1032-NEXT: v_mov_b32_e32 v0, 01056; GFX1032-NEXT: v_div_scale_f32 v1, s2, v2, v2, v11057; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]1058; GFX1032-NEXT: s_endpgm1059;1060; GFX1064-LABEL: test_div_scale_f32:1061; GFX1064: ; %bb.0:1062; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241063; GFX1064-NEXT: v_lshlrev_b32_e32 v0, 2, v01064; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1065; GFX1064-NEXT: global_load_dword v1, v0, s[2:3] glc dlc1066; GFX1064-NEXT: s_waitcnt vmcnt(0)1067; GFX1064-NEXT: global_load_dword v2, v0, s[2:3] offset:4 glc dlc1068; GFX1064-NEXT: s_waitcnt vmcnt(0)1069; GFX1064-NEXT: v_mov_b32_e32 v0, 01070; GFX1064-NEXT: v_div_scale_f32 v1, s[2:3], v2, v2, v11071; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]1072; GFX1064-NEXT: s_endpgm1073 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone1074 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid1075 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 11076 1077 %a = load volatile float, ptr addrspace(1) %gep.0, align 41078 %b = load volatile float, ptr addrspace(1) %gep.1, align 41079 1080 %result = call { float, i1 } @llvm.amdgcn.div.scale.f32(float %a, float %b, i1 false) nounwind readnone1081 %result0 = extractvalue { float, i1 } %result, 01082 store float %result0, ptr addrspace(1) %out, align 41083 ret void1084}1085 1086define amdgpu_kernel void @test_div_scale_f64(ptr addrspace(1) %out, ptr addrspace(1) %aptr, ptr addrspace(1) %in) #0 {1087; GFX1032-LABEL: test_div_scale_f64:1088; GFX1032: ; %bb.0:1089; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341090; GFX1032-NEXT: v_lshlrev_b32_e32 v4, 3, v01091; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1092; GFX1032-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1] glc dlc1093; GFX1032-NEXT: s_waitcnt vmcnt(0)1094; GFX1032-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1] offset:8 glc dlc1095; GFX1032-NEXT: s_waitcnt vmcnt(0)1096; GFX1032-NEXT: v_div_scale_f64 v[0:1], s0, v[0:1], v[2:3], v[0:1]1097; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241098; GFX1032-NEXT: v_mov_b32_e32 v2, 01099; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1100; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1101; GFX1032-NEXT: s_endpgm1102;1103; GFX1064-LABEL: test_div_scale_f64:1104; GFX1064: ; %bb.0:1105; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341106; GFX1064-NEXT: v_lshlrev_b32_e32 v4, 3, v01107; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1108; GFX1064-NEXT: global_load_dwordx2 v[0:1], v4, s[0:1] glc dlc1109; GFX1064-NEXT: s_waitcnt vmcnt(0)1110; GFX1064-NEXT: global_load_dwordx2 v[2:3], v4, s[0:1] offset:8 glc dlc1111; GFX1064-NEXT: s_waitcnt vmcnt(0)1112; GFX1064-NEXT: v_div_scale_f64 v[0:1], s[0:1], v[0:1], v[2:3], v[0:1]1113; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241114; GFX1064-NEXT: v_mov_b32_e32 v2, 01115; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1116; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1117; GFX1064-NEXT: s_endpgm1118 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone1119 %gep.0 = getelementptr double, ptr addrspace(1) %in, i32 %tid1120 %gep.1 = getelementptr double, ptr addrspace(1) %gep.0, i32 11121 1122 %a = load volatile double, ptr addrspace(1) %gep.0, align 81123 %b = load volatile double, ptr addrspace(1) %gep.1, align 81124 1125 %result = call { double, i1 } @llvm.amdgcn.div.scale.f64(double %a, double %b, i1 true) nounwind readnone1126 %result0 = extractvalue { double, i1 } %result, 01127 store double %result0, ptr addrspace(1) %out, align 81128 ret void1129}1130 1131define i64 @test_mad_i64_i32(i32 %arg0, i32 %arg1, i64 %arg2) #0 {1132; GFX1032-LABEL: test_mad_i64_i32:1133; GFX1032: ; %bb.0:1134; GFX1032-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1135; GFX1032-NEXT: v_mad_i64_i32 v[0:1], s4, v0, v1, v[2:3]1136; GFX1032-NEXT: s_setpc_b64 s[30:31]1137;1138; GFX1064-LABEL: test_mad_i64_i32:1139; GFX1064: ; %bb.0:1140; GFX1064-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1141; GFX1064-NEXT: v_mad_i64_i32 v[0:1], s[4:5], v0, v1, v[2:3]1142; GFX1064-NEXT: s_setpc_b64 s[30:31]1143 %sext0 = sext i32 %arg0 to i641144 %sext1 = sext i32 %arg1 to i641145 %mul = mul i64 %sext0, %sext11146 %mad = add i64 %mul, %arg21147 ret i64 %mad1148}1149 1150define i64 @test_mad_u64_u32(i32 %arg0, i32 %arg1, i64 %arg2) #0 {1151; GFX1032-LABEL: test_mad_u64_u32:1152; GFX1032: ; %bb.0:1153; GFX1032-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1154; GFX1032-NEXT: v_mad_u64_u32 v[0:1], s4, v0, v1, v[2:3]1155; GFX1032-NEXT: s_setpc_b64 s[30:31]1156;1157; GFX1064-LABEL: test_mad_u64_u32:1158; GFX1064: ; %bb.0:1159; GFX1064-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1160; GFX1064-NEXT: v_mad_u64_u32 v[0:1], s[4:5], v0, v1, v[2:3]1161; GFX1064-NEXT: s_setpc_b64 s[30:31]1162 %sext0 = zext i32 %arg0 to i641163 %sext1 = zext i32 %arg1 to i641164 %mul = mul i64 %sext0, %sext11165 %mad = add i64 %mul, %arg21166 ret i64 %mad1167}1168 1169define amdgpu_kernel void @test_div_fmas_f32(ptr addrspace(1) %out, float %a, float %b, float %c, i1 %d) nounwind {1170; GFX1032-LABEL: test_div_fmas_f32:1171; GFX1032: ; %bb.0:1172; GFX1032-NEXT: s_clause 0x11173; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1174; GFX1032-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241175; GFX1032-NEXT: v_mov_b32_e32 v2, 01176; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1177; GFX1032-NEXT: v_mov_b32_e32 v0, s11178; GFX1032-NEXT: v_mov_b32_e32 v1, s21179; GFX1032-NEXT: s_bitcmp1_b32 s3, 01180; GFX1032-NEXT: s_cselect_b32 vcc_lo, -1, 01181; GFX1032-NEXT: v_div_fmas_f32 v0, s0, v0, v11182; GFX1032-NEXT: global_store_dword v2, v0, s[6:7]1183; GFX1032-NEXT: s_endpgm1184;1185; GFX1064-LABEL: test_div_fmas_f32:1186; GFX1064: ; %bb.0:1187; GFX1064-NEXT: s_clause 0x11188; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1189; GFX1064-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241190; GFX1064-NEXT: v_mov_b32_e32 v2, 01191; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1192; GFX1064-NEXT: v_mov_b32_e32 v0, s11193; GFX1064-NEXT: v_mov_b32_e32 v1, s21194; GFX1064-NEXT: s_bitcmp1_b32 s3, 01195; GFX1064-NEXT: s_cselect_b64 vcc, -1, 01196; GFX1064-NEXT: v_div_fmas_f32 v0, s0, v0, v11197; GFX1064-NEXT: global_store_dword v2, v0, s[6:7]1198; GFX1064-NEXT: s_endpgm1199 %result = call float @llvm.amdgcn.div.fmas.f32(float %a, float %b, float %c, i1 %d) nounwind readnone1200 store float %result, ptr addrspace(1) %out, align 41201 ret void1202}1203 1204define amdgpu_kernel void @test_div_fmas_f64(ptr addrspace(1) %out, double %a, double %b, double %c, i1 %d) nounwind {1205; GFX1032-LABEL: test_div_fmas_f64:1206; GFX1032: ; %bb.0:1207; GFX1032-NEXT: s_clause 0x11208; GFX1032-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241209; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x441210; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1211; GFX1032-NEXT: v_mov_b32_e32 v0, s121212; GFX1032-NEXT: v_mov_b32_e32 v1, s131213; GFX1032-NEXT: v_mov_b32_e32 v2, s141214; GFX1032-NEXT: v_mov_b32_e32 v3, s151215; GFX1032-NEXT: s_bitcmp1_b32 s0, 01216; GFX1032-NEXT: s_cselect_b32 vcc_lo, -1, 01217; GFX1032-NEXT: v_div_fmas_f64 v[0:1], s[10:11], v[0:1], v[2:3]1218; GFX1032-NEXT: v_mov_b32_e32 v2, 01219; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]1220; GFX1032-NEXT: s_endpgm1221;1222; GFX1064-LABEL: test_div_fmas_f64:1223; GFX1064: ; %bb.0:1224; GFX1064-NEXT: s_clause 0x11225; GFX1064-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241226; GFX1064-NEXT: s_load_dword s0, s[4:5], 0x441227; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1228; GFX1064-NEXT: v_mov_b32_e32 v0, s121229; GFX1064-NEXT: v_mov_b32_e32 v1, s131230; GFX1064-NEXT: v_mov_b32_e32 v2, s141231; GFX1064-NEXT: v_mov_b32_e32 v3, s151232; GFX1064-NEXT: s_bitcmp1_b32 s0, 01233; GFX1064-NEXT: s_cselect_b64 vcc, -1, 01234; GFX1064-NEXT: v_div_fmas_f64 v[0:1], s[10:11], v[0:1], v[2:3]1235; GFX1064-NEXT: v_mov_b32_e32 v2, 01236; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[8:9]1237; GFX1064-NEXT: s_endpgm1238 %result = call double @llvm.amdgcn.div.fmas.f64(double %a, double %b, double %c, i1 %d) nounwind readnone1239 store double %result, ptr addrspace(1) %out, align 81240 ret void1241}1242 1243 1244 1245define amdgpu_kernel void @test_div_fmas_f32_i1_phi_vcc(ptr addrspace(1) %out, ptr addrspace(1) %in, ptr addrspace(1) %dummy) #0 {1246; GFX1032-LABEL: test_div_fmas_f32_i1_phi_vcc:1247; GFX1032: ; %bb.0: ; %entry1248; GFX1032-NEXT: s_clause 0x11249; GFX1032-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241250; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x341251; GFX1032-NEXT: v_lshlrev_b32_e32 v1, 2, v01252; GFX1032-NEXT: v_cmp_eq_u32_e64 s0, 0, v01253; GFX1032-NEXT: s_mov_b32 vcc_lo, 01254; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1255; GFX1032-NEXT: global_load_dwordx3 v[1:3], v1, s[10:11]1256; GFX1032-NEXT: s_and_saveexec_b32 s1, s01257; GFX1032-NEXT: s_cbranch_execz .LBB22_21258; GFX1032-NEXT: ; %bb.1: ; %bb1259; GFX1032-NEXT: v_mov_b32_e32 v0, 01260; GFX1032-NEXT: global_load_dword v0, v0, s[2:3] glc dlc1261; GFX1032-NEXT: s_waitcnt vmcnt(0)1262; GFX1032-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v01263; GFX1032-NEXT: s_and_b32 vcc_lo, vcc_lo, exec_lo1264; GFX1032-NEXT: .LBB22_2: ; %exit1265; GFX1032-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)1266; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s11267; GFX1032-NEXT: v_mov_b32_e32 v0, 01268; GFX1032-NEXT: s_waitcnt vmcnt(0)1269; GFX1032-NEXT: v_div_fmas_f32 v1, v1, v2, v31270; GFX1032-NEXT: global_store_dword v0, v1, s[8:9] offset:81271; GFX1032-NEXT: s_endpgm1272;1273; GFX1064-LABEL: test_div_fmas_f32_i1_phi_vcc:1274; GFX1064: ; %bb.0: ; %entry1275; GFX1064-NEXT: s_clause 0x11276; GFX1064-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241277; GFX1064-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341278; GFX1064-NEXT: v_lshlrev_b32_e32 v1, 2, v01279; GFX1064-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v01280; GFX1064-NEXT: s_mov_b64 vcc, 01281; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1282; GFX1064-NEXT: global_load_dwordx3 v[1:3], v1, s[10:11]1283; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]1284; GFX1064-NEXT: s_cbranch_execz .LBB22_21285; GFX1064-NEXT: ; %bb.1: ; %bb1286; GFX1064-NEXT: v_mov_b32_e32 v0, 01287; GFX1064-NEXT: global_load_dword v0, v0, s[6:7] glc dlc1288; GFX1064-NEXT: s_waitcnt vmcnt(0)1289; GFX1064-NEXT: v_cmp_ne_u32_e32 vcc, 0, v01290; GFX1064-NEXT: s_and_b64 vcc, vcc, exec1291; GFX1064-NEXT: .LBB22_2: ; %exit1292; GFX1064-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)1293; GFX1064-NEXT: s_or_b64 exec, exec, s[2:3]1294; GFX1064-NEXT: v_mov_b32_e32 v0, 01295; GFX1064-NEXT: s_waitcnt vmcnt(0)1296; GFX1064-NEXT: v_div_fmas_f32 v1, v1, v2, v31297; GFX1064-NEXT: global_store_dword v0, v1, s[8:9] offset:81298; GFX1064-NEXT: s_endpgm1299entry:1300 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone1301 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 21302 %gep.a = getelementptr float, ptr addrspace(1) %in, i32 %tid1303 %gep.b = getelementptr float, ptr addrspace(1) %gep.a, i32 11304 %gep.c = getelementptr float, ptr addrspace(1) %gep.a, i32 21305 1306 %a = load float, ptr addrspace(1) %gep.a1307 %b = load float, ptr addrspace(1) %gep.b1308 %c = load float, ptr addrspace(1) %gep.c1309 1310 %cmp0 = icmp eq i32 %tid, 01311 br i1 %cmp0, label %bb, label %exit1312 1313bb:1314 %val = load volatile i32, ptr addrspace(1) %dummy1315 %cmp1 = icmp ne i32 %val, 01316 br label %exit1317 1318exit:1319 %cond = phi i1 [false, %entry], [%cmp1, %bb]1320 %result = call float @llvm.amdgcn.div.fmas.f32(float %a, float %b, float %c, i1 %cond) nounwind readnone1321 store float %result, ptr addrspace(1) %gep.out, align 41322 ret void1323}1324 1325 1326define amdgpu_kernel void @fdiv_f32(ptr addrspace(1) %out, float %a, float %b) #0 {1327; GFX1032-LABEL: fdiv_f32:1328; GFX1032: ; %bb.0: ; %entry1329; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241330; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1331; GFX1032-NEXT: v_div_scale_f32 v0, s4, s3, s3, s21332; GFX1032-NEXT: v_rcp_f32_e32 v1, v01333; GFX1032-NEXT: v_fma_f32 v2, -v0, v1, 1.01334; GFX1032-NEXT: v_fmac_f32_e32 v1, v2, v11335; GFX1032-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s21336; GFX1032-NEXT: v_mul_f32_e32 v3, v2, v11337; GFX1032-NEXT: v_fma_f32 v4, -v0, v3, v21338; GFX1032-NEXT: v_fmac_f32_e32 v3, v4, v11339; GFX1032-NEXT: v_fma_f32 v0, -v0, v3, v21340; GFX1032-NEXT: v_div_fmas_f32 v0, v0, v1, v31341; GFX1032-NEXT: v_mov_b32_e32 v1, 01342; GFX1032-NEXT: v_div_fixup_f32 v0, v0, s3, s21343; GFX1032-NEXT: global_store_dword v1, v0, s[0:1]1344; GFX1032-NEXT: s_endpgm1345;1346; GFX1064-LABEL: fdiv_f32:1347; GFX1064: ; %bb.0: ; %entry1348; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241349; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1350; GFX1064-NEXT: v_div_scale_f32 v0, s[4:5], s3, s3, s21351; GFX1064-NEXT: v_rcp_f32_e32 v1, v01352; GFX1064-NEXT: v_fma_f32 v2, -v0, v1, 1.01353; GFX1064-NEXT: v_fmac_f32_e32 v1, v2, v11354; GFX1064-NEXT: v_div_scale_f32 v2, vcc, s2, s3, s21355; GFX1064-NEXT: v_mul_f32_e32 v3, v2, v11356; GFX1064-NEXT: v_fma_f32 v4, -v0, v3, v21357; GFX1064-NEXT: v_fmac_f32_e32 v3, v4, v11358; GFX1064-NEXT: v_fma_f32 v0, -v0, v3, v21359; GFX1064-NEXT: v_div_fmas_f32 v0, v0, v1, v31360; GFX1064-NEXT: v_mov_b32_e32 v1, 01361; GFX1064-NEXT: v_div_fixup_f32 v0, v0, s3, s21362; GFX1064-NEXT: global_store_dword v1, v0, s[0:1]1363; GFX1064-NEXT: s_endpgm1364entry:1365 %fdiv = fdiv float %a, %b1366 store float %fdiv, ptr addrspace(1) %out1367 ret void1368}1369 1370define amdgpu_kernel void @test_br_cc_f16(1371; GFX1032-LABEL: test_br_cc_f16:1372; GFX1032: ; %bb.0: ; %entry1373; GFX1032-NEXT: s_clause 0x11374; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241375; GFX1032-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341376; GFX1032-NEXT: v_mov_b32_e32 v0, 01377; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1378; GFX1032-NEXT: s_clause 0x11379; GFX1032-NEXT: global_load_ushort v1, v0, s[2:3]1380; GFX1032-NEXT: global_load_ushort v2, v0, s[6:7]1381; GFX1032-NEXT: s_waitcnt vmcnt(0)1382; GFX1032-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1, v21383; GFX1032-NEXT: s_cbranch_vccnz .LBB24_21384; GFX1032-NEXT: ; %bb.1: ; %one1385; GFX1032-NEXT: global_store_short v0, v1, s[0:1]1386; GFX1032-NEXT: s_endpgm1387; GFX1032-NEXT: .LBB24_2: ; %two1388; GFX1032-NEXT: global_store_short v0, v2, s[0:1]1389; GFX1032-NEXT: s_endpgm1390;1391; GFX1064-LABEL: test_br_cc_f16:1392; GFX1064: ; %bb.0: ; %entry1393; GFX1064-NEXT: s_clause 0x11394; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241395; GFX1064-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x341396; GFX1064-NEXT: v_mov_b32_e32 v0, 01397; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1398; GFX1064-NEXT: s_clause 0x11399; GFX1064-NEXT: global_load_ushort v1, v0, s[2:3]1400; GFX1064-NEXT: global_load_ushort v2, v0, s[6:7]1401; GFX1064-NEXT: s_waitcnt vmcnt(0)1402; GFX1064-NEXT: v_cmp_nlt_f16_e32 vcc, v1, v21403; GFX1064-NEXT: s_cbranch_vccnz .LBB24_21404; GFX1064-NEXT: ; %bb.1: ; %one1405; GFX1064-NEXT: global_store_short v0, v1, s[0:1]1406; GFX1064-NEXT: s_endpgm1407; GFX1064-NEXT: .LBB24_2: ; %two1408; GFX1064-NEXT: global_store_short v0, v2, s[0:1]1409; GFX1064-NEXT: s_endpgm1410 ptr addrspace(1) %r,1411 ptr addrspace(1) %a,1412 ptr addrspace(1) %b) {1413entry:1414 %a.val = load half, ptr addrspace(1) %a1415 %b.val = load half, ptr addrspace(1) %b1416 %fcmp = fcmp olt half %a.val, %b.val1417 br i1 %fcmp, label %one, label %two1418 1419one:1420 store half %a.val, ptr addrspace(1) %r1421 ret void1422 1423two:1424 store half %b.val, ptr addrspace(1) %r1425 ret void1426}1427 1428define amdgpu_kernel void @test_brcc_i1(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %val) #0 {1429; GCN-LABEL: test_brcc_i1:1430; GCN: ; %bb.0:1431; GCN-NEXT: s_load_dword s0, s[4:5], 0x341432; GCN-NEXT: s_waitcnt lgkmcnt(0)1433; GCN-NEXT: s_bitcmp0_b32 s0, 01434; GCN-NEXT: s_cbranch_scc1 .LBB25_21435; GCN-NEXT: ; %bb.1: ; %store1436; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241437; GCN-NEXT: v_mov_b32_e32 v0, 01438; GCN-NEXT: v_mov_b32_e32 v1, 0xde1439; GCN-NEXT: s_waitcnt lgkmcnt(0)1440; GCN-NEXT: global_store_dword v0, v1, s[0:1]1441; GCN-NEXT: .LBB25_2: ; %end1442; GCN-NEXT: s_endpgm1443 %cmp0 = icmp ne i1 %val, 01444 br i1 %cmp0, label %store, label %end1445 1446store:1447 store i32 222, ptr addrspace(1) %out1448 ret void1449 1450end:1451 ret void1452}1453 1454define amdgpu_kernel void @test_preserve_condition_undef_flag(float %arg, i32 %arg1, float %arg2) #0 {1455; GFX1032-LABEL: test_preserve_condition_undef_flag:1456; GFX1032: ; %bb.0: ; %bb01457; GFX1032-NEXT: s_clause 0x11458; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x2c1459; GFX1032-NEXT: s_load_dword s1, s[4:5], 0x241460; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1461; GFX1032-NEXT: v_cmp_nlt_f32_e64 s2, s0, 1.01462; GFX1032-NEXT: v_cmp_nlt_f32_e64 s1, s1, 1.01463; GFX1032-NEXT: v_cmp_ngt_f32_e64 s0, s0, 01464; GFX1032-NEXT: s_or_b32 s1, s2, s11465; GFX1032-NEXT: s_or_b32 s0, s1, s01466; GFX1032-NEXT: s_and_b32 vcc_lo, exec_lo, s01467; GFX1032-NEXT: s_cbranch_vccnz .LBB26_21468; GFX1032-NEXT: ; %bb.1: ; %bb11469; GFX1032-NEXT: v_mov_b32_e32 v0, 01470; GFX1032-NEXT: global_store_dword v[0:1], v0, off1471; GFX1032-NEXT: s_waitcnt_vscnt null, 0x01472; GFX1032-NEXT: .LBB26_2: ; %bb21473; GFX1032-NEXT: s_endpgm1474;1475; GFX1064-LABEL: test_preserve_condition_undef_flag:1476; GFX1064: ; %bb.0: ; %bb01477; GFX1064-NEXT: s_clause 0x11478; GFX1064-NEXT: s_load_dword s6, s[4:5], 0x2c1479; GFX1064-NEXT: s_load_dword s2, s[4:5], 0x241480; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1481; GFX1064-NEXT: v_cmp_nlt_f32_e64 s[0:1], s6, 1.01482; GFX1064-NEXT: v_cmp_nlt_f32_e64 s[2:3], s2, 1.01483; GFX1064-NEXT: v_cmp_ngt_f32_e64 s[4:5], s6, 01484; GFX1064-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]1485; GFX1064-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]1486; GFX1064-NEXT: s_and_b64 vcc, exec, s[0:1]1487; GFX1064-NEXT: s_cbranch_vccnz .LBB26_21488; GFX1064-NEXT: ; %bb.1: ; %bb11489; GFX1064-NEXT: v_mov_b32_e32 v0, 01490; GFX1064-NEXT: global_store_dword v[0:1], v0, off1491; GFX1064-NEXT: s_waitcnt_vscnt null, 0x01492; GFX1064-NEXT: .LBB26_2: ; %bb21493; GFX1064-NEXT: s_endpgm1494bb0:1495 %tmp = icmp sgt i32 %arg1, 41496 %undef = call i1 @llvm.amdgcn.class.f32(float poison, i32 0)1497 %tmp4 = select i1 %undef, float %arg, float 1.000000e+001498 %tmp5 = fcmp ogt float %arg2, 0.000000e+001499 %tmp6 = fcmp olt float %arg2, 1.000000e+001500 %tmp7 = fcmp olt float %arg, %tmp41501 %tmp8 = and i1 %tmp5, %tmp61502 %tmp9 = and i1 %tmp8, %tmp71503 br i1 %tmp9, label %bb1, label %bb21504 1505bb1:1506 store volatile i32 0, ptr addrspace(1) poison1507 br label %bb21508 1509bb2:1510 ret void1511}1512 1513define amdgpu_kernel void @test_invert_true_phi_cond_break_loop(i32 %arg) #0 {1514; GFX1032-LABEL: test_invert_true_phi_cond_break_loop:1515; GFX1032: ; %bb.0: ; %bb1516; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x241517; GFX1032-NEXT: ; implicit-def: $sgpr11518; GFX1032-NEXT: ; implicit-def: $sgpr21519; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1520; GFX1032-NEXT: v_subrev_nc_u32_e32 v0, s0, v01521; GFX1032-NEXT: s_mov_b32 s0, 01522; GFX1032-NEXT: s_branch .LBB27_21523; GFX1032-NEXT: .LBB27_1: ; %Flow1524; GFX1032-NEXT: ; in Loop: Header=BB27_2 Depth=11525; GFX1032-NEXT: s_xor_b32 s3, s1, -11526; GFX1032-NEXT: s_add_i32 s2, s2, 11527; GFX1032-NEXT: s_and_b32 s3, exec_lo, s31528; GFX1032-NEXT: s_or_b32 s0, s3, s01529; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, s01530; GFX1032-NEXT: s_cbranch_execz .LBB27_41531; GFX1032-NEXT: .LBB27_2: ; %bb11532; GFX1032-NEXT: ; =>This Inner Loop Header: Depth=11533; GFX1032-NEXT: s_or_b32 s1, s1, exec_lo1534; GFX1032-NEXT: s_cmp_gt_i32 s2, -11535; GFX1032-NEXT: s_cbranch_scc1 .LBB27_11536; GFX1032-NEXT: ; %bb.3: ; %bb41537; GFX1032-NEXT: ; in Loop: Header=BB27_2 Depth=11538; GFX1032-NEXT: global_load_dword v1, v[0:1], off glc dlc1539; GFX1032-NEXT: s_waitcnt vmcnt(0)1540; GFX1032-NEXT: s_andn2_b32 s1, s1, exec_lo1541; GFX1032-NEXT: v_cmp_ge_i32_e32 vcc_lo, v0, v11542; GFX1032-NEXT: s_and_b32 s3, vcc_lo, exec_lo1543; GFX1032-NEXT: s_or_b32 s1, s1, s31544; GFX1032-NEXT: s_branch .LBB27_11545; GFX1032-NEXT: .LBB27_4: ; %bb91546; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s01547; GFX1032-NEXT: v_mov_b32_e32 v0, 71548; GFX1032-NEXT: s_waitcnt_vscnt null, 0x01549; GFX1032-NEXT: ds_write_b32 v0, v01550; GFX1032-NEXT: s_endpgm1551;1552; GFX1064-LABEL: test_invert_true_phi_cond_break_loop:1553; GFX1064: ; %bb.0: ; %bb1554; GFX1064-NEXT: s_load_dword s0, s[4:5], 0x241555; GFX1064-NEXT: ; implicit-def: $sgpr2_sgpr31556; GFX1064-NEXT: ; implicit-def: $sgpr41557; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1558; GFX1064-NEXT: v_subrev_nc_u32_e32 v0, s0, v01559; GFX1064-NEXT: s_mov_b64 s[0:1], 01560; GFX1064-NEXT: s_branch .LBB27_21561; GFX1064-NEXT: .LBB27_1: ; %Flow1562; GFX1064-NEXT: ; in Loop: Header=BB27_2 Depth=11563; GFX1064-NEXT: s_xor_b64 s[6:7], s[2:3], -11564; GFX1064-NEXT: s_add_i32 s4, s4, 11565; GFX1064-NEXT: s_and_b64 s[6:7], exec, s[6:7]1566; GFX1064-NEXT: s_or_b64 s[0:1], s[6:7], s[0:1]1567; GFX1064-NEXT: s_andn2_b64 exec, exec, s[0:1]1568; GFX1064-NEXT: s_cbranch_execz .LBB27_41569; GFX1064-NEXT: .LBB27_2: ; %bb11570; GFX1064-NEXT: ; =>This Inner Loop Header: Depth=11571; GFX1064-NEXT: s_or_b64 s[2:3], s[2:3], exec1572; GFX1064-NEXT: s_cmp_gt_i32 s4, -11573; GFX1064-NEXT: s_cbranch_scc1 .LBB27_11574; GFX1064-NEXT: ; %bb.3: ; %bb41575; GFX1064-NEXT: ; in Loop: Header=BB27_2 Depth=11576; GFX1064-NEXT: global_load_dword v1, v[0:1], off glc dlc1577; GFX1064-NEXT: s_waitcnt vmcnt(0)1578; GFX1064-NEXT: s_andn2_b64 s[2:3], s[2:3], exec1579; GFX1064-NEXT: v_cmp_ge_i32_e32 vcc, v0, v11580; GFX1064-NEXT: s_and_b64 s[6:7], vcc, exec1581; GFX1064-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]1582; GFX1064-NEXT: s_branch .LBB27_11583; GFX1064-NEXT: .LBB27_4: ; %bb91584; GFX1064-NEXT: s_or_b64 exec, exec, s[0:1]1585; GFX1064-NEXT: v_mov_b32_e32 v0, 71586; GFX1064-NEXT: s_waitcnt_vscnt null, 0x01587; GFX1064-NEXT: ds_write_b32 v0, v01588; GFX1064-NEXT: s_endpgm1589bb:1590 %id = call i32 @llvm.amdgcn.workitem.id.x()1591 %tmp = sub i32 %id, %arg1592 br label %bb11593 1594bb1: ; preds = %Flow, %bb1595 %lsr.iv = phi i32 [ poison, %bb ], [ %tmp2, %Flow ]1596 %lsr.iv.next = add i32 %lsr.iv, 11597 %cmp0 = icmp slt i32 %lsr.iv.next, 01598 br i1 %cmp0, label %bb4, label %Flow1599 1600bb4: ; preds = %bb11601 %load = load volatile i32, ptr addrspace(1) poison, align 41602 %cmp1 = icmp sge i32 %tmp, %load1603 br label %Flow1604 1605Flow: ; preds = %bb4, %bb11606 %tmp2 = phi i32 [ %lsr.iv.next, %bb4 ], [ poison, %bb1 ]1607 %tmp3 = phi i1 [ %cmp1, %bb4 ], [ true, %bb1 ]1608 br i1 %tmp3, label %bb1, label %bb91609 1610bb9: ; preds = %Flow1611 store volatile i32 7, ptr addrspace(3) poison1612 ret void1613}1614 1615define amdgpu_kernel void @test_movrels_extract_neg_offset_vgpr(ptr addrspace(1) %out) #0 {1616; GFX1032-LABEL: test_movrels_extract_neg_offset_vgpr:1617; GFX1032: ; %bb.0: ; %entry1618; GFX1032-NEXT: v_add_nc_u32_e32 v0, 0xfffffe00, v01619; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241620; GFX1032-NEXT: v_mov_b32_e32 v2, 01621; GFX1032-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v01622; GFX1032-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1623; GFX1032-NEXT: v_cmp_ne_u32_e32 vcc_lo, 2, v01624; GFX1032-NEXT: v_cndmask_b32_e32 v1, 2, v1, vcc_lo1625; GFX1032-NEXT: v_cmp_ne_u32_e32 vcc_lo, 3, v01626; GFX1032-NEXT: v_cndmask_b32_e32 v0, 3, v1, vcc_lo1627; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1628; GFX1032-NEXT: global_store_dword v2, v0, s[0:1]1629; GFX1032-NEXT: s_endpgm1630;1631; GFX1064-LABEL: test_movrels_extract_neg_offset_vgpr:1632; GFX1064: ; %bb.0: ; %entry1633; GFX1064-NEXT: v_add_nc_u32_e32 v0, 0xfffffe00, v01634; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241635; GFX1064-NEXT: v_mov_b32_e32 v2, 01636; GFX1064-NEXT: v_cmp_eq_u32_e32 vcc, 1, v01637; GFX1064-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1638; GFX1064-NEXT: v_cmp_ne_u32_e32 vcc, 2, v01639; GFX1064-NEXT: v_cndmask_b32_e32 v1, 2, v1, vcc1640; GFX1064-NEXT: v_cmp_ne_u32_e32 vcc, 3, v01641; GFX1064-NEXT: v_cndmask_b32_e32 v0, 3, v1, vcc1642; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1643; GFX1064-NEXT: global_store_dword v2, v0, s[0:1]1644; GFX1064-NEXT: s_endpgm1645entry:1646 %id = call i32 @llvm.amdgcn.workitem.id.x() #11647 %index = add i32 %id, -5121648 %value = extractelement <4 x i32> <i32 0, i32 1, i32 2, i32 3>, i32 %index1649 store i32 %value, ptr addrspace(1) %out1650 ret void1651}1652 1653define amdgpu_kernel void @test_set_inactive(ptr addrspace(1) %out, i32 %in) #0 {1654; GFX1032-LABEL: test_set_inactive:1655; GFX1032: ; %bb.0:1656; GFX1032-NEXT: s_clause 0x11657; GFX1032-NEXT: s_load_dword s2, s[4:5], 0x2c1658; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241659; GFX1032-NEXT: s_or_saveexec_b32 s3, -11660; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1661; GFX1032-NEXT: v_cndmask_b32_e64 v0, 42, s2, s31662; GFX1032-NEXT: s_mov_b32 exec_lo, s31663; GFX1032-NEXT: v_mov_b32_e32 v1, 01664; GFX1032-NEXT: v_mov_b32_e32 v2, v01665; GFX1032-NEXT: global_store_dword v1, v2, s[0:1]1666; GFX1032-NEXT: s_endpgm1667;1668; GFX1064-LABEL: test_set_inactive:1669; GFX1064: ; %bb.0:1670; GFX1064-NEXT: s_clause 0x11671; GFX1064-NEXT: s_load_dword s6, s[4:5], 0x2c1672; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241673; GFX1064-NEXT: s_or_saveexec_b64 s[2:3], -11674; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1675; GFX1064-NEXT: v_cndmask_b32_e64 v0, 42, s6, s[2:3]1676; GFX1064-NEXT: s_mov_b64 exec, s[2:3]1677; GFX1064-NEXT: v_mov_b32_e32 v1, 01678; GFX1064-NEXT: v_mov_b32_e32 v2, v01679; GFX1064-NEXT: global_store_dword v1, v2, s[0:1]1680; GFX1064-NEXT: s_endpgm1681 %tmp.0 = call i32 @llvm.amdgcn.set.inactive.i32(i32 %in, i32 42)1682 %tmp = call i32 @llvm.amdgcn.strict.wwm.i32(i32 %tmp.0)1683 store i32 %tmp, ptr addrspace(1) %out1684 ret void1685}1686 1687define amdgpu_kernel void @test_set_inactive_64(ptr addrspace(1) %out, i64 %in) #0 {1688; GFX1032-LABEL: test_set_inactive_64:1689; GFX1032: ; %bb.0:1690; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241691; GFX1032-NEXT: s_or_saveexec_b32 s4, -11692; GFX1032-NEXT: s_waitcnt lgkmcnt(0)1693; GFX1032-NEXT: v_cndmask_b32_e64 v1, 0, s3, s41694; GFX1032-NEXT: v_cndmask_b32_e64 v0, 0, s2, s41695; GFX1032-NEXT: s_mov_b32 exec_lo, s41696; GFX1032-NEXT: v_mov_b32_e32 v2, v01697; GFX1032-NEXT: v_mov_b32_e32 v4, 01698; GFX1032-NEXT: v_mov_b32_e32 v3, v11699; GFX1032-NEXT: global_store_dwordx2 v4, v[2:3], s[0:1]1700; GFX1032-NEXT: s_endpgm1701;1702; GFX1064-LABEL: test_set_inactive_64:1703; GFX1064: ; %bb.0:1704; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241705; GFX1064-NEXT: s_or_saveexec_b64 s[4:5], -11706; GFX1064-NEXT: s_waitcnt lgkmcnt(0)1707; GFX1064-NEXT: v_cndmask_b32_e64 v1, 0, s3, s[4:5]1708; GFX1064-NEXT: v_cndmask_b32_e64 v0, 0, s2, s[4:5]1709; GFX1064-NEXT: s_mov_b64 exec, s[4:5]1710; GFX1064-NEXT: v_mov_b32_e32 v2, v01711; GFX1064-NEXT: v_mov_b32_e32 v4, 01712; GFX1064-NEXT: v_mov_b32_e32 v3, v11713; GFX1064-NEXT: global_store_dwordx2 v4, v[2:3], s[0:1]1714; GFX1064-NEXT: s_endpgm1715 %tmp.0 = call i64 @llvm.amdgcn.set.inactive.i64(i64 %in, i64 0)1716 %tmp = call i64 @llvm.amdgcn.strict.wwm.i64(i64 %tmp.0)1717 store i64 %tmp, ptr addrspace(1) %out1718 ret void1719}1720 1721define amdgpu_ps void @test_kill_i1_terminator_float() #0 {1722; GFX1032-LABEL: test_kill_i1_terminator_float:1723; GFX1032: ; %bb.0:1724; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, exec_lo1725; GFX1032-NEXT: s_cbranch_scc0 .LBB31_11726; GFX1032-NEXT: s_endpgm1727; GFX1032-NEXT: .LBB31_1:1728; GFX1032-NEXT: s_mov_b32 exec_lo, 01729; GFX1032-NEXT: exp null off, off, off, off done vm1730; GFX1032-NEXT: s_endpgm1731;1732; GFX1064-LABEL: test_kill_i1_terminator_float:1733; GFX1064: ; %bb.0:1734; GFX1064-NEXT: s_andn2_b64 exec, exec, exec1735; GFX1064-NEXT: s_cbranch_scc0 .LBB31_11736; GFX1064-NEXT: s_endpgm1737; GFX1064-NEXT: .LBB31_1:1738; GFX1064-NEXT: s_mov_b64 exec, 01739; GFX1064-NEXT: exp null off, off, off, off done vm1740; GFX1064-NEXT: s_endpgm1741 call void @llvm.amdgcn.kill(i1 false)1742 ret void1743}1744 1745define amdgpu_gs void @test_kill_i1_terminator_i1(i32 %a, i32 %b, i32 %c, i32 %d) #0 {1746; GFX1032-LABEL: test_kill_i1_terminator_i1:1747; GFX1032: ; %bb.0:1748; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, v0, v11749; GFX1032-NEXT: v_cmp_lt_i32_e64 s0, v2, v31750; GFX1032-NEXT: s_mov_b32 s1, exec_lo1751; GFX1032-NEXT: s_or_b32 s0, vcc_lo, s01752; GFX1032-NEXT: s_andn2_b32 s0, exec_lo, s01753; GFX1032-NEXT: s_andn2_b32 s1, s1, s01754; GFX1032-NEXT: s_and_b32 exec_lo, exec_lo, s11755; GFX1032-NEXT: v_mov_b32_e32 v0, 01756; GFX1032-NEXT: exp mrt0 off, off, off, off1757; GFX1032-NEXT: s_endpgm1758; GFX1032-NEXT: ; %bb.1:1759; GFX1032-NEXT: s_mov_b32 exec_lo, 01760; GFX1032-NEXT: s_endpgm1761;1762; GFX1064-LABEL: test_kill_i1_terminator_i1:1763; GFX1064: ; %bb.0:1764; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, v0, v11765; GFX1064-NEXT: v_cmp_lt_i32_e64 s[0:1], v2, v31766; GFX1064-NEXT: s_mov_b64 s[2:3], exec1767; GFX1064-NEXT: s_or_b64 s[0:1], vcc, s[0:1]1768; GFX1064-NEXT: s_andn2_b64 s[0:1], exec, s[0:1]1769; GFX1064-NEXT: s_andn2_b64 s[2:3], s[2:3], s[0:1]1770; GFX1064-NEXT: s_and_b64 exec, exec, s[2:3]1771; GFX1064-NEXT: v_mov_b32_e32 v0, 01772; GFX1064-NEXT: exp mrt0 off, off, off, off1773; GFX1064-NEXT: s_endpgm1774; GFX1064-NEXT: ; %bb.1:1775; GFX1064-NEXT: s_mov_b64 exec, 01776; GFX1064-NEXT: s_endpgm1777 %c1 = icmp slt i32 %a, %b1778 %c2 = icmp slt i32 %c, %d1779 %x = or i1 %c1, %c21780 call void @llvm.amdgcn.kill(i1 %x)1781 call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 false, i1 false)1782 ret void1783}1784 1785define amdgpu_ps <4 x float> @test_loop_vcc(<4 x float> %in) #0 {1786; GFX1032-LABEL: test_loop_vcc:1787; GFX1032: ; %bb.0: ; %entry1788; GFX1032-NEXT: s_mov_b32 s0, exec_lo1789; GFX1032-NEXT: s_wqm_b32 exec_lo, exec_lo1790; GFX1032-NEXT: v_mov_b32_e32 v7, v31791; GFX1032-NEXT: v_mov_b32_e32 v6, v21792; GFX1032-NEXT: v_mov_b32_e32 v5, v11793; GFX1032-NEXT: v_mov_b32_e32 v4, v01794; GFX1032-NEXT: v_mov_b32_e32 v8, 01795; GFX1032-NEXT: s_branch .LBB33_21796; GFX1032-NEXT: .LBB33_1: ; %body1797; GFX1032-NEXT: ; in Loop: Header=BB33_2 Depth=11798; GFX1032-NEXT: image_sample v[4:7], v0, s[0:7], s[0:3] dmask:0xf dim:SQ_RSRC_IMG_1D1799; GFX1032-NEXT: v_add_f32_e32 v8, 2.0, v81800; GFX1032-NEXT: s_cbranch_execz .LBB33_41801; GFX1032-NEXT: .LBB33_2: ; %loop1802; GFX1032-NEXT: ; =>This Inner Loop Header: Depth=11803; GFX1032-NEXT: v_cmp_lt_f32_e32 vcc_lo, 0x40e00000, v81804; GFX1032-NEXT: s_waitcnt vmcnt(0)1805; GFX1032-NEXT: v_mov_b32_e32 v0, v41806; GFX1032-NEXT: v_mov_b32_e32 v1, v51807; GFX1032-NEXT: v_mov_b32_e32 v2, v61808; GFX1032-NEXT: v_mov_b32_e32 v3, v71809; GFX1032-NEXT: s_cbranch_vccz .LBB33_11810; GFX1032-NEXT: ; %bb.3:1811; GFX1032-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr71812; GFX1032-NEXT: ; implicit-def: $vgpr81813; GFX1032-NEXT: .LBB33_4: ; %break1814; GFX1032-NEXT: s_and_b32 exec_lo, exec_lo, s01815; GFX1032-NEXT: s_waitcnt vmcnt(0)1816; GFX1032-NEXT: ; return to shader part epilog1817;1818; GFX1064-LABEL: test_loop_vcc:1819; GFX1064: ; %bb.0: ; %entry1820; GFX1064-NEXT: s_mov_b64 s[0:1], exec1821; GFX1064-NEXT: s_wqm_b64 exec, exec1822; GFX1064-NEXT: v_mov_b32_e32 v7, v31823; GFX1064-NEXT: v_mov_b32_e32 v6, v21824; GFX1064-NEXT: v_mov_b32_e32 v5, v11825; GFX1064-NEXT: v_mov_b32_e32 v4, v01826; GFX1064-NEXT: v_mov_b32_e32 v8, 01827; GFX1064-NEXT: s_branch .LBB33_21828; GFX1064-NEXT: .LBB33_1: ; %body1829; GFX1064-NEXT: ; in Loop: Header=BB33_2 Depth=11830; GFX1064-NEXT: image_sample v[4:7], v0, s[0:7], s[0:3] dmask:0xf dim:SQ_RSRC_IMG_1D1831; GFX1064-NEXT: v_add_f32_e32 v8, 2.0, v81832; GFX1064-NEXT: s_cbranch_execz .LBB33_41833; GFX1064-NEXT: .LBB33_2: ; %loop1834; GFX1064-NEXT: ; =>This Inner Loop Header: Depth=11835; GFX1064-NEXT: v_cmp_lt_f32_e32 vcc, 0x40e00000, v81836; GFX1064-NEXT: s_waitcnt vmcnt(0)1837; GFX1064-NEXT: v_mov_b32_e32 v0, v41838; GFX1064-NEXT: v_mov_b32_e32 v1, v51839; GFX1064-NEXT: v_mov_b32_e32 v2, v61840; GFX1064-NEXT: v_mov_b32_e32 v3, v71841; GFX1064-NEXT: s_cbranch_vccz .LBB33_11842; GFX1064-NEXT: ; %bb.3:1843; GFX1064-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr71844; GFX1064-NEXT: ; implicit-def: $vgpr81845; GFX1064-NEXT: .LBB33_4: ; %break1846; GFX1064-NEXT: s_and_b64 exec, exec, s[0:1]1847; GFX1064-NEXT: s_waitcnt vmcnt(0)1848; GFX1064-NEXT: ; return to shader part epilog1849entry:1850 br label %loop1851 1852loop:1853 %ctr.iv = phi float [ 0.0, %entry ], [ %ctr.next, %body ]1854 %c.iv = phi <4 x float> [ %in, %entry ], [ %c.next, %body ]1855 %cc = fcmp ogt float %ctr.iv, 7.01856 br i1 %cc, label %break, label %body1857 1858body:1859 %c.iv0 = extractelement <4 x float> %c.iv, i32 01860 %c.next = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 15, float %c.iv0, <8 x i32> poison, <4 x i32> poison, i1 0, i32 0, i32 0)1861 %ctr.next = fadd float %ctr.iv, 2.01862 br label %loop1863 1864break:1865 ret <4 x float> %c.iv1866}1867 1868define amdgpu_ps float @test_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) {1869; GFX1032-LABEL: test_wwm1:1870; GFX1032: ; %bb.0: ; %main_body1871; GFX1032-NEXT: s_or_saveexec_b32 s0, -11872; GFX1032-NEXT: v_mov_b32_e32 v2, v11873; GFX1032-NEXT: v_mov_b32_e32 v3, v01874; GFX1032-NEXT: v_add_f32_e32 v2, v3, v21875; GFX1032-NEXT: s_mov_b32 exec_lo, s01876; GFX1032-NEXT: v_mov_b32_e32 v0, v21877; GFX1032-NEXT: ; return to shader part epilog1878;1879; GFX1064-LABEL: test_wwm1:1880; GFX1064: ; %bb.0: ; %main_body1881; GFX1064-NEXT: s_or_saveexec_b64 s[0:1], -11882; GFX1064-NEXT: v_mov_b32_e32 v2, v11883; GFX1064-NEXT: v_mov_b32_e32 v3, v01884; GFX1064-NEXT: v_add_f32_e32 v2, v3, v21885; GFX1064-NEXT: s_mov_b64 exec, s[0:1]1886; GFX1064-NEXT: v_mov_b32_e32 v0, v21887; GFX1064-NEXT: ; return to shader part epilog1888main_body:1889 %out = fadd float %src0, %src11890 %out.0 = call float @llvm.amdgcn.wwm.f32(float %out)1891 ret float %out.01892}1893 1894define amdgpu_ps float @test_wwm2(i32 inreg %idx) {1895; GFX1032-LABEL: test_wwm2:1896; GFX1032: ; %bb.0: ; %main_body1897; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 01898; GFX1032-NEXT: v_mbcnt_hi_u32_b32 v0, -1, v01899; GFX1032-NEXT: v_cmp_gt_u32_e32 vcc_lo, 16, v01900; GFX1032-NEXT: v_mov_b32_e32 v0, 01901; GFX1032-NEXT: s_and_saveexec_b32 s1, vcc_lo1902; GFX1032-NEXT: s_cbranch_execz .LBB35_21903; GFX1032-NEXT: ; %bb.1: ; %if1904; GFX1032-NEXT: s_or_saveexec_b32 s2, -11905; GFX1032-NEXT: v_mov_b32_e32 v1, s01906; GFX1032-NEXT: buffer_load_dword v1, v1, s[0:3], 0 idxen1907; GFX1032-NEXT: s_waitcnt vmcnt(0)1908; GFX1032-NEXT: v_add_f32_e32 v2, v1, v11909; GFX1032-NEXT: s_mov_b32 exec_lo, s21910; GFX1032-NEXT: v_mov_b32_e32 v0, v21911; GFX1032-NEXT: v_add_f32_e32 v0, v1, v01912; GFX1032-NEXT: .LBB35_2: ; %endif1913; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s11914; GFX1032-NEXT: ; return to shader part epilog1915;1916; GFX1064-LABEL: test_wwm2:1917; GFX1064: ; %bb.0: ; %main_body1918; GFX1064-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 01919; GFX1064-NEXT: v_mbcnt_hi_u32_b32 v0, -1, v01920; GFX1064-NEXT: v_cmp_gt_u32_e32 vcc, 16, v01921; GFX1064-NEXT: v_mov_b32_e32 v0, 01922; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], vcc1923; GFX1064-NEXT: s_cbranch_execz .LBB35_21924; GFX1064-NEXT: ; %bb.1: ; %if1925; GFX1064-NEXT: s_or_saveexec_b64 s[4:5], -11926; GFX1064-NEXT: v_mov_b32_e32 v1, s01927; GFX1064-NEXT: buffer_load_dword v1, v1, s[0:3], 0 idxen1928; GFX1064-NEXT: s_waitcnt vmcnt(0)1929; GFX1064-NEXT: v_add_f32_e32 v2, v1, v11930; GFX1064-NEXT: s_mov_b64 exec, s[4:5]1931; GFX1064-NEXT: v_mov_b32_e32 v0, v21932; GFX1064-NEXT: v_add_f32_e32 v0, v1, v01933; GFX1064-NEXT: .LBB35_2: ; %endif1934; GFX1064-NEXT: s_or_b64 exec, exec, s[2:3]1935; GFX1064-NEXT: ; return to shader part epilog1936main_body:1937 ; use mbcnt to make sure the branch is divergent1938 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)1939 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo)1940 %cc = icmp uge i32 %hi, 161941 br i1 %cc, label %endif, label %if1942 1943if:1944 %src = call float @llvm.amdgcn.struct.ptr.buffer.load.f32(ptr addrspace(8) poison, i32 %idx, i32 0, i32 0, i32 0)1945 %out = fadd float %src, %src1946 %out.0 = call float @llvm.amdgcn.wwm.f32(float %out)1947 %out.1 = fadd float %src, %out.01948 br label %endif1949 1950endif:1951 %out.2 = phi float [ %out.1, %if ], [ 0.0, %main_body ]1952 ret float %out.21953}1954 1955define amdgpu_ps float @test_strict_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) {1956; GFX1032-LABEL: test_strict_wwm1:1957; GFX1032: ; %bb.0: ; %main_body1958; GFX1032-NEXT: s_or_saveexec_b32 s0, -11959; GFX1032-NEXT: v_mov_b32_e32 v2, v11960; GFX1032-NEXT: v_mov_b32_e32 v3, v01961; GFX1032-NEXT: v_add_f32_e32 v2, v3, v21962; GFX1032-NEXT: s_mov_b32 exec_lo, s01963; GFX1032-NEXT: v_mov_b32_e32 v0, v21964; GFX1032-NEXT: ; return to shader part epilog1965;1966; GFX1064-LABEL: test_strict_wwm1:1967; GFX1064: ; %bb.0: ; %main_body1968; GFX1064-NEXT: s_or_saveexec_b64 s[0:1], -11969; GFX1064-NEXT: v_mov_b32_e32 v2, v11970; GFX1064-NEXT: v_mov_b32_e32 v3, v01971; GFX1064-NEXT: v_add_f32_e32 v2, v3, v21972; GFX1064-NEXT: s_mov_b64 exec, s[0:1]1973; GFX1064-NEXT: v_mov_b32_e32 v0, v21974; GFX1064-NEXT: ; return to shader part epilog1975main_body:1976 %out = fadd float %src0, %src11977 %out.0 = call float @llvm.amdgcn.strict.wwm.f32(float %out)1978 ret float %out.01979}1980 1981define amdgpu_ps float @test_strict_wwm2(i32 inreg %idx) {1982; GFX1032-LABEL: test_strict_wwm2:1983; GFX1032: ; %bb.0: ; %main_body1984; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 01985; GFX1032-NEXT: v_mbcnt_hi_u32_b32 v0, -1, v01986; GFX1032-NEXT: v_cmp_gt_u32_e32 vcc_lo, 16, v01987; GFX1032-NEXT: v_mov_b32_e32 v0, 01988; GFX1032-NEXT: s_and_saveexec_b32 s1, vcc_lo1989; GFX1032-NEXT: s_cbranch_execz .LBB37_21990; GFX1032-NEXT: ; %bb.1: ; %if1991; GFX1032-NEXT: s_or_saveexec_b32 s2, -11992; GFX1032-NEXT: v_mov_b32_e32 v1, s01993; GFX1032-NEXT: buffer_load_dword v1, v1, s[0:3], 0 idxen1994; GFX1032-NEXT: s_waitcnt vmcnt(0)1995; GFX1032-NEXT: v_add_f32_e32 v2, v1, v11996; GFX1032-NEXT: s_mov_b32 exec_lo, s21997; GFX1032-NEXT: v_mov_b32_e32 v0, v21998; GFX1032-NEXT: v_add_f32_e32 v0, v1, v01999; GFX1032-NEXT: .LBB37_2: ; %endif2000; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s12001; GFX1032-NEXT: ; return to shader part epilog2002;2003; GFX1064-LABEL: test_strict_wwm2:2004; GFX1064: ; %bb.0: ; %main_body2005; GFX1064-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 02006; GFX1064-NEXT: v_mbcnt_hi_u32_b32 v0, -1, v02007; GFX1064-NEXT: v_cmp_gt_u32_e32 vcc, 16, v02008; GFX1064-NEXT: v_mov_b32_e32 v0, 02009; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], vcc2010; GFX1064-NEXT: s_cbranch_execz .LBB37_22011; GFX1064-NEXT: ; %bb.1: ; %if2012; GFX1064-NEXT: s_or_saveexec_b64 s[4:5], -12013; GFX1064-NEXT: v_mov_b32_e32 v1, s02014; GFX1064-NEXT: buffer_load_dword v1, v1, s[0:3], 0 idxen2015; GFX1064-NEXT: s_waitcnt vmcnt(0)2016; GFX1064-NEXT: v_add_f32_e32 v2, v1, v12017; GFX1064-NEXT: s_mov_b64 exec, s[4:5]2018; GFX1064-NEXT: v_mov_b32_e32 v0, v22019; GFX1064-NEXT: v_add_f32_e32 v0, v1, v02020; GFX1064-NEXT: .LBB37_2: ; %endif2021; GFX1064-NEXT: s_or_b64 exec, exec, s[2:3]2022; GFX1064-NEXT: ; return to shader part epilog2023main_body:2024 ; use mbcnt to make sure the branch is divergent2025 %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)2026 %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 %lo)2027 %cc = icmp uge i32 %hi, 162028 br i1 %cc, label %endif, label %if2029 2030if:2031 %src = call float @llvm.amdgcn.struct.ptr.buffer.load.f32(ptr addrspace(8) poison, i32 %idx, i32 0, i32 0, i32 0)2032 %out = fadd float %src, %src2033 %out.0 = call float @llvm.amdgcn.strict.wwm.f32(float %out)2034 %out.1 = fadd float %src, %out.02035 br label %endif2036 2037endif:2038 %out.2 = phi float [ %out.1, %if ], [ 0.0, %main_body ]2039 ret float %out.22040}2041 2042 2043define amdgpu_ps <4 x float> @test_wqm1(i32 inreg, i32 inreg, i32 inreg, i32 inreg %m0, <8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, <2 x float> %pos) #0 {2044; GFX1032-LABEL: test_wqm1:2045; GFX1032: ; %bb.0: ; %main_body2046; GFX1032-NEXT: s_mov_b32 s0, exec_lo2047; GFX1032-NEXT: s_wqm_b32 exec_lo, exec_lo2048; GFX1032-NEXT: s_mov_b32 m0, s32049; GFX1032-NEXT: v_interp_p1_f32_e32 v2, v0, attr0.x2050; GFX1032-NEXT: v_interp_p1_f32_e32 v3, v0, attr0.y2051; GFX1032-NEXT: v_interp_p2_f32_e32 v2, v1, attr0.x2052; GFX1032-NEXT: v_interp_p2_f32_e32 v3, v1, attr0.y2053; GFX1032-NEXT: s_and_b32 exec_lo, exec_lo, s02054; GFX1032-NEXT: image_sample v[0:3], v[2:3], s[4:11], s[12:15] dmask:0xf dim:SQ_RSRC_IMG_2D2055; GFX1032-NEXT: s_waitcnt vmcnt(0)2056; GFX1032-NEXT: ; return to shader part epilog2057;2058; GFX1064-LABEL: test_wqm1:2059; GFX1064: ; %bb.0: ; %main_body2060; GFX1064-NEXT: s_mov_b64 s[0:1], exec2061; GFX1064-NEXT: s_wqm_b64 exec, exec2062; GFX1064-NEXT: s_mov_b32 m0, s32063; GFX1064-NEXT: v_interp_p1_f32_e32 v2, v0, attr0.x2064; GFX1064-NEXT: v_interp_p1_f32_e32 v3, v0, attr0.y2065; GFX1064-NEXT: v_interp_p2_f32_e32 v2, v1, attr0.x2066; GFX1064-NEXT: v_interp_p2_f32_e32 v3, v1, attr0.y2067; GFX1064-NEXT: s_and_b64 exec, exec, s[0:1]2068; GFX1064-NEXT: image_sample v[0:3], v[2:3], s[4:11], s[12:15] dmask:0xf dim:SQ_RSRC_IMG_2D2069; GFX1064-NEXT: s_waitcnt vmcnt(0)2070; GFX1064-NEXT: ; return to shader part epilog2071main_body:2072 %inst23 = extractelement <2 x float> %pos, i32 02073 %inst24 = extractelement <2 x float> %pos, i32 12074 %inst25 = tail call float @llvm.amdgcn.interp.p1(float %inst23, i32 0, i32 0, i32 %m0)2075 %inst26 = tail call float @llvm.amdgcn.interp.p2(float %inst25, float %inst24, i32 0, i32 0, i32 %m0)2076 %inst28 = tail call float @llvm.amdgcn.interp.p1(float %inst23, i32 1, i32 0, i32 %m0)2077 %inst29 = tail call float @llvm.amdgcn.interp.p2(float %inst28, float %inst24, i32 1, i32 0, i32 %m0)2078 %tex = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %inst26, float %inst29, <8 x i32> %rsrc, <4 x i32> %sampler, i1 0, i32 0, i32 0)2079 ret <4 x float> %tex2080}2081 2082define amdgpu_ps float @test_wqm2(i32 inreg %idx0, i32 inreg %idx1) #0 {2083; GFX1032-LABEL: test_wqm2:2084; GFX1032: ; %bb.0: ; %main_body2085; GFX1032-NEXT: s_mov_b32 s2, exec_lo2086; GFX1032-NEXT: s_wqm_b32 exec_lo, exec_lo2087; GFX1032-NEXT: v_mov_b32_e32 v0, s02088; GFX1032-NEXT: v_mov_b32_e32 v1, s12089; GFX1032-NEXT: s_clause 0x12090; GFX1032-NEXT: buffer_load_dword v2, v0, s[0:3], 0 idxen2091; GFX1032-NEXT: buffer_load_dword v3, v1, s[0:3], 0 idxen2092; GFX1032-NEXT: s_waitcnt vmcnt(0)2093; GFX1032-NEXT: v_add_f32_e32 v0, v2, v32094; GFX1032-NEXT: ; kill: def $vgpr0 killed $vgpr0 killed $exec2095; GFX1032-NEXT: s_and_b32 exec_lo, exec_lo, s22096; GFX1032-NEXT: ; return to shader part epilog2097;2098; GFX1064-LABEL: test_wqm2:2099; GFX1064: ; %bb.0: ; %main_body2100; GFX1064-NEXT: s_mov_b64 s[2:3], exec2101; GFX1064-NEXT: s_wqm_b64 exec, exec2102; GFX1064-NEXT: v_mov_b32_e32 v0, s02103; GFX1064-NEXT: v_mov_b32_e32 v1, s12104; GFX1064-NEXT: s_clause 0x12105; GFX1064-NEXT: buffer_load_dword v2, v0, s[0:3], 0 idxen2106; GFX1064-NEXT: buffer_load_dword v3, v1, s[0:3], 0 idxen2107; GFX1064-NEXT: s_waitcnt vmcnt(0)2108; GFX1064-NEXT: v_add_f32_e32 v0, v2, v32109; GFX1064-NEXT: ; kill: def $vgpr0 killed $vgpr0 killed $exec2110; GFX1064-NEXT: s_and_b64 exec, exec, s[2:3]2111; GFX1064-NEXT: ; return to shader part epilog2112main_body:2113 %src0 = call float @llvm.amdgcn.struct.ptr.buffer.load.f32(ptr addrspace(8) poison, i32 %idx0, i32 0, i32 0, i32 0)2114 %src1 = call float @llvm.amdgcn.struct.ptr.buffer.load.f32(ptr addrspace(8) poison, i32 %idx1, i32 0, i32 0, i32 0)2115 %out = fadd float %src0, %src12116 %out.0 = bitcast float %out to i322117 %out.1 = call i32 @llvm.amdgcn.wqm.i32(i32 %out.0)2118 %out.2 = bitcast i32 %out.1 to float2119 ret float %out.22120}2121 2122define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src, float %a) {2123; GFX1032-LABEL: test_intr_fcmp_i64:2124; GFX1032: ; %bb.0:2125; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242126; GFX1032-NEXT: v_mov_b32_e32 v1, 02127; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2128; GFX1032-NEXT: v_cmp_eq_f32_e64 s2, s2, |s3|2129; GFX1032-NEXT: v_mov_b32_e32 v0, s22130; GFX1032-NEXT: global_store_dwordx2 v1, v[0:1], s[0:1]2131; GFX1032-NEXT: s_endpgm2132;2133; GFX1064-LABEL: test_intr_fcmp_i64:2134; GFX1064: ; %bb.0:2135; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242136; GFX1064-NEXT: v_mov_b32_e32 v2, 02137; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2138; GFX1064-NEXT: v_cmp_eq_f32_e64 s[2:3], s2, |s3|2139; GFX1064-NEXT: v_mov_b32_e32 v0, s22140; GFX1064-NEXT: v_mov_b32_e32 v1, s32141; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2142; GFX1064-NEXT: s_endpgm2143 %temp = call float @llvm.fabs.f32(float %a)2144 %result = call i64 @llvm.amdgcn.fcmp.i64.f32(float %src, float %temp, i32 1)2145 store i64 %result, ptr addrspace(1) %out2146 ret void2147}2148 2149define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) {2150; GFX1032-LABEL: test_intr_icmp_i64:2151; GFX1032: ; %bb.0:2152; GFX1032-NEXT: s_clause 0x12153; GFX1032-NEXT: s_load_dword s2, s[4:5], 0x2c2154; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242155; GFX1032-NEXT: v_mov_b32_e32 v1, 02156; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2157; GFX1032-NEXT: v_cmp_eq_u32_e64 s2, 0x64, s22158; GFX1032-NEXT: v_mov_b32_e32 v0, s22159; GFX1032-NEXT: global_store_dwordx2 v1, v[0:1], s[0:1]2160; GFX1032-NEXT: s_endpgm2161;2162; GFX1064-LABEL: test_intr_icmp_i64:2163; GFX1064: ; %bb.0:2164; GFX1064-NEXT: s_clause 0x12165; GFX1064-NEXT: s_load_dword s2, s[4:5], 0x2c2166; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242167; GFX1064-NEXT: v_mov_b32_e32 v2, 02168; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2169; GFX1064-NEXT: v_cmp_eq_u32_e64 s[2:3], 0x64, s22170; GFX1064-NEXT: v_mov_b32_e32 v0, s22171; GFX1064-NEXT: v_mov_b32_e32 v1, s32172; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2173; GFX1064-NEXT: s_endpgm2174 %result = call i64 @llvm.amdgcn.icmp.i64.i32(i32 %src, i32 100, i32 32)2175 store i64 %result, ptr addrspace(1) %out2176 ret void2177}2178 2179define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src, float %a) {2180; GFX1032-LABEL: test_intr_fcmp_i32:2181; GFX1032: ; %bb.0:2182; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242183; GFX1032-NEXT: v_mov_b32_e32 v0, 02184; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2185; GFX1032-NEXT: v_cmp_eq_f32_e64 s2, s2, |s3|2186; GFX1032-NEXT: v_mov_b32_e32 v1, s22187; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]2188; GFX1032-NEXT: s_endpgm2189;2190; GFX1064-LABEL: test_intr_fcmp_i32:2191; GFX1064: ; %bb.0:2192; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242193; GFX1064-NEXT: v_mov_b32_e32 v0, 02194; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2195; GFX1064-NEXT: v_cmp_eq_f32_e64 s[2:3], s2, |s3|2196; GFX1064-NEXT: v_mov_b32_e32 v1, s22197; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]2198; GFX1064-NEXT: s_endpgm2199 %temp = call float @llvm.fabs.f32(float %a)2200 %result = call i32 @llvm.amdgcn.fcmp.i32.f32(float %src, float %temp, i32 1)2201 store i32 %result, ptr addrspace(1) %out2202 ret void2203}2204 2205define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) {2206; GFX1032-LABEL: test_intr_icmp_i32:2207; GFX1032: ; %bb.0:2208; GFX1032-NEXT: s_clause 0x12209; GFX1032-NEXT: s_load_dword s2, s[4:5], 0x2c2210; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242211; GFX1032-NEXT: v_mov_b32_e32 v0, 02212; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2213; GFX1032-NEXT: v_cmp_eq_u32_e64 s2, 0x64, s22214; GFX1032-NEXT: v_mov_b32_e32 v1, s22215; GFX1032-NEXT: global_store_dword v0, v1, s[0:1]2216; GFX1032-NEXT: s_endpgm2217;2218; GFX1064-LABEL: test_intr_icmp_i32:2219; GFX1064: ; %bb.0:2220; GFX1064-NEXT: s_clause 0x12221; GFX1064-NEXT: s_load_dword s2, s[4:5], 0x2c2222; GFX1064-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242223; GFX1064-NEXT: v_mov_b32_e32 v0, 02224; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2225; GFX1064-NEXT: v_cmp_eq_u32_e64 s[2:3], 0x64, s22226; GFX1064-NEXT: v_mov_b32_e32 v1, s22227; GFX1064-NEXT: global_store_dword v0, v1, s[0:1]2228; GFX1064-NEXT: s_endpgm2229 %result = call i32 @llvm.amdgcn.icmp.i32.i32(i32 %src, i32 100, i32 32)2230 store i32 %result, ptr addrspace(1) %out2231 ret void2232}2233 2234define amdgpu_ps void @test_wqm_vote(float %a) {2235; GFX1032-LABEL: test_wqm_vote:2236; GFX1032: ; %bb.0:2237; GFX1032-NEXT: v_cmp_neq_f32_e32 vcc_lo, 0, v02238; GFX1032-NEXT: s_mov_b32 s0, exec_lo2239; GFX1032-NEXT: v_mov_b32_e32 v0, 02240; GFX1032-NEXT: s_wqm_b32 s1, vcc_lo2241; GFX1032-NEXT: s_andn2_b32 s1, exec_lo, s12242; GFX1032-NEXT: s_andn2_b32 s0, s0, s12243; GFX1032-NEXT: s_cbranch_scc0 .LBB44_22244; GFX1032-NEXT: ; %bb.1:2245; GFX1032-NEXT: s_and_b32 exec_lo, exec_lo, s02246; GFX1032-NEXT: exp mrt0 off, off, off, off2247; GFX1032-NEXT: s_endpgm2248; GFX1032-NEXT: .LBB44_2:2249; GFX1032-NEXT: s_mov_b32 exec_lo, 02250; GFX1032-NEXT: exp null off, off, off, off done vm2251; GFX1032-NEXT: s_endpgm2252;2253; GFX1064-LABEL: test_wqm_vote:2254; GFX1064: ; %bb.0:2255; GFX1064-NEXT: v_cmp_neq_f32_e32 vcc, 0, v02256; GFX1064-NEXT: s_mov_b64 s[0:1], exec2257; GFX1064-NEXT: v_mov_b32_e32 v0, 02258; GFX1064-NEXT: s_wqm_b64 s[2:3], vcc2259; GFX1064-NEXT: s_andn2_b64 s[2:3], exec, s[2:3]2260; GFX1064-NEXT: s_andn2_b64 s[0:1], s[0:1], s[2:3]2261; GFX1064-NEXT: s_cbranch_scc0 .LBB44_22262; GFX1064-NEXT: ; %bb.1:2263; GFX1064-NEXT: s_and_b64 exec, exec, s[0:1]2264; GFX1064-NEXT: exp mrt0 off, off, off, off2265; GFX1064-NEXT: s_endpgm2266; GFX1064-NEXT: .LBB44_2:2267; GFX1064-NEXT: s_mov_b64 exec, 02268; GFX1064-NEXT: exp null off, off, off, off done vm2269; GFX1064-NEXT: s_endpgm2270 %c1 = fcmp une float %a, 0.02271 %c2 = call i1 @llvm.amdgcn.wqm.vote(i1 %c1)2272 call void @llvm.amdgcn.kill(i1 %c2)2273 call void @llvm.amdgcn.exp.f32(i32 0, i32 0, float 0.0, float 0.0, float 0.0, float 0.0, i1 false, i1 false)2274 ret void2275}2276 2277define amdgpu_kernel void @test_branch_true() #2 {2278; GFX1032-LABEL: test_branch_true:2279; GFX1032: ; %bb.0: ; %entry2280; GFX1032-NEXT: s_mov_b32 vcc_lo, exec_lo2281; GFX1032-NEXT: s_cbranch_execnz .LBB45_22282; GFX1032-NEXT: ; %bb.1: ; %for.body.lr.ph2283; GFX1032-NEXT: s_branch .LBB45_32284; GFX1032-NEXT: .LBB45_2: ; %Flow2285; GFX1032-NEXT: s_branch .LBB45_52286; GFX1032-NEXT: .LBB45_3: ; %for.body2287; GFX1032-NEXT: s_mov_b32 vcc_lo, 02288; GFX1032-NEXT: ; %bb.4: ; %for.end.loopexit2289; GFX1032-NEXT: s_branch .LBB45_22290; GFX1032-NEXT: .LBB45_5: ; %for.end2291; GFX1032-NEXT: s_endpgm2292;2293; GFX1064-LABEL: test_branch_true:2294; GFX1064: ; %bb.0: ; %entry2295; GFX1064-NEXT: s_mov_b64 vcc, exec2296; GFX1064-NEXT: s_cbranch_execnz .LBB45_22297; GFX1064-NEXT: ; %bb.1: ; %for.body.lr.ph2298; GFX1064-NEXT: s_branch .LBB45_32299; GFX1064-NEXT: .LBB45_2: ; %Flow2300; GFX1064-NEXT: s_branch .LBB45_52301; GFX1064-NEXT: .LBB45_3: ; %for.body2302; GFX1064-NEXT: s_mov_b64 vcc, 02303; GFX1064-NEXT: ; %bb.4: ; %for.end.loopexit2304; GFX1064-NEXT: s_branch .LBB45_22305; GFX1064-NEXT: .LBB45_5: ; %for.end2306; GFX1064-NEXT: s_endpgm2307entry:2308 br i1 true, label %for.end, label %for.body.lr.ph2309 2310for.body.lr.ph: ; preds = %entry2311 br label %for.body2312 2313for.body: ; preds = %for.body, %for.body.lr.ph2314 br i1 poison, label %for.end, label %for.body2315 2316for.end: ; preds = %for.body, %entry2317 ret void2318}2319 2320define amdgpu_ps float @test_ps_live() #0 {2321; GFX1032-LABEL: test_ps_live:2322; GFX1032: ; %bb.0:2323; GFX1032-NEXT: s_mov_b32 s0, exec_lo2324; GFX1032-NEXT: v_cndmask_b32_e64 v0, 0, 1, s02325; GFX1032-NEXT: ; return to shader part epilog2326;2327; GFX1064-LABEL: test_ps_live:2328; GFX1064: ; %bb.0:2329; GFX1064-NEXT: s_mov_b64 s[0:1], exec2330; GFX1064-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]2331; GFX1064-NEXT: ; return to shader part epilog2332 %live = call i1 @llvm.amdgcn.ps.live()2333 %live.32 = zext i1 %live to i322334 %r = bitcast i32 %live.32 to float2335 ret float %r2336}2337 2338define amdgpu_kernel void @test_vccnz_ifcvt_triangle64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {2339; GFX1032-LABEL: test_vccnz_ifcvt_triangle64:2340; GFX1032: ; %bb.0: ; %entry2341; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242342; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2343; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x02344; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2345; GFX1032-NEXT: v_cmp_neq_f64_e64 s4, s[2:3], 1.02346; GFX1032-NEXT: s_and_b32 vcc_lo, exec_lo, s42347; GFX1032-NEXT: s_cbranch_vccnz .LBB47_22348; GFX1032-NEXT: ; %bb.1: ; %if2349; GFX1032-NEXT: v_add_f64 v[0:1], s[2:3], s[2:3]2350; GFX1032-NEXT: s_branch .LBB47_32351; GFX1032-NEXT: .LBB47_2:2352; GFX1032-NEXT: v_mov_b32_e32 v0, s22353; GFX1032-NEXT: v_mov_b32_e32 v1, s32354; GFX1032-NEXT: .LBB47_3: ; %endif2355; GFX1032-NEXT: v_mov_b32_e32 v2, 02356; GFX1032-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2357; GFX1032-NEXT: s_endpgm2358;2359; GFX1064-LABEL: test_vccnz_ifcvt_triangle64:2360; GFX1064: ; %bb.0: ; %entry2361; GFX1064-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242362; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2363; GFX1064-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x02364; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2365; GFX1064-NEXT: v_cmp_neq_f64_e64 s[4:5], s[2:3], 1.02366; GFX1064-NEXT: s_and_b64 vcc, exec, s[4:5]2367; GFX1064-NEXT: s_cbranch_vccnz .LBB47_22368; GFX1064-NEXT: ; %bb.1: ; %if2369; GFX1064-NEXT: v_add_f64 v[0:1], s[2:3], s[2:3]2370; GFX1064-NEXT: s_branch .LBB47_32371; GFX1064-NEXT: .LBB47_2:2372; GFX1064-NEXT: v_mov_b32_e32 v0, s22373; GFX1064-NEXT: v_mov_b32_e32 v1, s32374; GFX1064-NEXT: .LBB47_3: ; %endif2375; GFX1064-NEXT: v_mov_b32_e32 v2, 02376; GFX1064-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]2377; GFX1064-NEXT: s_endpgm2378entry:2379 %v = load double, ptr addrspace(1) %in2380 %cc = fcmp oeq double %v, 1.000000e+002381 br i1 %cc, label %if, label %endif2382 2383if:2384 %u = fadd double %v, %v2385 br label %endif2386 2387endif:2388 %r = phi double [ %v, %entry ], [ %u, %if ]2389 store double %r, ptr addrspace(1) %out2390 ret void2391}2392 2393define amdgpu_gs float @test_vgprblocks_w32_attr(float %a, float %b, float %c, float %d, float %e,2394; GCN-LABEL: test_vgprblocks_w32_attr:2395; GCN: ; %bb.0: ; %main_body2396; GCN-NEXT: v_add_f32_e32 v0, v0, v12397; GCN-NEXT: v_add_f32_e32 v0, v0, v22398; GCN-NEXT: v_add_f32_e32 v0, v0, v32399; GCN-NEXT: v_add_f32_e32 v0, v0, v42400; GCN-NEXT: v_add_f32_e32 v0, v0, v52401; GCN-NEXT: v_add_f32_e32 v0, v0, v62402; GCN-NEXT: v_add_f32_e32 v0, v0, v72403; GCN-NEXT: v_add_f32_e32 v0, v0, v82404; GCN-NEXT: v_add_f32_e32 v0, v0, v92405; GCN-NEXT: v_add_f32_e32 v0, v0, v102406; GCN-NEXT: v_add_f32_e32 v0, v0, v112407; GCN-NEXT: ; return to shader part epilog2408 float %f, float %g, float %h, float %i, float %j, float %k, float %l) #3 {2409main_body:2410 %s = fadd float %a, %b2411 %s.1 = fadd float %s, %c2412 %s.2 = fadd float %s.1, %d2413 %s.3 = fadd float %s.2, %e2414 %s.4 = fadd float %s.3, %f2415 %s.5 = fadd float %s.4, %g2416 %s.6 = fadd float %s.5, %h2417 %s.7 = fadd float %s.6, %i2418 %s.8 = fadd float %s.7, %j2419 %s.9 = fadd float %s.8, %k2420 %s.10 = fadd float %s.9, %l2421 ret float %s.102422}2423 2424define amdgpu_gs float @test_vgprblocks_w64_attr(float %a, float %b, float %c, float %d, float %e,2425; GCN-LABEL: test_vgprblocks_w64_attr:2426; GCN: ; %bb.0: ; %main_body2427; GCN-NEXT: v_add_f32_e32 v0, v0, v12428; GCN-NEXT: v_add_f32_e32 v0, v0, v22429; GCN-NEXT: v_add_f32_e32 v0, v0, v32430; GCN-NEXT: v_add_f32_e32 v0, v0, v42431; GCN-NEXT: v_add_f32_e32 v0, v0, v52432; GCN-NEXT: v_add_f32_e32 v0, v0, v62433; GCN-NEXT: v_add_f32_e32 v0, v0, v72434; GCN-NEXT: v_add_f32_e32 v0, v0, v82435; GCN-NEXT: v_add_f32_e32 v0, v0, v92436; GCN-NEXT: v_add_f32_e32 v0, v0, v102437; GCN-NEXT: v_add_f32_e32 v0, v0, v112438; GCN-NEXT: ; return to shader part epilog2439 float %f, float %g, float %h, float %i, float %j, float %k, float %l) #4 {2440main_body:2441 %s = fadd float %a, %b2442 %s.1 = fadd float %s, %c2443 %s.2 = fadd float %s.1, %d2444 %s.3 = fadd float %s.2, %e2445 %s.4 = fadd float %s.3, %f2446 %s.5 = fadd float %s.4, %g2447 %s.6 = fadd float %s.5, %h2448 %s.7 = fadd float %s.6, %i2449 %s.8 = fadd float %s.7, %j2450 %s.9 = fadd float %s.8, %k2451 %s.10 = fadd float %s.9, %l2452 ret float %s.102453}2454 2455define amdgpu_kernel void @icmp64(i32 %n, i32 %s) {2456; GFX1032-LABEL: icmp64:2457; GFX1032: ; %bb.0: ; %entry2458; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x282459; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2460; GFX1032-NEXT: v_cvt_f32_u32_e32 v1, s02461; GFX1032-NEXT: s_sub_i32 s1, 0, s02462; GFX1032-NEXT: v_rcp_iflag_f32_e32 v1, v12463; GFX1032-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v12464; GFX1032-NEXT: v_cvt_u32_f32_e32 v1, v12465; GFX1032-NEXT: v_mul_lo_u32 v2, s1, v12466; GFX1032-NEXT: s_brev_b32 s1, 12467; GFX1032-NEXT: v_mul_hi_u32 v2, v1, v22468; GFX1032-NEXT: v_add_nc_u32_e32 v1, v1, v22469; GFX1032-NEXT: v_mul_hi_u32 v1, v0, v12470; GFX1032-NEXT: v_mul_lo_u32 v1, v1, s02471; GFX1032-NEXT: v_sub_nc_u32_e32 v0, v0, v12472; GFX1032-NEXT: v_subrev_nc_u32_e32 v1, s0, v02473; GFX1032-NEXT: v_cmp_le_u32_e32 vcc_lo, s0, v02474; GFX1032-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2475; GFX1032-NEXT: v_subrev_nc_u32_e32 v1, s0, v02476; GFX1032-NEXT: v_cmp_le_u32_e32 vcc_lo, s0, v02477; GFX1032-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2478; GFX1032-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v02479; GFX1032-NEXT: s_lshr_b32 s0, vcc_lo, 12480; GFX1032-NEXT: s_ff1_i32_b64 s0, s[0:1]2481; GFX1032-NEXT: s_cmp_gt_u32 s0, 92482; GFX1032-NEXT: s_cselect_b32 s0, -1, 02483; GFX1032-NEXT: s_and_b32 s0, vcc_lo, s02484; GFX1032-NEXT: s_and_saveexec_b32 s1, s02485; GFX1032-NEXT: ; %bb.1: ; %if.then2486; GFX1032-NEXT: ; divergent unreachable2487; GFX1032-NEXT: ; %bb.2: ; %UnifiedReturnBlock2488; GFX1032-NEXT: s_endpgm2489;2490; GFX1064-LABEL: icmp64:2491; GFX1064: ; %bb.0: ; %entry2492; GFX1064-NEXT: s_load_dword s0, s[4:5], 0x282493; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2494; GFX1064-NEXT: v_cvt_f32_u32_e32 v1, s02495; GFX1064-NEXT: s_sub_i32 s1, 0, s02496; GFX1064-NEXT: v_rcp_iflag_f32_e32 v1, v12497; GFX1064-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v12498; GFX1064-NEXT: v_cvt_u32_f32_e32 v1, v12499; GFX1064-NEXT: v_mul_lo_u32 v2, s1, v12500; GFX1064-NEXT: v_mul_hi_u32 v2, v1, v22501; GFX1064-NEXT: v_add_nc_u32_e32 v1, v1, v22502; GFX1064-NEXT: v_mul_hi_u32 v1, v0, v12503; GFX1064-NEXT: v_mul_lo_u32 v1, v1, s02504; GFX1064-NEXT: v_sub_nc_u32_e32 v0, v0, v12505; GFX1064-NEXT: v_subrev_nc_u32_e32 v1, s0, v02506; GFX1064-NEXT: v_cmp_le_u32_e32 vcc, s0, v02507; GFX1064-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2508; GFX1064-NEXT: v_subrev_nc_u32_e32 v1, s0, v02509; GFX1064-NEXT: v_cmp_le_u32_e32 vcc, s0, v02510; GFX1064-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2511; GFX1064-NEXT: v_cmp_eq_u32_e32 vcc, 0, v02512; GFX1064-NEXT: s_lshr_b64 s[0:1], vcc, 12513; GFX1064-NEXT: s_bitset1_b32 s1, 312514; GFX1064-NEXT: s_ff1_i32_b64 s0, s[0:1]2515; GFX1064-NEXT: s_cmp_gt_u32 s0, 92516; GFX1064-NEXT: s_cselect_b64 s[0:1], -1, 02517; GFX1064-NEXT: s_and_b64 s[0:1], vcc, s[0:1]2518; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]2519; GFX1064-NEXT: ; %bb.1: ; %if.then2520; GFX1064-NEXT: ; divergent unreachable2521; GFX1064-NEXT: ; %bb.2: ; %UnifiedReturnBlock2522; GFX1064-NEXT: s_endpgm2523entry:2524 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2525 %mul4 = mul nsw i32 %s, %n2526 %cmp = icmp slt i32 0, %mul42527 br label %if.end2528 2529if.end: ; preds = %entry2530 %rem = urem i32 %id, %s2531 %icmp = tail call i64 @llvm.amdgcn.icmp.i64.i32(i32 %rem, i32 0, i32 32)2532 %shr = lshr i64 %icmp, 12533 %notmask = shl nsw i64 -1, 02534 %and = and i64 %notmask, %shr2535 %or = or i64 %and, -92233720368547758082536 %cttz = tail call i64 @llvm.cttz.i64(i64 %or, i1 true)2537 %cast = trunc i64 %cttz to i322538 %cmp3 = icmp ugt i32 10, %cast2539 %cmp6 = icmp ne i32 %rem, 02540 %brmerge = or i1 %cmp6, %cmp32541 br i1 %brmerge, label %if.end2, label %if.then2542 2543if.then: ; preds = %if.end2544 unreachable2545 2546if.end2: ; preds = %if.end2547 ret void2548}2549 2550define amdgpu_kernel void @fcmp64(float %n, float %s) {2551; GFX1032-LABEL: fcmp64:2552; GFX1032: ; %bb.0: ; %entry2553; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x282554; GFX1032-NEXT: v_cvt_f32_u32_e32 v0, v02555; GFX1032-NEXT: ; implicit-def: $vgpr12556; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2557; GFX1032-NEXT: v_cmp_ngt_f32_e64 s1, v0, |s0|2558; GFX1032-NEXT: s_and_saveexec_b32 s2, s12559; GFX1032-NEXT: s_xor_b32 s1, exec_lo, s22560; GFX1032-NEXT: ; %bb.1: ; %frem.else2561; GFX1032-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, v02562; GFX1032-NEXT: v_cmp_eq_f32_e64 vcc_lo, v0, |s0|2563; GFX1032-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc_lo2564; GFX1032-NEXT: ; implicit-def: $vgpr02565; GFX1032-NEXT: ; %bb.2: ; %Flow132566; GFX1032-NEXT: s_andn2_saveexec_b32 s1, s12567; GFX1032-NEXT: s_cbranch_execz .LBB51_82568; GFX1032-NEXT: ; %bb.3: ; %frem.compute2569; GFX1032-NEXT: v_frexp_mant_f32_e64 v1, |s0|2570; GFX1032-NEXT: v_frexp_exp_i32_f32_e32 v7, v02571; GFX1032-NEXT: v_frexp_mant_f32_e32 v8, v02572; GFX1032-NEXT: v_ldexp_f32 v1, v1, 12573; GFX1032-NEXT: v_div_scale_f32 v2, s2, v1, v1, 1.02574; GFX1032-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v1, 1.02575; GFX1032-NEXT: v_rcp_f32_e32 v3, v22576; GFX1032-NEXT: v_fma_f32 v4, -v2, v3, 1.02577; GFX1032-NEXT: v_fmac_f32_e32 v3, v4, v32578; GFX1032-NEXT: v_mul_f32_e32 v4, v5, v32579; GFX1032-NEXT: v_fma_f32 v6, -v2, v4, v52580; GFX1032-NEXT: v_fmac_f32_e32 v4, v6, v32581; GFX1032-NEXT: v_frexp_exp_i32_f32_e32 v6, s02582; GFX1032-NEXT: v_fma_f32 v5, -v2, v4, v52583; GFX1032-NEXT: v_add_nc_u32_e32 v2, -1, v62584; GFX1032-NEXT: v_div_fmas_f32 v3, v5, v3, v42585; GFX1032-NEXT: v_xad_u32 v4, v2, -1, v72586; GFX1032-NEXT: v_ldexp_f32 v5, v8, 122587; GFX1032-NEXT: v_div_fixup_f32 v3, v3, v1, 1.02588; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, 12, v42589; GFX1032-NEXT: s_and_saveexec_b32 s2, vcc_lo2590; GFX1032-NEXT: s_cbranch_execz .LBB51_72591; GFX1032-NEXT: ; %bb.4: ; %frem.loop_body.preheader2592; GFX1032-NEXT: v_sub_nc_u32_e32 v4, v7, v62593; GFX1032-NEXT: s_mov_b32 s3, 02594; GFX1032-NEXT: v_add_nc_u32_e32 v4, 12, v42595; GFX1032-NEXT: .LBB51_5: ; %frem.loop_body2596; GFX1032-NEXT: ; =>This Inner Loop Header: Depth=12597; GFX1032-NEXT: v_mov_b32_e32 v6, v52598; GFX1032-NEXT: v_add_nc_u32_e32 v4, -12, v42599; GFX1032-NEXT: v_mul_f32_e32 v5, v6, v32600; GFX1032-NEXT: v_rndne_f32_e32 v5, v52601; GFX1032-NEXT: v_fma_f32 v5, -v5, v1, v62602; GFX1032-NEXT: v_add_f32_e32 v7, v5, v12603; GFX1032-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v52604; GFX1032-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo2605; GFX1032-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v42606; GFX1032-NEXT: v_ldexp_f32 v5, v5, 122607; GFX1032-NEXT: s_or_b32 s3, vcc_lo, s32608; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, s32609; GFX1032-NEXT: s_cbranch_execnz .LBB51_52610; GFX1032-NEXT: ; %bb.6: ; %Flow2611; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s32612; GFX1032-NEXT: v_mov_b32_e32 v5, v62613; GFX1032-NEXT: .LBB51_7: ; %Flow122614; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s22615; GFX1032-NEXT: v_add_nc_u32_e32 v4, -11, v42616; GFX1032-NEXT: v_ldexp_f32 v4, v5, v42617; GFX1032-NEXT: v_mul_f32_e32 v3, v4, v32618; GFX1032-NEXT: v_rndne_f32_e32 v3, v32619; GFX1032-NEXT: v_fma_f32 v3, -v3, v1, v42620; GFX1032-NEXT: v_add_f32_e32 v1, v3, v12621; GFX1032-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v32622; GFX1032-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2623; GFX1032-NEXT: v_ldexp_f32 v1, v1, v22624; GFX1032-NEXT: v_bfi_b32 v1, 0x7fffffff, v1, v02625; GFX1032-NEXT: .LBB51_8: ; %Flow142626; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s12627; GFX1032-NEXT: v_cmp_lg_f32_e64 vcc_lo, s0, 02628; GFX1032-NEXT: s_brev_b32 s1, 12629; GFX1032-NEXT: v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc_lo2630; GFX1032-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v02631; GFX1032-NEXT: s_lshr_b32 s0, vcc_lo, 12632; GFX1032-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v02633; GFX1032-NEXT: s_ff1_i32_b64 s0, s[0:1]2634; GFX1032-NEXT: s_cmp_gt_u32 s0, 92635; GFX1032-NEXT: s_cselect_b32 s0, -1, 02636; GFX1032-NEXT: s_and_b32 s0, vcc_lo, s02637; GFX1032-NEXT: s_and_saveexec_b32 s1, s02638; GFX1032-NEXT: ; %bb.9: ; %if.then2639; GFX1032-NEXT: ; divergent unreachable2640; GFX1032-NEXT: ; %bb.10: ; %UnifiedReturnBlock2641; GFX1032-NEXT: s_endpgm2642;2643; GFX1064-LABEL: fcmp64:2644; GFX1064: ; %bb.0: ; %entry2645; GFX1064-NEXT: s_load_dword s6, s[4:5], 0x282646; GFX1064-NEXT: v_cvt_f32_u32_e32 v0, v02647; GFX1064-NEXT: ; implicit-def: $vgpr12648; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2649; GFX1064-NEXT: v_cmp_ngt_f32_e64 s[0:1], v0, |s6|2650; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]2651; GFX1064-NEXT: s_xor_b64 s[0:1], exec, s[2:3]2652; GFX1064-NEXT: ; %bb.1: ; %frem.else2653; GFX1064-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, v02654; GFX1064-NEXT: v_cmp_eq_f32_e64 vcc, v0, |s6|2655; GFX1064-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc2656; GFX1064-NEXT: ; implicit-def: $vgpr02657; GFX1064-NEXT: ; %bb.2: ; %Flow132658; GFX1064-NEXT: s_andn2_saveexec_b64 s[0:1], s[0:1]2659; GFX1064-NEXT: s_cbranch_execz .LBB51_82660; GFX1064-NEXT: ; %bb.3: ; %frem.compute2661; GFX1064-NEXT: v_frexp_mant_f32_e64 v1, |s6|2662; GFX1064-NEXT: v_frexp_exp_i32_f32_e32 v7, v02663; GFX1064-NEXT: v_frexp_mant_f32_e32 v8, v02664; GFX1064-NEXT: v_ldexp_f32 v1, v1, 12665; GFX1064-NEXT: v_div_scale_f32 v2, s[2:3], v1, v1, 1.02666; GFX1064-NEXT: v_div_scale_f32 v5, vcc, 1.0, v1, 1.02667; GFX1064-NEXT: v_rcp_f32_e32 v3, v22668; GFX1064-NEXT: v_fma_f32 v4, -v2, v3, 1.02669; GFX1064-NEXT: v_fmac_f32_e32 v3, v4, v32670; GFX1064-NEXT: v_mul_f32_e32 v4, v5, v32671; GFX1064-NEXT: v_fma_f32 v6, -v2, v4, v52672; GFX1064-NEXT: v_fmac_f32_e32 v4, v6, v32673; GFX1064-NEXT: v_frexp_exp_i32_f32_e32 v6, s62674; GFX1064-NEXT: v_fma_f32 v5, -v2, v4, v52675; GFX1064-NEXT: v_add_nc_u32_e32 v2, -1, v62676; GFX1064-NEXT: v_div_fmas_f32 v3, v5, v3, v42677; GFX1064-NEXT: v_xad_u32 v4, v2, -1, v72678; GFX1064-NEXT: v_ldexp_f32 v5, v8, 122679; GFX1064-NEXT: v_div_fixup_f32 v3, v3, v1, 1.02680; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, 12, v42681; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], vcc2682; GFX1064-NEXT: s_cbranch_execz .LBB51_72683; GFX1064-NEXT: ; %bb.4: ; %frem.loop_body.preheader2684; GFX1064-NEXT: v_sub_nc_u32_e32 v4, v7, v62685; GFX1064-NEXT: s_mov_b64 s[4:5], 02686; GFX1064-NEXT: v_add_nc_u32_e32 v4, 12, v42687; GFX1064-NEXT: .LBB51_5: ; %frem.loop_body2688; GFX1064-NEXT: ; =>This Inner Loop Header: Depth=12689; GFX1064-NEXT: v_mov_b32_e32 v6, v52690; GFX1064-NEXT: v_add_nc_u32_e32 v4, -12, v42691; GFX1064-NEXT: v_mul_f32_e32 v5, v6, v32692; GFX1064-NEXT: v_rndne_f32_e32 v5, v52693; GFX1064-NEXT: v_fma_f32 v5, -v5, v1, v62694; GFX1064-NEXT: v_add_f32_e32 v7, v5, v12695; GFX1064-NEXT: v_cmp_gt_f32_e32 vcc, 0, v52696; GFX1064-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc2697; GFX1064-NEXT: v_cmp_gt_i32_e32 vcc, 13, v42698; GFX1064-NEXT: v_ldexp_f32 v5, v5, 122699; GFX1064-NEXT: s_or_b64 s[4:5], vcc, s[4:5]2700; GFX1064-NEXT: s_andn2_b64 exec, exec, s[4:5]2701; GFX1064-NEXT: s_cbranch_execnz .LBB51_52702; GFX1064-NEXT: ; %bb.6: ; %Flow2703; GFX1064-NEXT: s_or_b64 exec, exec, s[4:5]2704; GFX1064-NEXT: v_mov_b32_e32 v5, v62705; GFX1064-NEXT: .LBB51_7: ; %Flow122706; GFX1064-NEXT: s_or_b64 exec, exec, s[2:3]2707; GFX1064-NEXT: v_add_nc_u32_e32 v4, -11, v42708; GFX1064-NEXT: v_ldexp_f32 v4, v5, v42709; GFX1064-NEXT: v_mul_f32_e32 v3, v4, v32710; GFX1064-NEXT: v_rndne_f32_e32 v3, v32711; GFX1064-NEXT: v_fma_f32 v3, -v3, v1, v42712; GFX1064-NEXT: v_add_f32_e32 v1, v3, v12713; GFX1064-NEXT: v_cmp_gt_f32_e32 vcc, 0, v32714; GFX1064-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2715; GFX1064-NEXT: v_ldexp_f32 v1, v1, v22716; GFX1064-NEXT: v_bfi_b32 v1, 0x7fffffff, v1, v02717; GFX1064-NEXT: .LBB51_8: ; %Flow142718; GFX1064-NEXT: s_or_b64 exec, exec, s[0:1]2719; GFX1064-NEXT: v_cmp_lg_f32_e64 vcc, s6, 02720; GFX1064-NEXT: v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc2721; GFX1064-NEXT: v_cmp_eq_f32_e32 vcc, 0, v02722; GFX1064-NEXT: s_lshr_b64 s[0:1], vcc, 12723; GFX1064-NEXT: v_cmp_nlg_f32_e32 vcc, 0, v02724; GFX1064-NEXT: s_bitset1_b32 s1, 312725; GFX1064-NEXT: s_ff1_i32_b64 s0, s[0:1]2726; GFX1064-NEXT: s_cmp_gt_u32 s0, 92727; GFX1064-NEXT: s_cselect_b64 s[0:1], -1, 02728; GFX1064-NEXT: s_and_b64 s[0:1], vcc, s[0:1]2729; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]2730; GFX1064-NEXT: ; %bb.9: ; %if.then2731; GFX1064-NEXT: ; divergent unreachable2732; GFX1064-NEXT: ; %bb.10: ; %UnifiedReturnBlock2733; GFX1064-NEXT: s_endpgm2734entry:2735 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2736 %id.f = uitofp i32 %id to float2737 %mul4 = fmul float %s, %n2738 %cmp = fcmp ult float 0.0, %mul42739 br label %if.end2740 2741if.end: ; preds = %entry2742 %rem.f = frem float %id.f, %s2743 %fcmp = tail call i64 @llvm.amdgcn.fcmp.i64.f32(float %rem.f, float 0.0, i32 1)2744 %shr = lshr i64 %fcmp, 12745 %notmask = shl nsw i64 -1, 02746 %and = and i64 %notmask, %shr2747 %or = or i64 %and, -92233720368547758082748 %cttz = tail call i64 @llvm.cttz.i64(i64 %or, i1 true)2749 %cast = trunc i64 %cttz to i322750 %cmp3 = icmp ugt i32 10, %cast2751 %cmp6 = fcmp one float %rem.f, 0.02752 %brmerge = or i1 %cmp6, %cmp32753 br i1 %brmerge, label %if.end2, label %if.then2754 2755if.then: ; preds = %if.end2756 unreachable2757 2758if.end2: ; preds = %if.end2759 ret void2760}2761 2762define amdgpu_kernel void @icmp32(i32 %n, i32 %s) {2763; GFX1032-LABEL: icmp32:2764; GFX1032: ; %bb.0: ; %entry2765; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x282766; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2767; GFX1032-NEXT: v_cvt_f32_u32_e32 v1, s02768; GFX1032-NEXT: s_sub_i32 s1, 0, s02769; GFX1032-NEXT: v_rcp_iflag_f32_e32 v1, v12770; GFX1032-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v12771; GFX1032-NEXT: v_cvt_u32_f32_e32 v1, v12772; GFX1032-NEXT: v_mul_lo_u32 v2, s1, v12773; GFX1032-NEXT: v_mul_hi_u32 v2, v1, v22774; GFX1032-NEXT: v_add_nc_u32_e32 v1, v1, v22775; GFX1032-NEXT: v_mul_hi_u32 v1, v0, v12776; GFX1032-NEXT: v_mul_lo_u32 v1, v1, s02777; GFX1032-NEXT: v_sub_nc_u32_e32 v0, v0, v12778; GFX1032-NEXT: v_subrev_nc_u32_e32 v1, s0, v02779; GFX1032-NEXT: v_cmp_le_u32_e32 vcc_lo, s0, v02780; GFX1032-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2781; GFX1032-NEXT: v_subrev_nc_u32_e32 v1, s0, v02782; GFX1032-NEXT: v_cmp_le_u32_e32 vcc_lo, s0, v02783; GFX1032-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2784; GFX1032-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v02785; GFX1032-NEXT: s_lshr_b32 s0, vcc_lo, 12786; GFX1032-NEXT: s_bitset1_b32 s0, 312787; GFX1032-NEXT: s_ff1_i32_b32 s0, s02788; GFX1032-NEXT: s_cmp_gt_u32 s0, 92789; GFX1032-NEXT: s_cselect_b32 s0, -1, 02790; GFX1032-NEXT: s_and_b32 s0, vcc_lo, s02791; GFX1032-NEXT: s_and_saveexec_b32 s1, s02792; GFX1032-NEXT: ; %bb.1: ; %if.then2793; GFX1032-NEXT: ; divergent unreachable2794; GFX1032-NEXT: ; %bb.2: ; %UnifiedReturnBlock2795; GFX1032-NEXT: s_endpgm2796;2797; GFX1064-LABEL: icmp32:2798; GFX1064: ; %bb.0: ; %entry2799; GFX1064-NEXT: s_load_dword s0, s[4:5], 0x282800; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2801; GFX1064-NEXT: v_cvt_f32_u32_e32 v1, s02802; GFX1064-NEXT: s_sub_i32 s1, 0, s02803; GFX1064-NEXT: v_rcp_iflag_f32_e32 v1, v12804; GFX1064-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v12805; GFX1064-NEXT: v_cvt_u32_f32_e32 v1, v12806; GFX1064-NEXT: v_mul_lo_u32 v2, s1, v12807; GFX1064-NEXT: v_mul_hi_u32 v2, v1, v22808; GFX1064-NEXT: v_add_nc_u32_e32 v1, v1, v22809; GFX1064-NEXT: v_mul_hi_u32 v1, v0, v12810; GFX1064-NEXT: v_mul_lo_u32 v1, v1, s02811; GFX1064-NEXT: v_sub_nc_u32_e32 v0, v0, v12812; GFX1064-NEXT: v_subrev_nc_u32_e32 v1, s0, v02813; GFX1064-NEXT: v_cmp_le_u32_e32 vcc, s0, v02814; GFX1064-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2815; GFX1064-NEXT: v_subrev_nc_u32_e32 v1, s0, v02816; GFX1064-NEXT: v_cmp_le_u32_e32 vcc, s0, v02817; GFX1064-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2818; GFX1064-NEXT: v_cmp_eq_u32_e32 vcc, 0, v02819; GFX1064-NEXT: s_lshr_b32 s0, vcc_lo, 12820; GFX1064-NEXT: s_bitset1_b32 s0, 312821; GFX1064-NEXT: s_ff1_i32_b32 s0, s02822; GFX1064-NEXT: s_cmp_gt_u32 s0, 92823; GFX1064-NEXT: s_cselect_b64 s[0:1], -1, 02824; GFX1064-NEXT: s_and_b64 s[0:1], vcc, s[0:1]2825; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]2826; GFX1064-NEXT: ; %bb.1: ; %if.then2827; GFX1064-NEXT: ; divergent unreachable2828; GFX1064-NEXT: ; %bb.2: ; %UnifiedReturnBlock2829; GFX1064-NEXT: s_endpgm2830entry:2831 %id = tail call i32 @llvm.amdgcn.workitem.id.x()2832 %mul4 = mul nsw i32 %s, %n2833 %cmp = icmp slt i32 0, %mul42834 br label %if.end2835 2836if.end: ; preds = %entry2837 %rem = urem i32 %id, %s2838 %icmp = tail call i32 @llvm.amdgcn.icmp.i32.i32(i32 %rem, i32 0, i32 32)2839 %shr = lshr i32 %icmp, 12840 %notmask = shl nsw i32 -1, 02841 %and = and i32 %notmask, %shr2842 %or = or i32 %and, 21474836482843 %cttz = tail call i32 @llvm.cttz.i32(i32 %or, i1 true)2844 %cmp3 = icmp ugt i32 10, %cttz2845 %cmp6 = icmp ne i32 %rem, 02846 %brmerge = or i1 %cmp6, %cmp32847 br i1 %brmerge, label %if.end2, label %if.then2848 2849if.then: ; preds = %if.end2850 unreachable2851 2852if.end2: ; preds = %if.end2853 ret void2854}2855 2856define amdgpu_kernel void @fcmp32(float %n, float %s) {2857; GFX1032-LABEL: fcmp32:2858; GFX1032: ; %bb.0: ; %entry2859; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x282860; GFX1032-NEXT: v_cvt_f32_u32_e32 v0, v02861; GFX1032-NEXT: ; implicit-def: $vgpr12862; GFX1032-NEXT: s_waitcnt lgkmcnt(0)2863; GFX1032-NEXT: v_cmp_ngt_f32_e64 s1, v0, |s0|2864; GFX1032-NEXT: s_and_saveexec_b32 s2, s12865; GFX1032-NEXT: s_xor_b32 s1, exec_lo, s22866; GFX1032-NEXT: ; %bb.1: ; %frem.else2867; GFX1032-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, v02868; GFX1032-NEXT: v_cmp_eq_f32_e64 vcc_lo, v0, |s0|2869; GFX1032-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc_lo2870; GFX1032-NEXT: ; implicit-def: $vgpr02871; GFX1032-NEXT: ; %bb.2: ; %Flow132872; GFX1032-NEXT: s_andn2_saveexec_b32 s1, s12873; GFX1032-NEXT: s_cbranch_execz .LBB53_82874; GFX1032-NEXT: ; %bb.3: ; %frem.compute2875; GFX1032-NEXT: v_frexp_mant_f32_e64 v1, |s0|2876; GFX1032-NEXT: v_frexp_exp_i32_f32_e32 v7, v02877; GFX1032-NEXT: v_frexp_mant_f32_e32 v8, v02878; GFX1032-NEXT: v_ldexp_f32 v1, v1, 12879; GFX1032-NEXT: v_div_scale_f32 v2, s2, v1, v1, 1.02880; GFX1032-NEXT: v_div_scale_f32 v5, vcc_lo, 1.0, v1, 1.02881; GFX1032-NEXT: v_rcp_f32_e32 v3, v22882; GFX1032-NEXT: v_fma_f32 v4, -v2, v3, 1.02883; GFX1032-NEXT: v_fmac_f32_e32 v3, v4, v32884; GFX1032-NEXT: v_mul_f32_e32 v4, v5, v32885; GFX1032-NEXT: v_fma_f32 v6, -v2, v4, v52886; GFX1032-NEXT: v_fmac_f32_e32 v4, v6, v32887; GFX1032-NEXT: v_frexp_exp_i32_f32_e32 v6, s02888; GFX1032-NEXT: v_fma_f32 v5, -v2, v4, v52889; GFX1032-NEXT: v_add_nc_u32_e32 v2, -1, v62890; GFX1032-NEXT: v_div_fmas_f32 v3, v5, v3, v42891; GFX1032-NEXT: v_xad_u32 v4, v2, -1, v72892; GFX1032-NEXT: v_ldexp_f32 v5, v8, 122893; GFX1032-NEXT: v_div_fixup_f32 v3, v3, v1, 1.02894; GFX1032-NEXT: v_cmp_lt_i32_e32 vcc_lo, 12, v42895; GFX1032-NEXT: s_and_saveexec_b32 s2, vcc_lo2896; GFX1032-NEXT: s_cbranch_execz .LBB53_72897; GFX1032-NEXT: ; %bb.4: ; %frem.loop_body.preheader2898; GFX1032-NEXT: v_sub_nc_u32_e32 v4, v7, v62899; GFX1032-NEXT: s_mov_b32 s3, 02900; GFX1032-NEXT: v_add_nc_u32_e32 v4, 12, v42901; GFX1032-NEXT: .LBB53_5: ; %frem.loop_body2902; GFX1032-NEXT: ; =>This Inner Loop Header: Depth=12903; GFX1032-NEXT: v_mov_b32_e32 v6, v52904; GFX1032-NEXT: v_add_nc_u32_e32 v4, -12, v42905; GFX1032-NEXT: v_mul_f32_e32 v5, v6, v32906; GFX1032-NEXT: v_rndne_f32_e32 v5, v52907; GFX1032-NEXT: v_fma_f32 v5, -v5, v1, v62908; GFX1032-NEXT: v_add_f32_e32 v7, v5, v12909; GFX1032-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v52910; GFX1032-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc_lo2911; GFX1032-NEXT: v_cmp_gt_i32_e32 vcc_lo, 13, v42912; GFX1032-NEXT: v_ldexp_f32 v5, v5, 122913; GFX1032-NEXT: s_or_b32 s3, vcc_lo, s32914; GFX1032-NEXT: s_andn2_b32 exec_lo, exec_lo, s32915; GFX1032-NEXT: s_cbranch_execnz .LBB53_52916; GFX1032-NEXT: ; %bb.6: ; %Flow2917; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s32918; GFX1032-NEXT: v_mov_b32_e32 v5, v62919; GFX1032-NEXT: .LBB53_7: ; %Flow122920; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s22921; GFX1032-NEXT: v_add_nc_u32_e32 v4, -11, v42922; GFX1032-NEXT: v_ldexp_f32 v4, v5, v42923; GFX1032-NEXT: v_mul_f32_e32 v3, v4, v32924; GFX1032-NEXT: v_rndne_f32_e32 v3, v32925; GFX1032-NEXT: v_fma_f32 v3, -v3, v1, v42926; GFX1032-NEXT: v_add_f32_e32 v1, v3, v12927; GFX1032-NEXT: v_cmp_gt_f32_e32 vcc_lo, 0, v32928; GFX1032-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2929; GFX1032-NEXT: v_ldexp_f32 v1, v1, v22930; GFX1032-NEXT: v_bfi_b32 v1, 0x7fffffff, v1, v02931; GFX1032-NEXT: .LBB53_8: ; %Flow142932; GFX1032-NEXT: s_or_b32 exec_lo, exec_lo, s12933; GFX1032-NEXT: v_cmp_lg_f32_e64 vcc_lo, s0, 02934; GFX1032-NEXT: v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc_lo2935; GFX1032-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v02936; GFX1032-NEXT: s_lshr_b32 s0, vcc_lo, 12937; GFX1032-NEXT: v_cmp_nlg_f32_e32 vcc_lo, 0, v02938; GFX1032-NEXT: s_bitset1_b32 s0, 312939; GFX1032-NEXT: s_ff1_i32_b32 s0, s02940; GFX1032-NEXT: s_cmp_gt_u32 s0, 92941; GFX1032-NEXT: s_cselect_b32 s0, -1, 02942; GFX1032-NEXT: s_and_b32 s0, vcc_lo, s02943; GFX1032-NEXT: s_and_saveexec_b32 s1, s02944; GFX1032-NEXT: ; %bb.9: ; %if.then2945; GFX1032-NEXT: ; divergent unreachable2946; GFX1032-NEXT: ; %bb.10: ; %UnifiedReturnBlock2947; GFX1032-NEXT: s_endpgm2948;2949; GFX1064-LABEL: fcmp32:2950; GFX1064: ; %bb.0: ; %entry2951; GFX1064-NEXT: s_load_dword s6, s[4:5], 0x282952; GFX1064-NEXT: v_cvt_f32_u32_e32 v0, v02953; GFX1064-NEXT: ; implicit-def: $vgpr12954; GFX1064-NEXT: s_waitcnt lgkmcnt(0)2955; GFX1064-NEXT: v_cmp_ngt_f32_e64 s[0:1], v0, |s6|2956; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]2957; GFX1064-NEXT: s_xor_b64 s[0:1], exec, s[2:3]2958; GFX1064-NEXT: ; %bb.1: ; %frem.else2959; GFX1064-NEXT: v_bfi_b32 v1, 0x7fffffff, 0, v02960; GFX1064-NEXT: v_cmp_eq_f32_e64 vcc, v0, |s6|2961; GFX1064-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc2962; GFX1064-NEXT: ; implicit-def: $vgpr02963; GFX1064-NEXT: ; %bb.2: ; %Flow132964; GFX1064-NEXT: s_andn2_saveexec_b64 s[0:1], s[0:1]2965; GFX1064-NEXT: s_cbranch_execz .LBB53_82966; GFX1064-NEXT: ; %bb.3: ; %frem.compute2967; GFX1064-NEXT: v_frexp_mant_f32_e64 v1, |s6|2968; GFX1064-NEXT: v_frexp_exp_i32_f32_e32 v7, v02969; GFX1064-NEXT: v_frexp_mant_f32_e32 v8, v02970; GFX1064-NEXT: v_ldexp_f32 v1, v1, 12971; GFX1064-NEXT: v_div_scale_f32 v2, s[2:3], v1, v1, 1.02972; GFX1064-NEXT: v_div_scale_f32 v5, vcc, 1.0, v1, 1.02973; GFX1064-NEXT: v_rcp_f32_e32 v3, v22974; GFX1064-NEXT: v_fma_f32 v4, -v2, v3, 1.02975; GFX1064-NEXT: v_fmac_f32_e32 v3, v4, v32976; GFX1064-NEXT: v_mul_f32_e32 v4, v5, v32977; GFX1064-NEXT: v_fma_f32 v6, -v2, v4, v52978; GFX1064-NEXT: v_fmac_f32_e32 v4, v6, v32979; GFX1064-NEXT: v_frexp_exp_i32_f32_e32 v6, s62980; GFX1064-NEXT: v_fma_f32 v5, -v2, v4, v52981; GFX1064-NEXT: v_add_nc_u32_e32 v2, -1, v62982; GFX1064-NEXT: v_div_fmas_f32 v3, v5, v3, v42983; GFX1064-NEXT: v_xad_u32 v4, v2, -1, v72984; GFX1064-NEXT: v_ldexp_f32 v5, v8, 122985; GFX1064-NEXT: v_div_fixup_f32 v3, v3, v1, 1.02986; GFX1064-NEXT: v_cmp_lt_i32_e32 vcc, 12, v42987; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], vcc2988; GFX1064-NEXT: s_cbranch_execz .LBB53_72989; GFX1064-NEXT: ; %bb.4: ; %frem.loop_body.preheader2990; GFX1064-NEXT: v_sub_nc_u32_e32 v4, v7, v62991; GFX1064-NEXT: s_mov_b64 s[4:5], 02992; GFX1064-NEXT: v_add_nc_u32_e32 v4, 12, v42993; GFX1064-NEXT: .LBB53_5: ; %frem.loop_body2994; GFX1064-NEXT: ; =>This Inner Loop Header: Depth=12995; GFX1064-NEXT: v_mov_b32_e32 v6, v52996; GFX1064-NEXT: v_add_nc_u32_e32 v4, -12, v42997; GFX1064-NEXT: v_mul_f32_e32 v5, v6, v32998; GFX1064-NEXT: v_rndne_f32_e32 v5, v52999; GFX1064-NEXT: v_fma_f32 v5, -v5, v1, v63000; GFX1064-NEXT: v_add_f32_e32 v7, v5, v13001; GFX1064-NEXT: v_cmp_gt_f32_e32 vcc, 0, v53002; GFX1064-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc3003; GFX1064-NEXT: v_cmp_gt_i32_e32 vcc, 13, v43004; GFX1064-NEXT: v_ldexp_f32 v5, v5, 123005; GFX1064-NEXT: s_or_b64 s[4:5], vcc, s[4:5]3006; GFX1064-NEXT: s_andn2_b64 exec, exec, s[4:5]3007; GFX1064-NEXT: s_cbranch_execnz .LBB53_53008; GFX1064-NEXT: ; %bb.6: ; %Flow3009; GFX1064-NEXT: s_or_b64 exec, exec, s[4:5]3010; GFX1064-NEXT: v_mov_b32_e32 v5, v63011; GFX1064-NEXT: .LBB53_7: ; %Flow123012; GFX1064-NEXT: s_or_b64 exec, exec, s[2:3]3013; GFX1064-NEXT: v_add_nc_u32_e32 v4, -11, v43014; GFX1064-NEXT: v_ldexp_f32 v4, v5, v43015; GFX1064-NEXT: v_mul_f32_e32 v3, v4, v33016; GFX1064-NEXT: v_rndne_f32_e32 v3, v33017; GFX1064-NEXT: v_fma_f32 v3, -v3, v1, v43018; GFX1064-NEXT: v_add_f32_e32 v1, v3, v13019; GFX1064-NEXT: v_cmp_gt_f32_e32 vcc, 0, v33020; GFX1064-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc3021; GFX1064-NEXT: v_ldexp_f32 v1, v1, v23022; GFX1064-NEXT: v_bfi_b32 v1, 0x7fffffff, v1, v03023; GFX1064-NEXT: .LBB53_8: ; %Flow143024; GFX1064-NEXT: s_or_b64 exec, exec, s[0:1]3025; GFX1064-NEXT: v_cmp_lg_f32_e64 vcc, s6, 03026; GFX1064-NEXT: v_cndmask_b32_e32 v0, 0x7fc00000, v1, vcc3027; GFX1064-NEXT: v_cmp_eq_f32_e32 vcc, 0, v03028; GFX1064-NEXT: s_lshr_b32 s0, vcc_lo, 13029; GFX1064-NEXT: v_cmp_nlg_f32_e32 vcc, 0, v03030; GFX1064-NEXT: s_bitset1_b32 s0, 313031; GFX1064-NEXT: s_ff1_i32_b32 s0, s03032; GFX1064-NEXT: s_cmp_gt_u32 s0, 93033; GFX1064-NEXT: s_cselect_b64 s[0:1], -1, 03034; GFX1064-NEXT: s_and_b64 s[0:1], vcc, s[0:1]3035; GFX1064-NEXT: s_and_saveexec_b64 s[2:3], s[0:1]3036; GFX1064-NEXT: ; %bb.9: ; %if.then3037; GFX1064-NEXT: ; divergent unreachable3038; GFX1064-NEXT: ; %bb.10: ; %UnifiedReturnBlock3039; GFX1064-NEXT: s_endpgm3040entry:3041 %id = tail call i32 @llvm.amdgcn.workitem.id.x()3042 %id.f = uitofp i32 %id to float3043 %mul4 = fmul float %s, %n3044 %cmp = fcmp ult float 0.0, %mul43045 br label %if.end3046 3047if.end: ; preds = %entry3048 %rem.f = frem float %id.f, %s3049 %fcmp = tail call i32 @llvm.amdgcn.fcmp.i32.f32(float %rem.f, float 0.0, i32 1)3050 %shr = lshr i32 %fcmp, 13051 %notmask = shl nsw i32 -1, 03052 %and = and i32 %notmask, %shr3053 %or = or i32 %and, 21474836483054 %cttz = tail call i32 @llvm.cttz.i32(i32 %or, i1 true)3055 %cmp3 = icmp ugt i32 10, %cttz3056 %cmp6 = fcmp one float %rem.f, 0.03057 %brmerge = or i1 %cmp6, %cmp33058 br i1 %brmerge, label %if.end2, label %if.then3059 3060if.then: ; preds = %if.end3061 unreachable3062 3063if.end2: ; preds = %if.end3064 ret void3065}3066 3067declare void @external_void_func_void() #13068 3069define void @callee_no_stack_with_call() #1 {3070; GFX1032-LABEL: callee_no_stack_with_call:3071; GFX1032: ; %bb.0:3072; GFX1032-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3073; GFX1032-NEXT: s_mov_b32 s16, s333074; GFX1032-NEXT: s_mov_b32 s33, s323075; GFX1032-NEXT: s_or_saveexec_b32 s17, -13076; GFX1032-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill3077; GFX1032-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)3078; GFX1032-NEXT: s_mov_b32 exec_lo, s173079; GFX1032-NEXT: s_addk_i32 s32, 0x2003080; GFX1032-NEXT: v_writelane_b32 v40, s16, 23081; GFX1032-NEXT: s_getpc_b64 s[16:17]3082; GFX1032-NEXT: s_add_u32 s16, s16, external_void_func_void@gotpcrel32@lo+43083; GFX1032-NEXT: s_addc_u32 s17, s17, external_void_func_void@gotpcrel32@hi+123084; GFX1032-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x03085; GFX1032-NEXT: v_writelane_b32 v40, s30, 03086; GFX1032-NEXT: v_writelane_b32 v40, s31, 13087; GFX1032-NEXT: s_waitcnt lgkmcnt(0)3088; GFX1032-NEXT: s_swappc_b64 s[30:31], s[16:17]3089; GFX1032-NEXT: v_readlane_b32 s31, v40, 13090; GFX1032-NEXT: v_readlane_b32 s30, v40, 03091; GFX1032-NEXT: s_mov_b32 s32, s333092; GFX1032-NEXT: v_readlane_b32 s4, v40, 23093; GFX1032-NEXT: s_or_saveexec_b32 s5, -13094; GFX1032-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload3095; GFX1032-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)3096; GFX1032-NEXT: s_mov_b32 exec_lo, s53097; GFX1032-NEXT: s_mov_b32 s33, s43098; GFX1032-NEXT: s_waitcnt vmcnt(0)3099; GFX1032-NEXT: s_setpc_b64 s[30:31]3100;3101; GFX1064-LABEL: callee_no_stack_with_call:3102; GFX1064: ; %bb.0:3103; GFX1064-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3104; GFX1064-NEXT: s_mov_b32 s16, s333105; GFX1064-NEXT: s_mov_b32 s33, s323106; GFX1064-NEXT: s_or_saveexec_b64 s[18:19], -13107; GFX1064-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill3108; GFX1064-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)3109; GFX1064-NEXT: s_mov_b64 exec, s[18:19]3110; GFX1064-NEXT: s_addk_i32 s32, 0x4003111; GFX1064-NEXT: v_writelane_b32 v40, s16, 23112; GFX1064-NEXT: s_getpc_b64 s[16:17]3113; GFX1064-NEXT: s_add_u32 s16, s16, external_void_func_void@gotpcrel32@lo+43114; GFX1064-NEXT: s_addc_u32 s17, s17, external_void_func_void@gotpcrel32@hi+123115; GFX1064-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x03116; GFX1064-NEXT: v_writelane_b32 v40, s30, 03117; GFX1064-NEXT: v_writelane_b32 v40, s31, 13118; GFX1064-NEXT: s_waitcnt lgkmcnt(0)3119; GFX1064-NEXT: s_swappc_b64 s[30:31], s[16:17]3120; GFX1064-NEXT: v_readlane_b32 s31, v40, 13121; GFX1064-NEXT: v_readlane_b32 s30, v40, 03122; GFX1064-NEXT: s_mov_b32 s32, s333123; GFX1064-NEXT: v_readlane_b32 s4, v40, 23124; GFX1064-NEXT: s_or_saveexec_b64 s[6:7], -13125; GFX1064-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload3126; GFX1064-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)3127; GFX1064-NEXT: s_mov_b64 exec, s[6:7]3128; GFX1064-NEXT: s_mov_b32 s33, s43129; GFX1064-NEXT: s_waitcnt vmcnt(0)3130; GFX1064-NEXT: s_setpc_b64 s[30:31]3131 call void @external_void_func_void()3132 ret void3133}3134 3135 3136declare i32 @llvm.amdgcn.workitem.id.x()3137declare float @llvm.fabs.f32(float)3138declare { float, i1 } @llvm.amdgcn.div.scale.f32(float, float, i1)3139declare { double, i1 } @llvm.amdgcn.div.scale.f64(double, double, i1)3140declare float @llvm.amdgcn.div.fmas.f32(float, float, float, i1)3141declare double @llvm.amdgcn.div.fmas.f64(double, double, double, i1)3142declare i1 @llvm.amdgcn.class.f32(float, i32)3143declare i32 @llvm.amdgcn.set.inactive.i32(i32, i32)3144declare i64 @llvm.amdgcn.set.inactive.i64(i64, i64)3145declare <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32, float, <8 x i32>, <4 x i32>, i1, i32, i32)3146declare <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32, float, float, <8 x i32>, <4 x i32>, i1, i32, i32)3147declare float @llvm.amdgcn.strict.wwm.f32(float)3148declare i32 @llvm.amdgcn.strict.wwm.i32(i32)3149declare i64 @llvm.amdgcn.strict.wwm.i64(i64)3150declare float @llvm.amdgcn.wwm.f32(float)3151declare i32 @llvm.amdgcn.wqm.i32(i32)3152declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32)3153declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32)3154declare float @llvm.amdgcn.struct.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32, i32 immarg)3155declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32)3156declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32)3157declare i64 @llvm.amdgcn.fcmp.i64.f32(float, float, i32)3158declare i64 @llvm.amdgcn.icmp.i64.i32(i32, i32, i32)3159declare i32 @llvm.amdgcn.fcmp.i32.f32(float, float, i32)3160declare i32 @llvm.amdgcn.icmp.i32.i32(i32, i32, i32)3161declare void @llvm.amdgcn.kill(i1)3162declare i1 @llvm.amdgcn.wqm.vote(i1)3163declare i1 @llvm.amdgcn.ps.live()3164declare i64 @llvm.cttz.i64(i64, i1)3165declare i32 @llvm.cttz.i32(i32, i1)3166declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #53167 3168attributes #0 = { nounwind readnone speculatable }3169attributes #1 = { nounwind }3170attributes #2 = { nounwind readnone optnone noinline }3171attributes #3 = { "target-features"="+wavefrontsize32" }3172attributes #4 = { "target-features"="+wavefrontsize64" }3173attributes #5 = { inaccessiblememonly nounwind }3174;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3175; GFX10DEFWAVE: {{.*}}3176