43 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 62# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-generic -run-pass=machine-sink %s -o - | FileCheck %s3 4---5name: wmma_test6tracksRegLiveness: true7body: |8 ; CHECK-LABEL: name: wmma_test9 ; CHECK: bb.0:10 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)11 ; CHECK-NEXT: {{ $}}12 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_128 = IMPLICIT_DEF13 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vreg_128 = IMPLICIT_DEF14 ; CHECK-NEXT: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF15 ; CHECK-NEXT: early-clobber %3:vreg_256 = V_WMMA_F32_16X16X16_F16_w32_threeaddr 8, [[DEF]], 8, [[DEF1]], 8, 0, 0, 0, implicit $exec16 ; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[DEF2]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec17 ; CHECK-NEXT: S_BRANCH %bb.118 ; CHECK-NEXT: {{ $}}19 ; CHECK-NEXT: bb.1:20 ; CHECK-NEXT: successors: %bb.2(0x80000000)21 ; CHECK-NEXT: {{ $}}22 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_256 = COPY %3.sub123 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: bb.2:25 ; CHECK-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec26 ; CHECK-NEXT: S_ENDPGM 027 bb.0:28 %0:vreg_128 = IMPLICIT_DEF29 %1:vreg_128 = IMPLICIT_DEF30 %2:sreg_32 = IMPLICIT_DEF31 early-clobber %3:vreg_256 = V_WMMA_F32_16X16X16_F16_w32_threeaddr 8, %0:vreg_128, 8, %1:vreg_128, 8, 0, 0, 0, implicit $exec32 %4:sreg_32 = SI_IF %2:sreg_32, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec33 S_BRANCH %bb.134 35 bb.1:36 %5:vreg_256 = COPY %3.sub1:vreg_25637 38 bb.2:39 SI_END_CF %4:sreg_32, implicit-def dead $exec, implicit-def dead $scc, implicit $exec40 S_ENDPGM 041 42...43