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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64 < %s | FileCheck %s --check-prefix=GFX123 4define amdgpu_ps void @test_wmma_i32_16x16x16_iu8_zext_src0(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {5; GFX12-LABEL: test_wmma_i32_16x16x16_iu8_zext_src0:6; GFX12: ; %bb.0: ; %bb7; GFX12-NEXT: v_wmma_i32_16x16x16_iu8 v[2:5], v0, v1, v[2:5] neg_lo:[1,0,0]8; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off9; GFX12-NEXT: s_endpgm10bb:11 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.i32(i1 1, i32 %A, i1 0, i32 %B, <4 x i32> %C, i1 0)12 store <4 x i32> %res, ptr addrspace(1) %out13 ret void14}15 16define amdgpu_ps void @test_wmma_i32_16x16x16_iu8_zext_src1(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {17; GFX12-LABEL: test_wmma_i32_16x16x16_iu8_zext_src1:18; GFX12: ; %bb.0: ; %bb19; GFX12-NEXT: v_wmma_i32_16x16x16_iu8 v[2:5], v0, v1, v[2:5] neg_lo:[0,1,0]20; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off21; GFX12-NEXT: s_endpgm22bb:23 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.i32(i1 0, i32 %A, i1 1, i32 %B, <4 x i32> %C, i1 0)24 store <4 x i32> %res, ptr addrspace(1) %out25 ret void26}27 28define amdgpu_ps void @test_wmma_i32_16x16x16_iu8_clamp(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {29; GFX12-LABEL: test_wmma_i32_16x16x16_iu8_clamp:30; GFX12: ; %bb.0: ; %bb31; GFX12-NEXT: v_wmma_i32_16x16x16_iu8 v[2:5], v0, v1, v[2:5] clamp32; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off33; GFX12-NEXT: s_endpgm34bb:35 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.i32(i1 0, i32 %A, i1 0, i32 %B, <4 x i32> %C, i1 1)36 store <4 x i32> %res, ptr addrspace(1) %out37 ret void38}39 40 41 42define amdgpu_ps void @test_wmma_i32_16x16x16_iu4_zext_src0(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {43; GFX12-LABEL: test_wmma_i32_16x16x16_iu4_zext_src0:44; GFX12: ; %bb.0: ; %bb45; GFX12-NEXT: v_wmma_i32_16x16x16_iu4 v[2:5], v0, v1, v[2:5] neg_lo:[1,0,0]46; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off47; GFX12-NEXT: s_endpgm48bb:49 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.i32(i1 1, i32 %A, i1 0, i32 %B, <4 x i32> %C, i1 0)50 store <4 x i32> %res, ptr addrspace(1) %out51 ret void52}53 54define amdgpu_ps void @test_wmma_i32_16x16x16_iu4_zext_src1(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {55; GFX12-LABEL: test_wmma_i32_16x16x16_iu4_zext_src1:56; GFX12: ; %bb.0: ; %bb57; GFX12-NEXT: v_wmma_i32_16x16x16_iu4 v[2:5], v0, v1, v[2:5] neg_lo:[0,1,0]58; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off59; GFX12-NEXT: s_endpgm60bb:61 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.i32(i1 0, i32 %A, i1 1, i32 %B, <4 x i32> %C, i1 0)62 store <4 x i32> %res, ptr addrspace(1) %out63 ret void64}65 66define amdgpu_ps void @test_wmma_i32_16x16x16_iu4_clamp(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {67; GFX12-LABEL: test_wmma_i32_16x16x16_iu4_clamp:68; GFX12: ; %bb.0: ; %bb69; GFX12-NEXT: v_wmma_i32_16x16x16_iu4 v[2:5], v0, v1, v[2:5] clamp70; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off71; GFX12-NEXT: s_endpgm72bb:73 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.i32(i1 0, i32 %A, i1 0, i32 %B, <4 x i32> %C, i1 1)74 store <4 x i32> %res, ptr addrspace(1) %out75 ret void76}77 78 79 80define amdgpu_ps void @test_wmma_i32_16x16x32_iu4_zext_src0(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {81; GFX12-LABEL: test_wmma_i32_16x16x32_iu4_zext_src0:82; GFX12: ; %bb.0: ; %bb83; GFX12-NEXT: v_wmma_i32_16x16x32_iu4 v[2:5], v0, v1, v[2:5] neg_lo:[1,0,0]84; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off85; GFX12-NEXT: s_endpgm86bb:87 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x32.iu4.v4i32.i32(i1 1, i32 %A, i1 0, i32 %B, <4 x i32> %C, i1 0)88 store <4 x i32> %res, ptr addrspace(1) %out89 ret void90}91 92define amdgpu_ps void @test_wmma_i32_16x16x32_iu4_zext_src1(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {93; GFX12-LABEL: test_wmma_i32_16x16x32_iu4_zext_src1:94; GFX12: ; %bb.0: ; %bb95; GFX12-NEXT: v_wmma_i32_16x16x32_iu4 v[2:5], v0, v1, v[2:5] neg_lo:[0,1,0]96; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off97; GFX12-NEXT: s_endpgm98bb:99 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x32.iu4.v4i32.i32(i1 0, i32 %A, i1 1, i32 %B, <4 x i32> %C, i1 0)100 store <4 x i32> %res, ptr addrspace(1) %out101 ret void102}103 104define amdgpu_ps void @test_wmma_i32_16x16x32_iu4_clamp(i32 %A, i32 %B, <4 x i32> %C, ptr addrspace(1) %out) {105; GFX12-LABEL: test_wmma_i32_16x16x32_iu4_clamp:106; GFX12: ; %bb.0: ; %bb107; GFX12-NEXT: v_wmma_i32_16x16x32_iu4 v[2:5], v0, v1, v[2:5] clamp108; GFX12-NEXT: global_store_b128 v[6:7], v[2:5], off109; GFX12-NEXT: s_endpgm110bb:111 %res = call <4 x i32> @llvm.amdgcn.wmma.i32.16x16x32.iu4.v4i32.i32(i1 0, i32 %A, i1 0, i32 %B, <4 x i32> %C, i1 1)112 store <4 x i32> %res, ptr addrspace(1) %out113 ret void114}115 116define amdgpu_ps void @test_swmmac_i32_16x16x32_iu8_zext_src0(i32 %A, <2 x i32> %B, <4 x i32> %C, i8 %Index, ptr addrspace(1) %out) {117; GFX12-LABEL: test_swmmac_i32_16x16x32_iu8_zext_src0:118; GFX12: ; %bb.0: ; %bb119; GFX12-NEXT: v_swmmac_i32_16x16x32_iu8 v[3:6], v0, v[1:2], v7 neg_lo:[1,0,0]120; GFX12-NEXT: global_store_b128 v[8:9], v[3:6], off121; GFX12-NEXT: s_endpgm122bb:123 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v4i32.i32.v2i32.i8(i1 1, i32 %A, i1 0, <2 x i32> %B, <4 x i32> %C, i8 %Index, i1 0)124 store <4 x i32> %res, ptr addrspace(1) %out125 ret void126}127 128define amdgpu_ps void @test_swmmac_i32_16x16x32_iu8_zext_src1(i32 %A, <2 x i32> %B, <4 x i32> %C, i8 %Index, ptr addrspace(1) %out) {129; GFX12-LABEL: test_swmmac_i32_16x16x32_iu8_zext_src1:130; GFX12: ; %bb.0: ; %bb131; GFX12-NEXT: v_swmmac_i32_16x16x32_iu8 v[3:6], v0, v[1:2], v7 neg_lo:[0,1,0]132; GFX12-NEXT: global_store_b128 v[8:9], v[3:6], off133; GFX12-NEXT: s_endpgm134bb:135 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v4i32.i32.v2i32.i8(i1 0, i32 %A, i1 1, <2 x i32> %B, <4 x i32> %C, i8 %Index, i1 0)136 store <4 x i32> %res, ptr addrspace(1) %out137 ret void138}139 140define amdgpu_ps void @test_swmmac_i32_16x16x32_iu8_clamp(i32 %A, <2 x i32> %B, <4 x i32> %C, i8 %Index, ptr addrspace(1) %out) {141; GFX12-LABEL: test_swmmac_i32_16x16x32_iu8_clamp:142; GFX12: ; %bb.0: ; %bb143; GFX12-NEXT: v_swmmac_i32_16x16x32_iu8 v[3:6], v0, v[1:2], v7 clamp144; GFX12-NEXT: global_store_b128 v[8:9], v[3:6], off145; GFX12-NEXT: s_endpgm146bb:147 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v4i32.i32.v2i32.i8(i1 0, i32 %A, i1 0, <2 x i32> %B, <4 x i32> %C, i8 %Index, i1 1)148 store <4 x i32> %res, ptr addrspace(1) %out149 ret void150}151 152 153 154define amdgpu_ps void @test_swmmac_i32_16x16x32_iu4_zext_src0(i32 %A, i32 %B, <4 x i32> %C, i16 %Index, ptr addrspace(1) %out) {155; GFX12-LABEL: test_swmmac_i32_16x16x32_iu4_zext_src0:156; GFX12: ; %bb.0: ; %bb157; GFX12-NEXT: v_swmmac_i32_16x16x32_iu4 v[2:5], v0, v1, v6 neg_lo:[1,0,0]158; GFX12-NEXT: global_store_b128 v[7:8], v[2:5], off159; GFX12-NEXT: s_endpgm160bb:161 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v4i32.i32.i32.i16(i1 1, i32 %A, i1 0, i32 %B, <4 x i32> %C, i16 %Index, i1 0)162 store <4 x i32> %res, ptr addrspace(1) %out163 ret void164}165 166define amdgpu_ps void @test_swmmac_i32_16x16x32_iu4_zext_src1(i32 %A, i32 %B, <4 x i32> %C, i16 %Index, ptr addrspace(1) %out) {167; GFX12-LABEL: test_swmmac_i32_16x16x32_iu4_zext_src1:168; GFX12: ; %bb.0: ; %bb169; GFX12-NEXT: v_swmmac_i32_16x16x32_iu4 v[2:5], v0, v1, v6 neg_lo:[0,1,0]170; GFX12-NEXT: global_store_b128 v[7:8], v[2:5], off171; GFX12-NEXT: s_endpgm172bb:173 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v4i32.i32.i32.i16(i1 0, i32 %A, i1 1, i32 %B, <4 x i32> %C, i16 %Index, i1 0)174 store <4 x i32> %res, ptr addrspace(1) %out175 ret void176}177 178define amdgpu_ps void @test_swmmac_i32_16x16x32_iu4_clamp(i32 %A, i32 %B, <4 x i32> %C, i16 %Index, ptr addrspace(1) %out) {179; GFX12-LABEL: test_swmmac_i32_16x16x32_iu4_clamp:180; GFX12: ; %bb.0: ; %bb181; GFX12-NEXT: v_swmmac_i32_16x16x32_iu4 v[2:5], v0, v1, v6 clamp182; GFX12-NEXT: global_store_b128 v[7:8], v[2:5], off183; GFX12-NEXT: s_endpgm184bb:185 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v4i32.i32.i32.i16(i1 0, i32 %A, i1 0, i32 %B, <4 x i32> %C, i16 %Index, i1 1)186 store <4 x i32> %res, ptr addrspace(1) %out187 ret void188}189 190 191 192define amdgpu_ps void @test_swmmac_i32_16x16x64_iu4_zext_src0(i32 %A, <2 x i32> %B, <4 x i32> %C, i16 %Index, ptr addrspace(1) %out) {193; GFX12-LABEL: test_swmmac_i32_16x16x64_iu4_zext_src0:194; GFX12: ; %bb.0: ; %bb195; GFX12-NEXT: v_swmmac_i32_16x16x64_iu4 v[3:6], v0, v[1:2], v7 neg_lo:[1,0,0]196; GFX12-NEXT: global_store_b128 v[8:9], v[3:6], off197; GFX12-NEXT: s_endpgm198bb:199 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x64.iu4.v4i32.i32.v2i32.i16(i1 1, i32 %A, i1 0, <2 x i32> %B, <4 x i32> %C, i16 %Index, i1 0)200 store <4 x i32> %res, ptr addrspace(1) %out201 ret void202}203 204define amdgpu_ps void @test_swmmac_i32_16x16x64_iu4_zext_src1(i32 %A, <2 x i32> %B, <4 x i32> %C, i16 %Index, ptr addrspace(1) %out) {205; GFX12-LABEL: test_swmmac_i32_16x16x64_iu4_zext_src1:206; GFX12: ; %bb.0: ; %bb207; GFX12-NEXT: v_swmmac_i32_16x16x64_iu4 v[3:6], v0, v[1:2], v7 neg_lo:[0,1,0]208; GFX12-NEXT: global_store_b128 v[8:9], v[3:6], off209; GFX12-NEXT: s_endpgm210bb:211 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x64.iu4.v4i32.i32.v2i32.i16(i1 0, i32 %A, i1 1, <2 x i32> %B, <4 x i32> %C, i16 %Index, i1 0)212 store <4 x i32> %res, ptr addrspace(1) %out213 ret void214}215 216define amdgpu_ps void @test_swmmac_i32_16x16x64_iu4_clamp(i32 %A, <2 x i32> %B, <4 x i32> %C, i16 %Index, ptr addrspace(1) %out) {217; GFX12-LABEL: test_swmmac_i32_16x16x64_iu4_clamp:218; GFX12: ; %bb.0: ; %bb219; GFX12-NEXT: v_swmmac_i32_16x16x64_iu4 v[3:6], v0, v[1:2], v7 clamp220; GFX12-NEXT: global_store_b128 v[8:9], v[3:6], off221; GFX12-NEXT: s_endpgm222bb:223 %res = call <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x64.iu4.v4i32.i32.v2i32.i16(i1 0, i32 %A, i1 0, <2 x i32> %B, <4 x i32> %C, i16 %Index, i1 1)224 store <4 x i32> %res, ptr addrspace(1) %out225 ret void226}227 228declare <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v4i32.i32(i1 immarg, i32, i1 immarg, i32, <4 x i32>, i1 immarg)229declare <4 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v4i32.i32(i1 immarg, i32, i1 immarg, i32, <4 x i32>, i1 immarg)230declare <4 x i32> @llvm.amdgcn.wmma.i32.16x16x32.iu4.v4i32.i32(i1 immarg, i32, i1 immarg, i32, <4 x i32>, i1 immarg)231declare <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu8.v4i32.i32.v2i32.i8(i1 immarg, i32, i1 immarg, <2 x i32>, <4 x i32>, i8 %Index, i1 immarg)232declare <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x32.iu4.v4i32.i32.i32.i16(i1 immarg, i32, i1 immarg, i32, <4 x i32>, i16 %Index, i1 immarg)233declare <4 x i32> @llvm.amdgcn.swmmac.i32.16x16x64.iu4.v4i32.i32.v2i32.i16(i1 immarg, i32, i1 immarg, <2 x i32>, <4 x i32>, i16 %Index, i1 immarg)234