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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 < %s | FileCheck %s --check-prefix=W323 4declare <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16.v8f32.v16f16(<16 x half>, <16 x half> , <8 x float>)5declare <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16.v8f32.v16i16(<16 x i16>, <16 x i16> , <8 x float>)6declare <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v16f16.v16f16(<16 x half>, <16 x half> , <16 x half>, i1 immarg)7declare <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v16i16.v16i16(<16 x i16>, <16 x i16> , <16 x i16>, i1 immarg)8declare <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 immarg, <4 x i32>, i1 immarg, <4 x i32> , <8 x i32>, i1 immarg)9declare <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 immarg, <2 x i32>, i1 immarg, <2 x i32> , <8 x i32>, i1 immarg)10 11; The tests demonstrate that the following WMMA register constraints are satisfied.12;13; v_wmma D, A, B, C14; A and B cannot overlap with D. C cannot partially overlap with D, but it is OK for them to be the same (which is a typical case).15;16; In each test,17; - first wmma instruction: the dest register D is different than all the sources18; - second wmma instruction: the dest register D and src2 (C) are the same19 20 21; @llvm.amdgcn.wmma.f32.16x16x16.f1622 23define amdgpu_ps void @test_wmma_f32_16x16x16_f16(<16 x half> %A, <16 x half> %B, <8 x float> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {24; W32-LABEL: test_wmma_f32_16x16x16_f16:25; W32: ; %bb.0: ; %bb26; W32-NEXT: v_wmma_f32_16x16x16_f16 v[28:35], v[0:7], v[8:15], v[16:23]27; W32-NEXT: v_wmma_f32_16x16x16_f16 v[16:23], v[8:15], v[8:15], v[16:23]28; W32-NEXT: s_clause 0x129; W32-NEXT: global_store_b128 v[24:25], v[32:35], off offset:1630; W32-NEXT: global_store_b128 v[24:25], v[28:31], off31; W32-NEXT: s_clause 0x132; W32-NEXT: global_store_b128 v[26:27], v[20:23], off offset:1633; W32-NEXT: global_store_b128 v[26:27], v[16:19], off34; W32-NEXT: s_endpgm35bb:36 %res = call <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16.v8f32.v16f16(<16 x half> %A, <16 x half> %B, <8 x float> %C)37 %res2 = call <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.f16.v8f32.v16f16(<16 x half> %B, <16 x half> %B, <8 x float> %C)38 store <8 x float> %res, ptr addrspace(1) %out, align 3239 store <8 x float> %res2, ptr addrspace(1) %out2, align 3240 ret void41}42 43; @llvm.amdgcn.wmma.f32.16x16x16.bf1644 45define amdgpu_ps void @test_wmma_f32_16x16x16_bf16(<16 x i16> %A, <16 x i16> %B, <8 x float> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {46; W32-LABEL: test_wmma_f32_16x16x16_bf16:47; W32: ; %bb.0: ; %bb48; W32-NEXT: v_wmma_f32_16x16x16_bf16 v[28:35], v[0:7], v[8:15], v[16:23]49; W32-NEXT: v_wmma_f32_16x16x16_bf16 v[16:23], v[8:15], v[8:15], v[16:23]50; W32-NEXT: s_clause 0x151; W32-NEXT: global_store_b128 v[24:25], v[32:35], off offset:1652; W32-NEXT: global_store_b128 v[24:25], v[28:31], off53; W32-NEXT: s_clause 0x154; W32-NEXT: global_store_b128 v[26:27], v[20:23], off offset:1655; W32-NEXT: global_store_b128 v[26:27], v[16:19], off56; W32-NEXT: s_endpgm57bb:58 %res = call <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16.v8f32.v16i16(<16 x i16> %A, <16 x i16> %B, <8 x float> %C)59 %res2 = call <8 x float> @llvm.amdgcn.wmma.f32.16x16x16.bf16.v8f32.v16i16(<16 x i16> %B, <16 x i16> %B, <8 x float> %C)60 store <8 x float> %res, ptr addrspace(1) %out, align 3261 store <8 x float> %res2, ptr addrspace(1) %out2, align 3262 ret void63}64 65; @llvm.amdgcn.wmma.f16.16x16x16.f1666 67define amdgpu_ps void @test_wmma_f16_16x16x16_f16_lo(<16 x half> %A, <16 x half> %B, <16 x half> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {68; W32-LABEL: test_wmma_f16_16x16x16_f16_lo:69; W32: ; %bb.0: ; %bb70; W32-NEXT: v_wmma_f16_16x16x16_f16 v[28:35], v[0:7], v[8:15], v[16:23]71; W32-NEXT: v_wmma_f16_16x16x16_f16 v[16:23], v[8:15], v[8:15], v[16:23]72; W32-NEXT: s_clause 0x173; W32-NEXT: global_store_b128 v[24:25], v[32:35], off offset:1674; W32-NEXT: global_store_b128 v[24:25], v[28:31], off75; W32-NEXT: s_clause 0x176; W32-NEXT: global_store_b128 v[26:27], v[20:23], off offset:1677; W32-NEXT: global_store_b128 v[26:27], v[16:19], off78; W32-NEXT: s_endpgm79bb:80 %res = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v16f16.v16f16(<16 x half> %A, <16 x half> %B, <16 x half> %C, i1 0)81 %res2 = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v16f16.v16f16(<16 x half> %B, <16 x half> %B, <16 x half> %C, i1 0)82 store <16 x half> %res, ptr addrspace(1) %out, align 3283 store <16 x half> %res2, ptr addrspace(1) %out2, align 3284 ret void85}86 87define amdgpu_ps void @test_wmma_f16_16x16x16_f16_hi(<16 x half> %A, <16 x half> %B, <16 x half> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {88; W32-LABEL: test_wmma_f16_16x16x16_f16_hi:89; W32: ; %bb.0: ; %bb90; W32-NEXT: v_wmma_f16_16x16x16_f16 v[28:35], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1]91; W32-NEXT: v_wmma_f16_16x16x16_f16 v[16:23], v[8:15], v[8:15], v[16:23] op_sel:[0,0,1]92; W32-NEXT: s_clause 0x193; W32-NEXT: global_store_b128 v[24:25], v[32:35], off offset:1694; W32-NEXT: global_store_b128 v[24:25], v[28:31], off95; W32-NEXT: s_clause 0x196; W32-NEXT: global_store_b128 v[26:27], v[20:23], off offset:1697; W32-NEXT: global_store_b128 v[26:27], v[16:19], off98; W32-NEXT: s_endpgm99bb:100 %res = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v16f16.v16f16(<16 x half> %A, <16 x half> %B, <16 x half> %C, i1 1)101 %res2 = call <16 x half> @llvm.amdgcn.wmma.f16.16x16x16.f16.v16f16.v16f16(<16 x half> %B, <16 x half> %B, <16 x half> %C, i1 1)102 store <16 x half> %res, ptr addrspace(1) %out, align 32103 store <16 x half> %res2, ptr addrspace(1) %out2, align 32104 ret void105}106 107; @llvm.amdgcn.wmma.bf16.16x16x16.bf16108 109define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_lo(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {110; W32-LABEL: test_wmma_bf16_16x16x16_bf16_lo:111; W32: ; %bb.0: ; %bb112; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[28:35], v[0:7], v[8:15], v[16:23]113; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[16:23], v[8:15], v[8:15], v[16:23]114; W32-NEXT: s_clause 0x1115; W32-NEXT: global_store_b128 v[24:25], v[32:35], off offset:16116; W32-NEXT: global_store_b128 v[24:25], v[28:31], off117; W32-NEXT: s_clause 0x1118; W32-NEXT: global_store_b128 v[26:27], v[20:23], off offset:16119; W32-NEXT: global_store_b128 v[26:27], v[16:19], off120; W32-NEXT: s_endpgm121bb:122 %res = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v16i16.v16i16(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, i1 0)123 %res2 = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v16i16.v16i16(<16 x i16> %B, <16 x i16> %B, <16 x i16> %C, i1 0)124 store <16 x i16> %res, ptr addrspace(1) %out, align 32125 store <16 x i16> %res2, ptr addrspace(1) %out2, align 32126 ret void127}128 129define amdgpu_ps void @test_wmma_bf16_16x16x16_bf16_hi(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {130; W32-LABEL: test_wmma_bf16_16x16x16_bf16_hi:131; W32: ; %bb.0: ; %bb132; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[28:35], v[0:7], v[8:15], v[16:23] op_sel:[0,0,1]133; W32-NEXT: v_wmma_bf16_16x16x16_bf16 v[16:23], v[8:15], v[8:15], v[16:23] op_sel:[0,0,1]134; W32-NEXT: s_clause 0x1135; W32-NEXT: global_store_b128 v[24:25], v[32:35], off offset:16136; W32-NEXT: global_store_b128 v[24:25], v[28:31], off137; W32-NEXT: s_clause 0x1138; W32-NEXT: global_store_b128 v[26:27], v[20:23], off offset:16139; W32-NEXT: global_store_b128 v[26:27], v[16:19], off140; W32-NEXT: s_endpgm141bb:142 %res = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v16i16.v16i16(<16 x i16> %A, <16 x i16> %B, <16 x i16> %C, i1 1)143 %res2 = call <16 x i16> @llvm.amdgcn.wmma.bf16.16x16x16.bf16.v16i16.v16i16(<16 x i16> %B, <16 x i16> %B, <16 x i16> %C, i1 1)144 store <16 x i16> %res, ptr addrspace(1) %out, align 32145 store <16 x i16> %res2, ptr addrspace(1) %out2, align 32146 ret void147}148 149; @llvm.amdgcn.wmma.i32.16x16x16.iu8150 151define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_unsigned(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {152; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_unsigned:153; W32: ; %bb.0: ; %bb154; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15]155; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15]156; W32-NEXT: s_clause 0x1157; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16158; W32-NEXT: global_store_b128 v[16:17], v[20:23], off159; W32-NEXT: s_clause 0x1160; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16161; W32-NEXT: global_store_b128 v[18:19], v[8:11], off162; W32-NEXT: s_endpgm163bb:164 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 0)165 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %B, i1 0, <4 x i32> %B, <8 x i32> %C, i1 0)166 store <8 x i32> %res, ptr addrspace(1) %out, align 32167 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32168 ret void169}170 171define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_signed(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {172; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_signed:173; W32: ; %bb.0: ; %bb174; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] neg_lo:[0,1,0]175; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] neg_lo:[0,1,0]176; W32-NEXT: s_clause 0x1177; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16178; W32-NEXT: global_store_b128 v[16:17], v[20:23], off179; W32-NEXT: s_clause 0x1180; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16181; W32-NEXT: global_store_b128 v[18:19], v[8:11], off182; W32-NEXT: s_endpgm183bb:184 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 0)185 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %B, i1 1, <4 x i32> %B, <8 x i32> %C, i1 0)186 store <8 x i32> %res, ptr addrspace(1) %out, align 32187 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32188 ret void189}190 191define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_unsigned(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {192; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_unsigned:193; W32: ; %bb.0: ; %bb194; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] neg_lo:[1,0,0]195; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] neg_lo:[1,0,0]196; W32-NEXT: s_clause 0x1197; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16198; W32-NEXT: global_store_b128 v[16:17], v[20:23], off199; W32-NEXT: s_clause 0x1200; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16201; W32-NEXT: global_store_b128 v[18:19], v[8:11], off202; W32-NEXT: s_endpgm203bb:204 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 0)205 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %B, i1 0, <4 x i32> %B, <8 x i32> %C, i1 0)206 store <8 x i32> %res, ptr addrspace(1) %out, align 32207 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32208 ret void209}210 211define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_signed(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {212; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_signed:213; W32: ; %bb.0: ; %bb214; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] neg_lo:[1,1,0]215; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] neg_lo:[1,1,0]216; W32-NEXT: s_clause 0x1217; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16218; W32-NEXT: global_store_b128 v[16:17], v[20:23], off219; W32-NEXT: s_clause 0x1220; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16221; W32-NEXT: global_store_b128 v[18:19], v[8:11], off222; W32-NEXT: s_endpgm223bb:224 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 0)225 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %B, i1 1, <4 x i32> %B, <8 x i32> %C, i1 0)226 store <8 x i32> %res, ptr addrspace(1) %out, align 32227 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32228 ret void229}230 231define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_unsigned_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {232; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_unsigned_clamp:233; W32: ; %bb.0: ; %bb234; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] clamp235; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] clamp236; W32-NEXT: s_clause 0x1237; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16238; W32-NEXT: global_store_b128 v[16:17], v[20:23], off239; W32-NEXT: s_clause 0x1240; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16241; W32-NEXT: global_store_b128 v[18:19], v[8:11], off242; W32-NEXT: s_endpgm243bb:244 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 1)245 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %B, i1 0, <4 x i32> %B, <8 x i32> %C, i1 1)246 store <8 x i32> %res, ptr addrspace(1) %out, align 32247 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32248 ret void249}250 251define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_unsigned_signed_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {252; W32-LABEL: test_wmma_i32_16x16x16_ui8_unsigned_signed_clamp:253; W32: ; %bb.0: ; %bb254; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] neg_lo:[0,1,0] clamp255; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] neg_lo:[0,1,0] clamp256; W32-NEXT: s_clause 0x1257; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16258; W32-NEXT: global_store_b128 v[16:17], v[20:23], off259; W32-NEXT: s_clause 0x1260; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16261; W32-NEXT: global_store_b128 v[18:19], v[8:11], off262; W32-NEXT: s_endpgm263bb:264 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 1)265 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 0, <4 x i32> %B, i1 1, <4 x i32> %B, <8 x i32> %C, i1 1)266 store <8 x i32> %res, ptr addrspace(1) %out, align 32267 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32268 ret void269}270 271define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_unsigned_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {272; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_unsigned_clamp:273; W32: ; %bb.0: ; %bb274; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] neg_lo:[1,0,0] clamp275; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] neg_lo:[1,0,0] clamp276; W32-NEXT: s_clause 0x1277; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16278; W32-NEXT: global_store_b128 v[16:17], v[20:23], off279; W32-NEXT: s_clause 0x1280; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16281; W32-NEXT: global_store_b128 v[18:19], v[8:11], off282; W32-NEXT: s_endpgm283bb:284 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %A, i1 0, <4 x i32> %B, <8 x i32> %C, i1 1)285 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %B, i1 0, <4 x i32> %B, <8 x i32> %C, i1 1)286 store <8 x i32> %res, ptr addrspace(1) %out, align 32287 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32288 ret void289}290 291define amdgpu_ps void @test_wmma_i32_16x16x16_ui8_signed_signed_clamp(<4 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {292; W32-LABEL: test_wmma_i32_16x16x16_ui8_signed_signed_clamp:293; W32: ; %bb.0: ; %bb294; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[20:27], v[0:3], v[4:7], v[8:15] neg_lo:[1,1,0] clamp295; W32-NEXT: v_wmma_i32_16x16x16_iu8 v[8:15], v[4:7], v[4:7], v[8:15] neg_lo:[1,1,0] clamp296; W32-NEXT: s_clause 0x1297; W32-NEXT: global_store_b128 v[16:17], v[24:27], off offset:16298; W32-NEXT: global_store_b128 v[16:17], v[20:23], off299; W32-NEXT: s_clause 0x1300; W32-NEXT: global_store_b128 v[18:19], v[12:15], off offset:16301; W32-NEXT: global_store_b128 v[18:19], v[8:11], off302; W32-NEXT: s_endpgm303bb:304 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %A, i1 1, <4 x i32> %B, <8 x i32> %C, i1 1)305 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu8.v8i32.v4i32(i1 1, <4 x i32> %B, i1 1, <4 x i32> %B, <8 x i32> %C, i1 1)306 store <8 x i32> %res, ptr addrspace(1) %out, align 32307 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32308 ret void309}310 311; @llvm.amdgcn.wmma.i32.16x16x16.iu4312 313define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_unsigned(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {314; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_unsigned:315; W32: ; %bb.0: ; %bb316; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11]317; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11]318; W32-NEXT: s_clause 0x1319; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16320; W32-NEXT: global_store_b128 v[12:13], v[16:19], off321; W32-NEXT: s_clause 0x1322; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16323; W32-NEXT: global_store_b128 v[14:15], v[4:7], off324; W32-NEXT: s_endpgm325bb:326 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 0)327 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %B, i1 0, <2 x i32> %B, <8 x i32> %C, i1 0)328 store <8 x i32> %res, ptr addrspace(1) %out, align 32329 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32330 ret void331}332 333define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_signed(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {334; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_signed:335; W32: ; %bb.0: ; %bb336; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] neg_lo:[0,1,0]337; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] neg_lo:[0,1,0]338; W32-NEXT: s_clause 0x1339; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16340; W32-NEXT: global_store_b128 v[12:13], v[16:19], off341; W32-NEXT: s_clause 0x1342; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16343; W32-NEXT: global_store_b128 v[14:15], v[4:7], off344; W32-NEXT: s_endpgm345bb:346 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 0)347 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %B, i1 1, <2 x i32> %B, <8 x i32> %C, i1 0)348 store <8 x i32> %res, ptr addrspace(1) %out, align 32349 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32350 ret void351}352 353define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_unsigned(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {354; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_unsigned:355; W32: ; %bb.0: ; %bb356; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] neg_lo:[1,0,0]357; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] neg_lo:[1,0,0]358; W32-NEXT: s_clause 0x1359; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16360; W32-NEXT: global_store_b128 v[12:13], v[16:19], off361; W32-NEXT: s_clause 0x1362; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16363; W32-NEXT: global_store_b128 v[14:15], v[4:7], off364; W32-NEXT: s_endpgm365bb:366 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 0)367 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %B, i1 0, <2 x i32> %B, <8 x i32> %C, i1 0)368 store <8 x i32> %res, ptr addrspace(1) %out, align 32369 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32370 ret void371}372 373define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_signed(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {374; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_signed:375; W32: ; %bb.0: ; %bb376; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] neg_lo:[1,1,0]377; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] neg_lo:[1,1,0]378; W32-NEXT: s_clause 0x1379; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16380; W32-NEXT: global_store_b128 v[12:13], v[16:19], off381; W32-NEXT: s_clause 0x1382; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16383; W32-NEXT: global_store_b128 v[14:15], v[4:7], off384; W32-NEXT: s_endpgm385bb:386 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 0)387 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %B, i1 1, <2 x i32> %B, <8 x i32> %C, i1 0)388 store <8 x i32> %res, ptr addrspace(1) %out, align 32389 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32390 ret void391}392 393 394define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_unsigned_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {395; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_unsigned_clamp:396; W32: ; %bb.0: ; %bb397; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] clamp398; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] clamp399; W32-NEXT: s_clause 0x1400; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16401; W32-NEXT: global_store_b128 v[12:13], v[16:19], off402; W32-NEXT: s_clause 0x1403; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16404; W32-NEXT: global_store_b128 v[14:15], v[4:7], off405; W32-NEXT: s_endpgm406bb:407 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 1)408 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %B, i1 0, <2 x i32> %B, <8 x i32> %C, i1 1)409 store <8 x i32> %res, ptr addrspace(1) %out, align 32410 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32411 ret void412}413 414define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_unsigned_signed_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {415; W32-LABEL: test_wmma_i32_16x16x16_ui4_unsigned_signed_clamp:416; W32: ; %bb.0: ; %bb417; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] neg_lo:[0,1,0] clamp418; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] neg_lo:[0,1,0] clamp419; W32-NEXT: s_clause 0x1420; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16421; W32-NEXT: global_store_b128 v[12:13], v[16:19], off422; W32-NEXT: s_clause 0x1423; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16424; W32-NEXT: global_store_b128 v[14:15], v[4:7], off425; W32-NEXT: s_endpgm426bb:427 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 1)428 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 0, <2 x i32> %B, i1 1, <2 x i32> %B, <8 x i32> %C, i1 1)429 store <8 x i32> %res, ptr addrspace(1) %out, align 32430 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32431 ret void432}433 434define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_unsigned_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {435; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_unsigned_clamp:436; W32: ; %bb.0: ; %bb437; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] neg_lo:[1,0,0] clamp438; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] neg_lo:[1,0,0] clamp439; W32-NEXT: s_clause 0x1440; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16441; W32-NEXT: global_store_b128 v[12:13], v[16:19], off442; W32-NEXT: s_clause 0x1443; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16444; W32-NEXT: global_store_b128 v[14:15], v[4:7], off445; W32-NEXT: s_endpgm446bb:447 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %A, i1 0, <2 x i32> %B, <8 x i32> %C, i1 1)448 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %B, i1 0, <2 x i32> %B, <8 x i32> %C, i1 1)449 store <8 x i32> %res, ptr addrspace(1) %out, align 32450 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32451 ret void452}453 454define amdgpu_ps void @test_wmma_i32_16x16x16_ui4_signed_signed_clamp(<2 x i32> %A, <2 x i32> %B, <8 x i32> %C, ptr addrspace(1) %out, ptr addrspace(1) %out2) {455; W32-LABEL: test_wmma_i32_16x16x16_ui4_signed_signed_clamp:456; W32: ; %bb.0: ; %bb457; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[16:23], v[0:1], v[2:3], v[4:11] neg_lo:[1,1,0] clamp458; W32-NEXT: v_wmma_i32_16x16x16_iu4 v[4:11], v[2:3], v[2:3], v[4:11] neg_lo:[1,1,0] clamp459; W32-NEXT: s_clause 0x1460; W32-NEXT: global_store_b128 v[12:13], v[20:23], off offset:16461; W32-NEXT: global_store_b128 v[12:13], v[16:19], off462; W32-NEXT: s_clause 0x1463; W32-NEXT: global_store_b128 v[14:15], v[8:11], off offset:16464; W32-NEXT: global_store_b128 v[14:15], v[4:7], off465; W32-NEXT: s_endpgm466bb:467 %res = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %A, i1 1, <2 x i32> %B, <8 x i32> %C, i1 1)468 %res2 = call <8 x i32> @llvm.amdgcn.wmma.i32.16x16x16.iu4.v8i32.v2i32(i1 1, <2 x i32> %B, i1 1, <2 x i32> %B, <8 x i32> %C, i1 1)469 store <8 x i32> %res, ptr addrspace(1) %out, align 32470 store <8 x i32> %res2, ptr addrspace(1) %out2, align 32471 ret void472}473 474