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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=CHECK %s3 4; Test that s_wqm is executed before lds.param.load.5define amdgpu_ps <3 x float> @test_param_load(i32 inreg %attr, <3 x float> %to_add) {6; CHECK-LABEL: test_param_load:7; CHECK: ; %bb.0: ; %main_body8; CHECK-NEXT: s_mov_b32 m0, s09; CHECK-NEXT: s_mov_b32 s0, exec_lo10; CHECK-NEXT: s_wqm_b32 exec_lo, exec_lo11; CHECK-NEXT: lds_param_load v3, attr0.x wait_vdst:1512; CHECK-NEXT: lds_param_load v4, attr0.y wait_vdst:1513; CHECK-NEXT: lds_param_load v5, attr0.z wait_vdst:1514; CHECK-NEXT: s_mov_b32 exec_lo, s015; CHECK-NEXT: s_waitcnt expcnt(1)16; CHECK-NEXT: v_dual_add_f32 v0, v3, v0 :: v_dual_add_f32 v1, v4, v117; CHECK-NEXT: s_waitcnt expcnt(0)18; CHECK-NEXT: v_add_f32_e32 v2, v5, v219; CHECK-NEXT: ; return to shader part epilog20main_body:21 %a = call float @llvm.amdgcn.lds.param.load(i32 0, i32 0, i32 %attr) #122 %b = call float @llvm.amdgcn.lds.param.load(i32 1, i32 0, i32 %attr) #123 %c = call float @llvm.amdgcn.lds.param.load(i32 2, i32 0, i32 %attr) #124 %tmp_0 = insertelement <3 x float> poison, float %a, i32 025 %tmp_1 = insertelement <3 x float> %tmp_0, float %b, i32 126 %tmp_2 = insertelement <3 x float> %tmp_1, float %c, i32 227 %res = fadd <3 x float> %tmp_2, %to_add28 ret <3 x float> %res29}30 31; Test that s_wqm is executed before lds.direct.load.32define amdgpu_ps <3 x float> @test_direct_load(i32 inreg %arg_0, i32 inreg %arg_1, i32 inreg %arg_2, <3 x float> %to_add) {33; CHECK-LABEL: test_direct_load:34; CHECK: ; %bb.0: ; %main_body35; CHECK-NEXT: s_mov_b32 m0, s036; CHECK-NEXT: s_mov_b32 s0, exec_lo37; CHECK-NEXT: s_wqm_b32 exec_lo, exec_lo38; CHECK-NEXT: lds_direct_load v3 wait_vdst:1539; CHECK-NEXT: s_mov_b32 m0, s140; CHECK-NEXT: lds_direct_load v4 wait_vdst:1541; CHECK-NEXT: s_mov_b32 m0, s242; CHECK-NEXT: lds_direct_load v5 wait_vdst:1543; CHECK-NEXT: s_mov_b32 exec_lo, s044; CHECK-NEXT: s_waitcnt expcnt(1)45; CHECK-NEXT: v_dual_add_f32 v0, v3, v0 :: v_dual_add_f32 v1, v4, v146; CHECK-NEXT: s_waitcnt expcnt(0)47; CHECK-NEXT: v_add_f32_e32 v2, v5, v248; CHECK-NEXT: ; return to shader part epilog49main_body:50 %a = call float @llvm.amdgcn.lds.direct.load(i32 %arg_0) #151 %b = call float @llvm.amdgcn.lds.direct.load(i32 %arg_1) #152 %c = call float @llvm.amdgcn.lds.direct.load(i32 %arg_2) #153 %tmp_0 = insertelement <3 x float> poison, float %a, i32 054 %tmp_1 = insertelement <3 x float> %tmp_0, float %b, i32 155 %tmp_2 = insertelement <3 x float> %tmp_1, float %c, i32 256 %res = fadd <3 x float> %tmp_2, %to_add57 ret <3 x float> %res58}59 60attributes #1 = { nounwind readnone speculatable willreturn }61declare float @llvm.amdgcn.lds.param.load(i32 immarg, i32 immarg, i32) #162declare float @llvm.amdgcn.lds.direct.load(i32) #163