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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefix=GCN %s3 4; This test used to crash5define amdgpu_ps float @xor3_i1_const(float inreg %arg1, i32 inreg %arg2) {6; GCN-LABEL: xor3_i1_const:7; GCN:       ; %bb.0: ; %main_body8; GCN-NEXT:    v_cmp_lt_f32_e64 s[0:1], s0, 09; GCN-NEXT:    v_cndmask_b32_e64 v0, 1.0, 0, s[0:1]10; GCN-NEXT:    ; return to shader part epilog11main_body:12  %tmp26 = fcmp nsz olt float %arg1, 0.000000e+0013  %tmp28 = call nsz float @llvm.amdgcn.interp.p2(float poison, float poison, i32 0, i32 0, i32 %arg2)14  %tmp29 = fcmp nsz olt float %arg1, 5.700000e+0115  %tmp31 = fcmp nsz olt float %tmp28, 0.000000e+0016  %.demorgan = and i1 %tmp26, %tmp2917  %tmp34 = xor i1 %.demorgan, true18  %tmp35 = and i1 %tmp31, %tmp3419  %tmp36 = xor i1 %tmp35, true20  %tmp37 = xor i1 %.demorgan, %tmp3621  %tmp42 = or i1 %tmp37, %tmp3522  %tmp43 = select i1 %tmp42, float 1.000000e+00, float 0.000000e+0023  ret float %tmp4324}25 26declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32)27