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1; RUN: llc -mtriple=arc < %s | FileCheck %s2 3; CHECK-LABEL: load324; CHECK: ld %r0, [%r0,16000]5 6define i32 @load32(ptr %bp) nounwind {7entry:8 %gep = getelementptr i32, ptr %bp, i32 40009 %v = load i32, ptr %gep, align 410 ret i32 %v11}12 13; CHECK-LABEL: load1614; CHECK: ldh %r0, [%r0,8000]15 16define i16 @load16(ptr %bp) nounwind {17entry:18 %gep = getelementptr i16, ptr %bp, i32 400019 %v = load i16, ptr %gep, align 220 ret i16 %v21}22 23; CHECK-LABEL: load824; CHECK: ldb %r0, [%r0,4000]25 26define i8 @load8(ptr %bp) nounwind {27entry:28 %gep = getelementptr i8, ptr %bp, i32 400029 %v = load i8, ptr %gep, align 130 ret i8 %v31}32 33; CHECK-LABEL: sextload1634; CHECK: ldh.x %r0, [%r0,8000]35 36define i32 @sextload16(ptr %bp) nounwind {37entry:38 %gep = getelementptr i16, ptr %bp, i32 400039 %vl = load i16, ptr %gep, align 240 %v = sext i16 %vl to i3241 ret i32 %v42}43 44; CHECK-LABEL: sextload845; CHECK: ldb.x %r0, [%r0,4000]46 47define i32 @sextload8(ptr %bp) nounwind {48entry:49 %gep = getelementptr i8, ptr %bp, i32 400050 %vl = load i8, ptr %gep, align 151 %v = sext i8 %vl to i3252 ret i32 %v53}54 55; CHECK-LABEL: s_sextload1656; CHECK: ldh.x %r0, [%r0,32]57 58define i32 @s_sextload16(ptr %bp) nounwind {59entry:60 %gep = getelementptr i16, ptr %bp, i32 1661 %vl = load i16, ptr %gep, align 262 %v = sext i16 %vl to i3263 ret i32 %v64}65 66; CHECK-LABEL: s_sextload867; CHECK: ldb.x %r0, [%r0,16]68 69define i32 @s_sextload8(ptr %bp) nounwind {70entry:71 %gep = getelementptr i8, ptr %bp, i32 1672 %vl = load i8, ptr %gep, align 173 %v = sext i8 %vl to i3274 ret i32 %v75}76 77; CHECK-LABEL: store3278; CHECK: add %r[[REG:[0-9]+]], %r1, 1600079; CHECK: st %r0, [%r[[REG]],0]80 81; Long range stores (offset does not fit in s9) must be add followed by st.82define void @store32(i32 %val, ptr %bp) nounwind {83entry:84 %gep = getelementptr i32, ptr %bp, i32 400085 store i32 %val, ptr %gep, align 486 ret void87}88 89; CHECK-LABEL: store1690; CHECK: add %r[[REG:[0-9]+]], %r1, 800091; CHECK: sth %r0, [%r[[REG]],0]92 93define void @store16(i16 zeroext %val, ptr %bp) nounwind {94entry:95 %gep = getelementptr i16, ptr %bp, i32 400096 store i16 %val, ptr %gep, align 297 ret void98}99 100; CHECK-LABEL: store8101; CHECK: add %r[[REG:[0-9]+]], %r1, 4000102; CHECK: stb %r0, [%r[[REG]],0]103 104define void @store8(i8 zeroext %val, ptr %bp) nounwind {105entry:106 %gep = getelementptr i8, ptr %bp, i32 4000107 store i8 %val, ptr %gep, align 1108 ret void109}110 111; Short range stores can be done with [reg, s9].112; CHECK-LABEL: s_store32113; CHECK-NOT: add114; CHECK: st %r0, [%r1,64]115define void @s_store32(i32 %val, ptr %bp) nounwind {116entry:117 %gep = getelementptr i32, ptr %bp, i32 16118 store i32 %val, ptr %gep, align 4119 ret void120}121 122; CHECK-LABEL: s_store16123; CHECK-NOT: add124; CHECK: sth %r0, [%r1,32]125define void @s_store16(i16 zeroext %val, ptr %bp) nounwind {126entry:127 %gep = getelementptr i16, ptr %bp, i32 16128 store i16 %val, ptr %gep, align 2129 ret void130}131 132; CHECK-LABEL: s_store8133; CHECK-NOT: add134; CHECK: stb %r0, [%r1,16]135define void @s_store8(i8 zeroext %val, ptr %bp) nounwind {136entry:137 %gep = getelementptr i8, ptr %bp, i32 16138 store i8 %val, ptr %gep, align 1139 ret void140}141 142 143@aaaa = internal global [128 x i32] zeroinitializer144@bbbb = internal global [128 x i16] zeroinitializer145@cccc = internal global [128 x i8] zeroinitializer146 147; CHECK-LABEL: g_store32148; CHECK-NOT: add149; CHECK: st %r0, [@aaaa+64]150define void @g_store32(i32 %val) nounwind {151entry:152 store i32 %val, ptr getelementptr inbounds ([128 x i32], ptr @aaaa, i32 0, i32 16), align 4153 ret void154}155 156; CHECK-LABEL: g_load32157; CHECK-NOT: add158; CHECK: ld %r0, [@aaaa+64]159define i32 @g_load32() nounwind {160 %gep = getelementptr inbounds [128 x i32], ptr @aaaa, i32 0, i32 16161 %v = load i32, ptr %gep, align 4162 ret i32 %v163}164 165; CHECK-LABEL: g_store16166; CHECK-NOT: add167; CHECK: sth %r0, [@bbbb+32]168define void @g_store16(i16 %val) nounwind {169entry:170 store i16 %val, ptr getelementptr inbounds ([128 x i16], ptr @bbbb, i16 0, i16 16), align 2171 ret void172}173 174; CHECK-LABEL: g_load16175; CHECK-NOT: add176; CHECK: ldh %r0, [@bbbb+32]177define i16 @g_load16() nounwind {178 %gep = getelementptr inbounds [128 x i16], ptr @bbbb, i16 0, i16 16179 %v = load i16, ptr %gep, align 2180 ret i16 %v181}182 183; CHECK-LABEL: g_store8184; CHECK-NOT: add185; CHECK: stb %r0, [@cccc+16]186define void @g_store8(i8 %val) nounwind {187entry:188 store i8 %val, ptr getelementptr inbounds ([128 x i8], ptr @cccc, i8 0, i8 16), align 1189 ret void190}191 192; CHECK-LABEL: g_load8193; CHECK-NOT: add194; CHECK: ldb %r0, [@cccc+16]195define i8 @g_load8() nounwind {196 %gep = getelementptr inbounds [128 x i8], ptr @cccc, i8 0, i8 16197 %v = load i8, ptr %gep, align 1198 ret i8 %v199}200 201; CHECK-LABEL: align2_load32202; CHECK-DAG: ldh %r[[REG0:[0-9]+]], [%r0,0]203; CHECK-DAG: ldh %r[[REG1:[0-9]+]], [%r0,2]204; CHECK-DAG: asl %r[[REG2:[0-9]+]], %r[[REG1]], 16205define i32 @align2_load32(ptr %p) nounwind {206entry:207 %bp = bitcast ptr %p to ptr208 %v = load i32, ptr %bp, align 2209 ret i32 %v210}211 212; CHECK-LABEL: align1_load32213; CHECK-DAG: ldb %r[[REG0:[0-9]+]], [%r0,0]214; CHECK-DAG: ldb %r[[REG1:[0-9]+]], [%r0,1]215; CHECK-DAG: ldb %r[[REG2:[0-9]+]], [%r0,2]216; CHECK-DAG: ldb %r[[REG3:[0-9]+]], [%r0,3]217; CHECK-DAG: asl %r[[AREG1:[0-9]+]], %r[[REG1]], 8218; CHECK-DAG: asl %r[[AREG2:[0-9]+]], %r[[REG2]], 16219; CHECK-DAG: asl %r[[AREG3:[0-9]+]], %r[[REG3]], 24220; CHECK-DAG: or %r[[AREG01:[0-9]+]], %r[[AREG1]], %r[[REG0]]221; CHECK-DAG: or %r[[AREG23:[0-9]+]], %r[[AREG3]], %r[[AREG2]]222; CHECK-DAG: or %r0, %r[[AREG23]], %r[[AREG01]]223define i32 @align1_load32(ptr %p) nounwind {224entry:225 %bp = bitcast ptr %p to ptr226 %v = load i32, ptr %bp, align 1227 ret i32 %v228}229 230; CHECK-LABEL: align1_load16231; CHECK-DAG: ldb %r[[REG0:[0-9]+]], [%r0,0]232; CHECK-DAG: ldb %r[[REG1:[0-9]+]], [%r0,1]233; CHECK-DAG: asl %r[[REG2:[0-9]+]], %r[[REG1]], 8234define i16 @align1_load16(ptr %p) nounwind {235entry:236 %bp = bitcast ptr %p to ptr237 %v = load i16, ptr %bp, align 1238 ret i16 %v239}240 241; CHECK-LABEL: align2_store32242; CHECK-DAG: lsr %r[[REG:[0-9]+]], %r1, 16243; CHECK-DAG: sth %r1, [%r0,0]244; CHECK-DAG: sth %r[[REG:[0-9]+]], [%r0,2]245define void @align2_store32(ptr %p, i32 %v) nounwind {246entry:247 %bp = bitcast ptr %p to ptr248 store i32 %v, ptr %bp, align 2249 ret void250}251 252; CHECK-LABEL: align1_store16253; CHECK-DAG: lsr %r[[REG:[0-9]+]], %r1, 8254; CHECK-DAG: stb %r1, [%r0,0]255; CHECK-DAG: stb %r[[REG:[0-9]+]], [%r0,1]256define void @align1_store16(ptr %p, i16 %v) nounwind {257entry:258 %bp = bitcast ptr %p to ptr259 store i16 %v, ptr %bp, align 1260 ret void261}262 263; CHECK-LABEL: align1_store32264; CHECK-DAG: lsr %r[[REG0:[0-9]+]], %r1, 8265; CHECK-DAG: lsr %r[[REG1:[0-9]+]], %r1, 16266; CHECK-DAG: lsr %r[[REG2:[0-9]+]], %r1, 24267; CHECK-DAG: stb %r1, [%r0,0]268; CHECK-DAG: stb %r[[REG0]], [%r0,1]269; CHECK-DAG: stb %r[[REG1]], [%r0,2]270; CHECK-DAG: stb %r[[REG2]], [%r0,3]271define void @align1_store32(ptr %p, i32 %v) nounwind {272entry:273 %bp = bitcast ptr %p to ptr274 store i32 %v, ptr %bp, align 1275 ret void276}277