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1; RUN: llc < %s | FileCheck %s2; RUN: llc < %s -enable-tail-merge=0 | FileCheck --check-prefix=NOMERGE %s3 4; Check that tail merging is the default on ARM, and that -enable-tail-merge=05; works.6; PR16287 8; CHECK: bl _baz9; CHECK-NOT: bl _baz10 11; CHECK: bl _quux12; CHECK-NOT: bl _quux13 14; NOMERGE-DAG: bl _baz15; NOMERGE-DAG: bl _baz16 17; NOMERGE-DAG: bl _quux18; NOMERGE-DAG: bl _quux19 20; ModuleID = 'tail.c'21target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"22target triple = "arm-apple-darwin8"23 24define i32 @f(i32 %i, i32 %q) {25entry:26 %i_addr = alloca i32 ; <ptr> [#uses=2]27 %q_addr = alloca i32 ; <ptr> [#uses=2]28 %retval = alloca i32, align 4 ; <ptr> [#uses=1]29 store i32 %i, ptr %i_addr30 store i32 %q, ptr %q_addr31 %tmp = load i32, ptr %i_addr ; <i32> [#uses=1]32 %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]33 %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]34 %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]35 br i1 %toBool, label %cond_true, label %cond_false36 37cond_true: ; preds = %entry38 %tmp3 = call i32 (...) @bar( ) ; <i32> [#uses=0]39 %tmp4 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]40 %tmp7 = load i32, ptr %q_addr ; <i32> [#uses=1]41 %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]42 %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]43 %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]44 br i1 %toBool10, label %cond_true11, label %cond_false1545 46cond_false: ; preds = %entry47 %tmp5 = call i32 (...) @foo( ) ; <i32> [#uses=0]48 %tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]49 %tmp27 = load i32, ptr %q_addr ; <i32> [#uses=1]50 %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]51 %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]52 %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]53 br i1 %toBool210, label %cond_true11, label %cond_false1554 55cond_true11: ; preds = %cond_next56 %tmp13 = call i32 (...) @foo( ) ; <i32> [#uses=0]57 %tmp14 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0]58 br label %cond_next1859 60cond_false15: ; preds = %cond_next61 %tmp16 = call i32 (...) @bar( ) ; <i32> [#uses=0]62 %tmp17 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0]63 br label %cond_next1864 65cond_next18: ; preds = %cond_false15, %cond_true1166 %tmp19 = call i32 (...) @bar( ) ; <i32> [#uses=0]67 br label %return68 69return: ; preds = %cond_next1870 %retval20 = load i32, ptr %retval ; <i32> [#uses=1]71 ret i32 %retval2072}73 74declare i32 @bar(...)75 76declare i32 @baz(...)77 78declare i32 @foo(...)79 80declare i32 @quux(...)81