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1; RUN: llc < %s -mtriple=arm-linux-gnueabi2; PR45283 4; Inline asm is allowed to contain operands "=&r", "0".5 6%struct.device_dma_parameters = type { i32, i32 }7%struct.iovec = type { ptr, i32 }8 9define i32 @generic_segment_checks(ptr nocapture %iov, ptr nocapture %nr_segs, ptr nocapture %count, i32 %access_flags) nounwind optsize {10entry:11 br label %bb812 13bb: ; preds = %bb814 br i1 undef, label %bb10, label %bb215 16bb2: ; preds = %bb17 %asmtmp = tail call %struct.device_dma_parameters asm "adds $1, $2, $3; sbcccs $1, $1, $0; movcc $0, #0", "=&r,=&r,r,Ir,0,~{cc}"(ptr undef, i32 undef, i32 0) nounwind; <%struct.device_dma_parameters> [#uses=1]18 %asmresult = extractvalue %struct.device_dma_parameters %asmtmp, 0; <i32> [#uses=1]19 %0 = icmp eq i32 %asmresult, 0 ; <i1> [#uses=1]20 br i1 %0, label %bb7, label %bb421 22bb4: ; preds = %bb223 br i1 undef, label %bb10, label %bb924 25bb7: ; preds = %bb226 %1 = add i32 %2, 1 ; <i32> [#uses=1]27 br label %bb828 29bb8: ; preds = %bb7, %entry30 %2 = phi i32 [ 0, %entry ], [ %1, %bb7 ] ; <i32> [#uses=3]31 %scevgep22 = getelementptr %struct.iovec, ptr %iov, i32 %2, i32 0; <ptr> [#uses=0]32 %3 = load i32, ptr %nr_segs, align 4 ; <i32> [#uses=1]33 %4 = icmp ult i32 %2, %3 ; <i1> [#uses=1]34 br i1 %4, label %bb, label %bb935 36bb9: ; preds = %bb8, %bb437 store i32 undef, ptr %count, align 438 ret i32 039 40bb10: ; preds = %bb4, %bb41 ret i32 042}43