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1; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a82; pr71673 4define <8 x i8> @f1(<8 x i8> %x) nounwind {5 %y = shufflevector <8 x i8> %x, <8 x i8> undef,6 <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5>7 ret <8 x i8> %y8}9 10define <8 x i8> @f2(<8 x i8> %x) nounwind {11 %y = shufflevector <8 x i8> %x, <8 x i8> undef,12 <8 x i32> <i32 1, i32 2, i32 0, i32 5, i32 3, i32 6, i32 7, i32 4>13 ret <8 x i8> %y14}15 16define void @f3(ptr %xp) nounwind {17 %x = load <4 x i64>, ptr %xp18 %y = shufflevector <4 x i64> %x, <4 x i64> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1>19 store <4 x i64> %y, ptr %xp20 ret void21}22