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1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a9 -jump-table-density=40 | FileCheck %s2; Test that ldmia_ret preserves implicit operands for return values.3;4; This CFG is reduced from a benchmark miscompile. With current5; if-conversion heuristics, one of the return paths is if-converted6; into sw.bb18 resulting in an ldmia_ret in the middle of the7; block. The postra scheduler needs to know that the return implicitly8; uses the return register, otherwise its antidep breaker scavenges9; the register in order to hoist the constant load required to test10; the switch.11 12declare i32 @getint()13declare i1 @getbool()14declare void @foo(i32)15declare i32 @bar(i32)16 17define i32 @test(i32 %in1, i32 %in2) nounwind "frame-pointer"="all" {18entry:19  %call = tail call zeroext i1 @getbool() nounwind20  br i1 %call, label %sw.bb18, label %sw.bb221 22sw.bb2:                                           ; preds = %entry23  %cmp = tail call zeroext i1 @getbool() nounwind24  br i1 %cmp, label %sw.epilog58, label %land.lhs.true25 26land.lhs.true:                                    ; preds = %sw.bb227  %cmp13 = tail call zeroext i1 @getbool() nounwind28  br i1 %cmp13, label %if.then, label %sw.epilog5829 30if.then:                                          ; preds = %land.lhs.true31  tail call void @foo(i32 %in1) nounwind32  br label %sw.epilog5833 34; load the return value35; CHECK: movs	[[RRET:r.]], #236; hoist the switch constant without clobbering RRET37; CHECK: movw38; CHECK-NOT: [[RRET]]39; CHECK: , #6370740; CHECK-NOT: [[RRET]]41; CHECK: tst42; If-convert the return43; CHECK: it	ne44; Fold the CSR+return into a pop45; CHECK: pop {r4, r5, r7, pc}46sw.bb18:47  %call20 = tail call i32 @bar(i32 %in2) nounwind48  switch i32 %call20, label %sw.default56 [49    i32 168, label %sw.bb2150    i32 165, label %sw.bb2151    i32 261, label %sw.epilog5852    i32 188, label %sw.epilog5853    i32 187, label %sw.epilog5854    i32 186, label %sw.epilog5855    i32 185, label %sw.epilog5856    i32 184, label %sw.epilog5857    i32 175, label %sw.epilog5858    i32 174, label %sw.epilog5859    i32 173, label %sw.epilog5860    i32 172, label %sw.epilog5861    i32 171, label %sw.epilog5862    i32 167, label %sw.epilog5863    i32 166, label %sw.epilog5864    i32 164, label %sw.epilog5865    i32 163, label %sw.epilog5866    i32 161, label %sw.epilog5867    i32 160, label %sw.epilog5868    i32 -1, label %sw.bb3369  ]70 71sw.bb21:                                          ; preds = %sw.bb18, %sw.bb1872  tail call void @foo(i32 %in2) nounwind73  %call28 = tail call i32 @getint() nounwind74  %tobool = icmp eq i32 %call28, 075  br i1 %tobool, label %if.then29, label %sw.epilog5876 77if.then29:                                        ; preds = %sw.bb2178  tail call void @foo(i32 %in2) nounwind79  br label %sw.epilog5880 81sw.bb33:                                          ; preds = %sw.bb1882  %cmp42 = tail call zeroext i1 @getbool() nounwind83  br i1 %cmp42, label %sw.default56, label %land.lhs.true4484 85land.lhs.true44:                                  ; preds = %sw.bb3386  %call50 = tail call i32 @getint() nounwind87  %cmp51 = icmp slt i32 %call50, 088  br i1 %cmp51, label %if.then53, label %sw.default5689 90if.then53:                                        ; preds = %land.lhs.true4491  tail call void @foo(i32 %in2) nounwind92  br label %sw.default5693 94sw.default56:                                     ; preds = %sw.bb33, %land.lhs.true44, %if.then53, %sw.bb1895  br label %sw.epilog5896 97sw.epilog58:98  %retval.0 = phi i32 [ 4, %sw.default56 ], [ 2, %sw.bb21 ], [ 2, %if.then29 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb2 ], [ 2, %land.lhs.true ], [ 2, %if.then ]99  ret i32 %retval.0100}101