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1; RUN: llc < %s -o /dev/null "-mtriple=thumbv7-apple-ios" -debug-only=post-RA-sched 2> %t2; RUN: FileCheck %s < %t3; REQUIRES: asserts4; Make sure that mayalias store-load dependencies have one cycle5; latency regardless of whether they are barriers or not.6 7; CHECK: ** List Scheduling8; CHECK: SU(2){{.*}}STR{{.*}}(volatile9; CHECK-NOT: SU({{.*}}): Ord10; CHECK: SU(3): Ord Latency=111; CHECK-NOT: SU({{.*}}): Ord12; CHECK: SU(3){{.*}}LDR{{.*}}(volatile13; CHECK-NOT: SU({{.*}}): Ord14; CHECK: SU(2): Ord Latency=115; CHECK-NOT: SU({{.*}}): Ord16; CHECK: Successors:17; CHECK: ** List Scheduling18; CHECK: SU(2){{.*}}STR{{.*}}19; CHECK-NOT: SU({{.*}}): Ord20; CHECK: SU(3): Ord Latency=121; CHECK-NOT: SU({{.*}}): Ord22; CHECK: SU(3){{.*}}LDR{{.*}}23; CHECK-NOT: SU({{.*}}): Ord24; CHECK: SU(2): Ord Latency=125; CHECK-NOT: SU({{.*}}): Ord26; CHECK: Successors:27define i32 @f1(ptr nocapture %p1, ptr nocapture %p2) nounwind {28entry:29 store volatile i32 65540, ptr %p1, align 430 %0 = load volatile i32, ptr %p2, align 431 ret i32 %032}33 34define i32 @f2(ptr nocapture %p1, ptr nocapture %p2) nounwind {35entry:36 store i32 65540, ptr %p1, align 437 %0 = load i32, ptr %p2, align 438 ret i32 %039}40