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1; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s2 3@var_v2i8 = global <2 x i8> zeroinitializer4@var_v4i8 = global <4 x i8> zeroinitializer5 6@var_v2i16 = global <2 x i16> zeroinitializer7@var_v4i16 = global <4 x i16> zeroinitializer8 9@var_v2i32 = global <2 x i32> zeroinitializer10@var_v4i32 = global <4 x i32> zeroinitializer11 12@var_v2i64 = global <2 x i64> zeroinitializer13 14define void @test_v2i8tov2i32() {15; CHECK-LABEL: test_v2i8tov2i32:16 17 %i8val = load <2 x i8>, ptr @var_v2i818 19 %i32val = sext <2 x i8> %i8val to <2 x i32>20 store <2 x i32> %i32val, ptr @var_v2i3221; CHECK: vld1.16 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:16]22; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]23; CHECK: vmovl.s16 {{q[0-9]+}}, {{d[0-9]+}}24 25 ret void26}27 28define void @test_v2i8tov2i64() {29; CHECK-LABEL: test_v2i8tov2i64:30 31 %i8val = load <2 x i8>, ptr @var_v2i832 33 %i64val = sext <2 x i8> %i8val to <2 x i64>34 store <2 x i64> %i64val, ptr @var_v2i6435; CHECK: vld1.16 {d{{[0-9]+}}[0]}, [{{r[0-9]+}}:16]36; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]37; CHECK: vmovl.s16 {{q[0-9]+}}, {{d[0-9]+}}38; CHECK: vmovl.s32 {{q[0-9]+}}, {{d[0-9]+}}39 40; %i64val = sext <2 x i8> %i8val to <2 x i64>41; store <2 x i64> %i64val, ptr @var_v2i6442 43 ret void44}45 46define void @test_v4i8tov4i16() {47; CHECK-LABEL: test_v4i8tov4i16:48 49 %i8val = load <4 x i8>, ptr @var_v4i850 51 %i16val = sext <4 x i8> %i8val to <4 x i16>52 store <4 x i16> %i16val, ptr @var_v4i1653; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]54; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]55; CHECK-NOT: vmovl.s1656 57 ret void58; CHECK: bx lr59}60 61define void @test_v4i8tov4i32() {62; CHECK-LABEL: test_v4i8tov4i32:63 64 %i8val = load <4 x i8>, ptr @var_v4i865 66 %i16val = sext <4 x i8> %i8val to <4 x i32>67 store <4 x i32> %i16val, ptr @var_v4i3268; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]69; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]70; CHECK: vmovl.s16 {{q[0-9]+}}, {{d[0-9]+}}71 72 ret void73}74 75define void @test_v2i16tov2i32() {76; CHECK-LABEL: test_v2i16tov2i32:77 78 %i16val = load <2 x i16>, ptr @var_v2i1679 80 %i32val = sext <2 x i16> %i16val to <2 x i32>81 store <2 x i32> %i32val, ptr @var_v2i3282; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]83; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]84; CHECK-NOT: vmovl85 86 ret void87; CHECK: bx lr88}89 90define void @test_v2i16tov2i64() {91; CHECK-LABEL: test_v2i16tov2i64:92 93 %i16val = load <2 x i16>, ptr @var_v2i1694 95 %i64val = sext <2 x i16> %i16val to <2 x i64>96 store <2 x i64> %i64val, ptr @var_v2i6497; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]98; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]99; CHECK: vmovl.s32 {{q[0-9]+}}, d[[LOAD]]100 101 ret void102}103