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1;PR14492 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA2;RUN: llc -mtriple=thumbv7 < %s | FileCheck -check-prefix=EXPECTED %s3;RUN: llc -mtriple=thumbv7 < %s | FileCheck %s4 5;EXPECTED-LABEL: foo:6;CHECK-LABEL: foo:7define i32 @foo(ptr %a) nounwind optsize {8entry:9 %0 = load i32, ptr %a, align 410 %arrayidx1 = getelementptr inbounds i32, ptr %a, i32 111 %1 = load i32, ptr %arrayidx1, align 412 %arrayidx2 = getelementptr inbounds i32, ptr %a, i32 213 %2 = load i32, ptr %arrayidx2, align 414 %add.ptr = getelementptr inbounds i32, ptr %a, i32 315;Make sure we do not have a duplicated register in the front of the reg list16;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}},17;CHECK-NOT: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], [[REG]],18 tail call void @bar(ptr %add.ptr) nounwind optsize19 %add = add nsw i32 %1, %020 %add3 = add nsw i32 %add, %221 ret i32 %add322}23 24declare void @bar(ptr) optsize25