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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple arm-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3--- |4 define void @test_trunc_and_zext_s1_to_s32() { ret void }5 define void @test_trunc_and_sext_s1_to_s32() { ret void }6 define void @test_trunc_and_sext_s8_to_s32() { ret void }7 define void @test_trunc_and_zext_s16_to_s32() { ret void }8 define void @test_trunc_and_anyext_s8_to_s32() { ret void }9 define void @test_trunc_and_anyext_s16_to_s32() { ret void }10 11 define void @test_trunc_and_zext_s1_to_s16() { ret void }12 define void @test_trunc_and_sext_s1_to_s16() { ret void }13 define void @test_trunc_and_anyext_s1_to_s16() { ret void }14 15 define void @test_trunc_and_zext_s8_to_s16() { ret void }16 define void @test_trunc_and_sext_s8_to_s16() { ret void }17 define void @test_trunc_and_anyext_s8_to_s16() { ret void }18 19 define void @test_trunc_and_zext_s1_to_s8() { ret void }20 define void @test_trunc_and_sext_s1_to_s8() { ret void }21 define void @test_trunc_and_anyext_s1_to_s8() { ret void }22 23 define void @test_add_s32() { ret void }24 define void @test_add_fold_imm_s32() { ret void }25 define void @test_add_no_fold_imm_s32() #2 { ret void }26 27 define void @test_sub_s32() { ret void }28 define void @test_sub_imm_s32() { ret void }29 define void @test_sub_rev_imm_s32() { ret void }30 31 define void @test_mul_s32() #0 { ret void }32 define void @test_mulv5_s32() { ret void }33 34 define void @test_sdiv_s32() #1 { ret void }35 define void @test_udiv_s32() #1 { ret void }36 37 define void @test_lshr_s32() { ret void }38 define void @test_ashr_s32() { ret void }39 define void @test_shl_s32() { ret void }40 41 define void @test_load_from_stack() { ret void }42 43 define void @test_stores() { ret void }44 45 define void @test_gep() { ret void }46 47 define void @test_MOVi32imm() #2 { ret void }48 49 define void @test_constant_imm() { ret void }50 define void @test_constant_cimm() { ret void }51 52 define void @test_pointer_constant_unconstrained() { ret void }53 define void @test_pointer_constant_constrained() { ret void }54 55 define void @test_inttoptr_s32() { ret void }56 define void @test_ptrtoint_s32() { ret void }57 58 define void @test_select_s32() { ret void }59 define void @test_select_ptr() { ret void }60 61 define void @test_br() { ret void }62 63 define void @test_phi_s32() { ret void }64 65 attributes #0 = { "target-features"="+v6" }66 attributes #1 = { "target-features"="+hwdiv-arm" }67 attributes #2 = { "target-features"="+v6t2" }68...69---70name: test_trunc_and_zext_s1_to_s3271legalized: true72regBankSelected: true73selected: false74registers:75 - { id: 0, class: gprb }76 - { id: 1, class: gprb }77 - { id: 2, class: gprb }78body: |79 bb.0:80 liveins: $r081 82 ; CHECK-LABEL: name: test_trunc_and_zext_s1_to_s3283 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r084 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY]], 1, 14 /* CC::al */, $noreg, $noreg85 ; CHECK: $r0 = COPY [[ANDri]]86 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r087 %0(s32) = COPY $r088 89 %1(s1) = G_TRUNC %0(s32)90 91 %2(s32) = G_ZEXT %1(s1)92 93 $r0 = COPY %2(s32)94 95 BX_RET 14, $noreg, implicit $r096...97---98name: test_trunc_and_sext_s1_to_s3299legalized: true100regBankSelected: true101selected: false102registers:103 - { id: 0, class: gprb }104 - { id: 1, class: gprb }105 - { id: 2, class: gprb }106body: |107 bb.0:108 liveins: $r0109 110 ; CHECK-LABEL: name: test_trunc_and_sext_s1_to_s32111 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0112 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY]], 1, 14 /* CC::al */, $noreg, $noreg113 ; CHECK: [[RSBri:%[0-9]+]]:gpr = RSBri [[ANDri]], 0, 14 /* CC::al */, $noreg, $noreg114 ; CHECK: $r0 = COPY [[RSBri]]115 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0116 %0(s32) = COPY $r0117 118 %1(s1) = G_TRUNC %0(s32)119 120 %2(s32) = G_SEXT %1(s1)121 122 $r0 = COPY %2(s32)123 124 BX_RET 14, $noreg, implicit $r0125...126---127name: test_trunc_and_sext_s8_to_s32128legalized: true129regBankSelected: true130selected: false131registers:132 - { id: 0, class: gprb }133 - { id: 1, class: gprb }134 - { id: 2, class: gprb }135body: |136 bb.0:137 liveins: $r0138 139 ; CHECK-LABEL: name: test_trunc_and_sext_s8_to_s32140 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0141 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY [[COPY]]142 ; CHECK: [[SXTB:%[0-9]+]]:gprnopc = SXTB [[COPY1]], 0, 14 /* CC::al */, $noreg143 ; CHECK: $r0 = COPY [[SXTB]]144 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0145 %0(s32) = COPY $r0146 147 %1(s8) = G_TRUNC %0(s32)148 149 %2(s32) = G_SEXT %1(s8)150 151 $r0 = COPY %2(s32)152 153 BX_RET 14, $noreg, implicit $r0154...155---156name: test_trunc_and_zext_s16_to_s32157legalized: true158regBankSelected: true159selected: false160registers:161 - { id: 0, class: gprb }162 - { id: 1, class: gprb }163 - { id: 2, class: gprb }164body: |165 bb.0:166 liveins: $r0167 168 ; CHECK-LABEL: name: test_trunc_and_zext_s16_to_s32169 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0170 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY [[COPY]]171 ; CHECK: [[UXTH:%[0-9]+]]:gprnopc = UXTH [[COPY1]], 0, 14 /* CC::al */, $noreg172 ; CHECK: $r0 = COPY [[UXTH]]173 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0174 %0(s32) = COPY $r0175 176 %1(s16) = G_TRUNC %0(s32)177 178 %2(s32) = G_ZEXT %1(s16)179 180 $r0 = COPY %2(s32)181 182 BX_RET 14, $noreg, implicit $r0183...184---185name: test_trunc_and_anyext_s8_to_s32186legalized: true187regBankSelected: true188selected: false189registers:190 - { id: 0, class: gprb }191 - { id: 1, class: gprb }192 - { id: 2, class: gprb }193body: |194 bb.0:195 liveins: $r0196 197 ; CHECK-LABEL: name: test_trunc_and_anyext_s8_to_s32198 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0199 ; CHECK: $r0 = COPY [[COPY]]200 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0201 %0(s32) = COPY $r0202 203 %1(s8) = G_TRUNC %0(s32)204 205 %2(s32) = G_ANYEXT %1(s8)206 207 $r0 = COPY %2(s32)208 209 BX_RET 14, $noreg, implicit $r0210...211---212name: test_trunc_and_anyext_s16_to_s32213legalized: true214regBankSelected: true215selected: false216registers:217 - { id: 0, class: gprb }218 - { id: 1, class: gprb }219 - { id: 2, class: gprb }220body: |221 bb.0:222 liveins: $r0223 224 ; CHECK-LABEL: name: test_trunc_and_anyext_s16_to_s32225 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0226 ; CHECK: $r0 = COPY [[COPY]]227 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0228 %0(s32) = COPY $r0229 230 %1(s16) = G_TRUNC %0(s32)231 232 %2(s32) = G_ANYEXT %1(s16)233 234 $r0 = COPY %2(s32)235 236 BX_RET 14, $noreg, implicit $r0237...238---239name: test_trunc_and_zext_s1_to_s16240legalized: true241regBankSelected: true242selected: false243tracksRegLiveness: true244registers:245 - { id: 0, class: gprb }246 - { id: 1, class: gprb }247 - { id: 2, class: gprb }248 - { id: 3, class: gprb }249body: |250 bb.0:251 liveins: $r0, $r1252 253 ; CHECK-LABEL: name: test_trunc_and_zext_s1_to_s16254 ; CHECK: liveins: $r0, $r1255 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0256 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1257 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg258 ; CHECK: STRH [[ANDri]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))259 ; CHECK: BX_RET 14 /* CC::al */, $noreg260 %0(p0) = COPY $r0261 262 %1(s32) = COPY $r1263 264 %2(s1) = G_TRUNC %1(s32)265 266 %3(s16) = G_ZEXT %2(s1)267 268 G_STORE %3(s16), %0(p0) :: (store (s16))269 270 BX_RET 14, $noreg271...272---273name: test_trunc_and_sext_s1_to_s16274legalized: true275regBankSelected: true276selected: false277tracksRegLiveness: true278registers:279 - { id: 0, class: gprb }280 - { id: 1, class: gprb }281 - { id: 2, class: gprb }282 - { id: 3, class: gprb }283body: |284 bb.0:285 liveins: $r0, $r1286 287 ; CHECK-LABEL: name: test_trunc_and_sext_s1_to_s16288 ; CHECK: liveins: $r0, $r1289 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0290 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1291 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg292 ; CHECK: [[RSBri:%[0-9]+]]:gpr = RSBri [[ANDri]], 0, 14 /* CC::al */, $noreg, $noreg293 ; CHECK: STRH [[RSBri]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))294 ; CHECK: BX_RET 14 /* CC::al */, $noreg295 %0(p0) = COPY $r0296 297 %1(s32) = COPY $r1298 299 %2(s1) = G_TRUNC %1(s32)300 301 %3(s16) = G_SEXT %2(s1)302 303 G_STORE %3(s16), %0(p0) :: (store (s16))304 305 BX_RET 14, $noreg306...307---308name: test_trunc_and_anyext_s1_to_s16309legalized: true310regBankSelected: true311selected: false312tracksRegLiveness: true313registers:314 - { id: 0, class: gprb }315 - { id: 1, class: gprb }316 - { id: 2, class: gprb }317 - { id: 3, class: gprb }318body: |319 bb.0:320 liveins: $r0, $r1321 322 ; CHECK-LABEL: name: test_trunc_and_anyext_s1_to_s16323 ; CHECK: liveins: $r0, $r1324 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0325 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1326 ; CHECK: STRH [[COPY1]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))327 ; CHECK: BX_RET 14 /* CC::al */, $noreg328 %0(p0) = COPY $r0329 330 %1(s32) = COPY $r1331 332 %2(s1) = G_TRUNC %1(s32)333 334 %3(s16) = G_ANYEXT %2(s1)335 336 G_STORE %3(s16), %0(p0) :: (store (s16))337 338 BX_RET 14, $noreg339...340---341name: test_trunc_and_zext_s8_to_s16342legalized: true343regBankSelected: true344selected: false345tracksRegLiveness: true346registers:347 - { id: 0, class: gprb }348 - { id: 1, class: gprb }349 - { id: 2, class: gprb }350 - { id: 3, class: gprb }351body: |352 bb.0:353 liveins: $r0, $r1354 355 ; CHECK-LABEL: name: test_trunc_and_zext_s8_to_s16356 ; CHECK: liveins: $r0, $r1357 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0358 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1359 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]]360 ; CHECK: [[UXTB:%[0-9]+]]:gprnopc = UXTB [[COPY2]], 0, 14 /* CC::al */, $noreg361 ; CHECK: STRH [[UXTB]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))362 ; CHECK: BX_RET 14 /* CC::al */, $noreg363 %0(p0) = COPY $r0364 365 %1(s32) = COPY $r1366 367 %2(s8) = G_TRUNC %1(s32)368 369 %3(s16) = G_ZEXT %2(s8)370 371 G_STORE %3(s16), %0(p0) :: (store (s16))372 373 BX_RET 14, $noreg374...375---376name: test_trunc_and_sext_s8_to_s16377legalized: true378regBankSelected: true379selected: false380tracksRegLiveness: true381registers:382 - { id: 0, class: gprb }383 - { id: 1, class: gprb }384 - { id: 2, class: gprb }385 - { id: 3, class: gprb }386body: |387 bb.0:388 liveins: $r0, $r1389 390 ; CHECK-LABEL: name: test_trunc_and_sext_s8_to_s16391 ; CHECK: liveins: $r0, $r1392 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0393 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1394 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]]395 ; CHECK: [[SXTB:%[0-9]+]]:gprnopc = SXTB [[COPY2]], 0, 14 /* CC::al */, $noreg396 ; CHECK: STRH [[SXTB]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))397 ; CHECK: BX_RET 14 /* CC::al */, $noreg398 %0(p0) = COPY $r0399 400 %1(s32) = COPY $r1401 402 %2(s8) = G_TRUNC %1(s32)403 404 %3(s16) = G_SEXT %2(s8)405 406 G_STORE %3(s16), %0(p0) :: (store (s16))407 408 BX_RET 14, $noreg409...410---411name: test_trunc_and_anyext_s8_to_s16412legalized: true413regBankSelected: true414selected: false415tracksRegLiveness: true416registers:417 - { id: 0, class: gprb }418 - { id: 1, class: gprb }419 - { id: 2, class: gprb }420 - { id: 3, class: gprb }421body: |422 bb.0:423 liveins: $r0, $r1424 425 ; CHECK-LABEL: name: test_trunc_and_anyext_s8_to_s16426 ; CHECK: liveins: $r0, $r1427 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0428 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1429 ; CHECK: STRH [[COPY1]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))430 ; CHECK: BX_RET 14 /* CC::al */, $noreg431 %0(p0) = COPY $r0432 433 %1(s32) = COPY $r1434 435 %2(s8) = G_TRUNC %1(s32)436 437 %3(s16) = G_ANYEXT %2(s8)438 439 G_STORE %3(s16), %0(p0) :: (store (s16))440 441 BX_RET 14, $noreg442...443---444name: test_trunc_and_zext_s1_to_s8445legalized: true446regBankSelected: true447selected: false448tracksRegLiveness: true449registers:450 - { id: 0, class: gprb }451 - { id: 1, class: gprb }452 - { id: 2, class: gprb }453 - { id: 3, class: gprb }454body: |455 bb.0:456 liveins: $r0, $r1457 458 ; CHECK-LABEL: name: test_trunc_and_zext_s1_to_s8459 ; CHECK: liveins: $r0, $r1460 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0461 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1462 ; CHECK: [[ANDri:%[0-9]+]]:gprnopc = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg463 ; CHECK: STRBi12 [[ANDri]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8))464 ; CHECK: BX_RET 14 /* CC::al */, $noreg465 %0(p0) = COPY $r0466 467 %1(s32) = COPY $r1468 469 %2(s1) = G_TRUNC %1(s32)470 471 %3(s8) = G_ZEXT %2(s1)472 473 G_STORE %3(s8), %0(p0) :: (store (s8))474 475 BX_RET 14, $noreg476...477---478name: test_trunc_and_sext_s1_to_s8479legalized: true480regBankSelected: true481selected: false482tracksRegLiveness: true483registers:484 - { id: 0, class: gprb }485 - { id: 1, class: gprb }486 - { id: 2, class: gprb }487 - { id: 3, class: gprb }488body: |489 bb.0:490 liveins: $r0, $r1491 492 ; CHECK-LABEL: name: test_trunc_and_sext_s1_to_s8493 ; CHECK: liveins: $r0, $r1494 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0495 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1496 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg497 ; CHECK: [[RSBri:%[0-9]+]]:gprnopc = RSBri [[ANDri]], 0, 14 /* CC::al */, $noreg, $noreg498 ; CHECK: STRBi12 [[RSBri]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8))499 ; CHECK: BX_RET 14 /* CC::al */, $noreg500 %0(p0) = COPY $r0501 502 %1(s32) = COPY $r1503 504 %2(s1) = G_TRUNC %1(s32)505 506 %3(s8) = G_SEXT %2(s1)507 508 G_STORE %3(s8), %0(p0) :: (store (s8))509 510 BX_RET 14, $noreg511...512---513name: test_trunc_and_anyext_s1_to_s8514legalized: true515regBankSelected: true516selected: false517tracksRegLiveness: true518registers:519 - { id: 0, class: gprb }520 - { id: 1, class: gprb }521 - { id: 2, class: gprb }522 - { id: 3, class: gprb }523body: |524 bb.0:525 liveins: $r0, $r1526 527 ; CHECK-LABEL: name: test_trunc_and_anyext_s1_to_s8528 ; CHECK: liveins: $r0, $r1529 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0530 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1531 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]]532 ; CHECK: STRBi12 [[COPY2]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8))533 ; CHECK: BX_RET 14 /* CC::al */, $noreg534 %0(p0) = COPY $r0535 536 %1(s32) = COPY $r1537 538 %2(s1) = G_TRUNC %1(s32)539 540 %3(s8) = G_ANYEXT %2(s1)541 542 G_STORE %3(s8), %0(p0) :: (store (s8))543 544 BX_RET 14, $noreg545...546---547name: test_add_s32548legalized: true549regBankSelected: true550selected: false551registers:552 - { id: 0, class: gprb }553 - { id: 1, class: gprb }554 - { id: 2, class: gprb }555body: |556 bb.0:557 liveins: $r0, $r1558 559 ; CHECK-LABEL: name: test_add_s32560 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0561 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1562 ; CHECK: [[ADDrr:%[0-9]+]]:gpr = ADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg563 ; CHECK: $r0 = COPY [[ADDrr]]564 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0565 %0(s32) = COPY $r0566 567 %1(s32) = COPY $r1568 569 %2(s32) = G_ADD %0, %1570 571 $r0 = COPY %2(s32)572 573 BX_RET 14, $noreg, implicit $r0574...575---576name: test_add_fold_imm_s32577legalized: true578regBankSelected: true579selected: false580registers:581 - { id: 0, class: gprb }582 - { id: 1, class: gprb }583 - { id: 2, class: gprb }584body: |585 bb.0:586 liveins: $r0587 588 ; CHECK-LABEL: name: test_add_fold_imm_s32589 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0590 ; CHECK: [[ADDri:%[0-9]+]]:gpr = ADDri [[COPY]], 255, 14 /* CC::al */, $noreg, $noreg591 ; CHECK: $r0 = COPY [[ADDri]]592 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0593 %0(s32) = COPY $r0594 595 %1(s32) = G_CONSTANT i32 255596 %2(s32) = G_ADD %0, %1597 598 $r0 = COPY %2(s32)599 600 BX_RET 14, $noreg, implicit $r0601...602---603name: test_add_no_fold_imm_s32604legalized: true605regBankSelected: true606selected: false607registers:608 - { id: 0, class: gprb }609 - { id: 1, class: gprb }610 - { id: 2, class: gprb }611body: |612 bb.0:613 liveins: $r0614 615 ; CHECK-LABEL: name: test_add_no_fold_imm_s32616 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0617 ; CHECK: [[MOVi16_:%[0-9]+]]:gpr = MOVi16 65535, 14 /* CC::al */, $noreg618 ; CHECK: [[ADDrr:%[0-9]+]]:gpr = ADDrr [[COPY]], [[MOVi16_]], 14 /* CC::al */, $noreg, $noreg619 ; CHECK: $r0 = COPY [[ADDrr]]620 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0621 %0(s32) = COPY $r0622 623 %1(s32) = G_CONSTANT i32 65535624 625 %2(s32) = G_ADD %0, %1626 627 $r0 = COPY %2(s32)628 629 BX_RET 14, $noreg, implicit $r0630...631---632name: test_sub_s32633legalized: true634regBankSelected: true635selected: false636registers:637 - { id: 0, class: gprb }638 - { id: 1, class: gprb }639 - { id: 2, class: gprb }640body: |641 bb.0:642 liveins: $r0, $r1643 644 ; CHECK-LABEL: name: test_sub_s32645 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0646 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1647 ; CHECK: [[SUBrr:%[0-9]+]]:gpr = SUBrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg648 ; CHECK: $r0 = COPY [[SUBrr]]649 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0650 %0(s32) = COPY $r0651 652 %1(s32) = COPY $r1653 654 %2(s32) = G_SUB %0, %1655 656 $r0 = COPY %2(s32)657 658 BX_RET 14, $noreg, implicit $r0659...660---661name: test_sub_imm_s32662legalized: true663regBankSelected: true664selected: false665registers:666 - { id: 0, class: gprb }667 - { id: 1, class: gprb }668 - { id: 2, class: gprb }669body: |670 bb.0:671 liveins: $r0, $r1672 673 ; CHECK-LABEL: name: test_sub_imm_s32674 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0675 ; CHECK: [[SUBri:%[0-9]+]]:gpr = SUBri [[COPY]], 17, 14 /* CC::al */, $noreg, $noreg676 ; CHECK: $r0 = COPY [[SUBri]]677 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0678 %0(s32) = COPY $r0679 680 %1(s32) = G_CONSTANT i32 17681 %2(s32) = G_SUB %0, %1682 683 $r0 = COPY %2(s32)684 685 BX_RET 14, $noreg, implicit $r0686...687---688name: test_sub_rev_imm_s32689legalized: true690regBankSelected: true691selected: false692registers:693 - { id: 0, class: gprb }694 - { id: 1, class: gprb }695 - { id: 2, class: gprb }696body: |697 bb.0:698 liveins: $r0, $r1699 700 ; CHECK-LABEL: name: test_sub_rev_imm_s32701 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0702 ; CHECK: [[RSBri:%[0-9]+]]:gpr = RSBri [[COPY]], 17, 14 /* CC::al */, $noreg, $noreg703 ; CHECK: $r0 = COPY [[RSBri]]704 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0705 %0(s32) = COPY $r0706 707 %1(s32) = G_CONSTANT i32 17708 %2(s32) = G_SUB %1, %0709 710 $r0 = COPY %2(s32)711 712 BX_RET 14, $noreg, implicit $r0713...714---715name: test_mul_s32716legalized: true717regBankSelected: true718selected: false719registers:720 - { id: 0, class: gprb }721 - { id: 1, class: gprb }722 - { id: 2, class: gprb }723body: |724 bb.0:725 liveins: $r0, $r1726 727 ; CHECK-LABEL: name: test_mul_s32728 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0729 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY $r1730 ; CHECK: [[MUL:%[0-9]+]]:gprnopc = MUL [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg731 ; CHECK: $r0 = COPY [[MUL]]732 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0733 %0(s32) = COPY $r0734 735 %1(s32) = COPY $r1736 737 %2(s32) = G_MUL %0, %1738 739 $r0 = COPY %2(s32)740 741 BX_RET 14, $noreg, implicit $r0742...743---744name: test_mulv5_s32745legalized: true746regBankSelected: true747selected: false748registers:749 - { id: 0, class: gprb }750 - { id: 1, class: gprb }751 - { id: 2, class: gprb }752body: |753 bb.0:754 liveins: $r0, $r1755 756 ; CHECK-LABEL: name: test_mulv5_s32757 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0758 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY $r1759 ; CHECK: early-clobber %2:gprnopc = MULv5 [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg760 ; CHECK: $r0 = COPY %2761 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0762 %0(s32) = COPY $r0763 764 %1(s32) = COPY $r1765 766 %2(s32) = G_MUL %0, %1767 768 $r0 = COPY %2(s32)769 770 BX_RET 14, $noreg, implicit $r0771...772---773name: test_sdiv_s32774legalized: true775regBankSelected: true776selected: false777registers:778 - { id: 0, class: gprb }779 - { id: 1, class: gprb }780 - { id: 2, class: gprb }781body: |782 bb.0:783 liveins: $r0, $r1784 785 ; CHECK-LABEL: name: test_sdiv_s32786 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0787 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1788 ; CHECK: [[SDIV:%[0-9]+]]:gpr = SDIV [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg789 ; CHECK: $r0 = COPY [[SDIV]]790 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0791 %0(s32) = COPY $r0792 793 %1(s32) = COPY $r1794 795 %2(s32) = G_SDIV %0, %1796 797 $r0 = COPY %2(s32)798 799 BX_RET 14, $noreg, implicit $r0800...801---802name: test_udiv_s32803legalized: true804regBankSelected: true805selected: false806registers:807 - { id: 0, class: gprb }808 - { id: 1, class: gprb }809 - { id: 2, class: gprb }810body: |811 bb.0:812 liveins: $r0, $r1813 814 ; CHECK-LABEL: name: test_udiv_s32815 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0816 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1817 ; CHECK: [[UDIV:%[0-9]+]]:gpr = UDIV [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg818 ; CHECK: $r0 = COPY [[UDIV]]819 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0820 %0(s32) = COPY $r0821 822 %1(s32) = COPY $r1823 824 %2(s32) = G_UDIV %0, %1825 826 $r0 = COPY %2(s32)827 828 BX_RET 14, $noreg, implicit $r0829...830---831name: test_lshr_s32832legalized: true833regBankSelected: true834selected: false835registers:836 - { id: 0, class: gprb }837 - { id: 1, class: gprb }838 - { id: 2, class: gprb }839body: |840 bb.0:841 liveins: $r0, $r1842 843 ; CHECK-LABEL: name: test_lshr_s32844 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0845 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1846 ; CHECK: [[MOVsr:%[0-9]+]]:gprnopc = MOVsr [[COPY]], [[COPY1]], 3, 14 /* CC::al */, $noreg, $noreg847 ; CHECK: $r0 = COPY [[MOVsr]]848 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0849 %0(s32) = COPY $r0850 851 %1(s32) = COPY $r1852 853 %2(s32) = G_LSHR %0, %1854 855 $r0 = COPY %2(s32)856 857 BX_RET 14, $noreg, implicit $r0858...859---860name: test_ashr_s32861legalized: true862regBankSelected: true863selected: false864registers:865 - { id: 0, class: gprb }866 - { id: 1, class: gprb }867 - { id: 2, class: gprb }868body: |869 bb.0:870 liveins: $r0, $r1871 872 ; CHECK-LABEL: name: test_ashr_s32873 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0874 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1875 ; CHECK: [[MOVsr:%[0-9]+]]:gprnopc = MOVsr [[COPY]], [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg876 ; CHECK: $r0 = COPY [[MOVsr]]877 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0878 %0(s32) = COPY $r0879 880 %1(s32) = COPY $r1881 882 %2(s32) = G_ASHR %0, %1883 884 $r0 = COPY %2(s32)885 886 BX_RET 14, $noreg, implicit $r0887...888---889name: test_shl_s32890legalized: true891regBankSelected: true892selected: false893registers:894 - { id: 0, class: gprb }895 - { id: 1, class: gprb }896 - { id: 2, class: gprb }897body: |898 bb.0:899 liveins: $r0, $r1900 901 ; CHECK-LABEL: name: test_shl_s32902 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0903 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1904 ; CHECK: [[MOVsr:%[0-9]+]]:gprnopc = MOVsr [[COPY]], [[COPY1]], 2, 14 /* CC::al */, $noreg, $noreg905 ; CHECK: $r0 = COPY [[MOVsr]]906 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0907 %0(s32) = COPY $r0908 909 %1(s32) = COPY $r1910 911 %2(s32) = G_SHL %0, %1912 913 $r0 = COPY %2(s32)914 915 BX_RET 14, $noreg, implicit $r0916...917---918name: test_load_from_stack919legalized: true920regBankSelected: true921selected: false922registers:923 - { id: 0, class: gprb }924 - { id: 1, class: gprb }925 - { id: 2, class: gprb }926 - { id: 3, class: gprb }927 - { id: 4, class: gprb }928fixedStack:929 - { id: 0, offset: 0, size: 1, alignment: 4, isImmutable: true, isAliased: false }930 - { id: 1, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }931 - { id: 2, offset: 8, size: 4, alignment: 4, isImmutable: true, isAliased: false }932body: |933 bb.0:934 liveins: $r0, $r1, $r2, $r3935 936 ; CHECK-LABEL: name: test_load_from_stack937 ; CHECK: [[ADDri:%[0-9]+]]:gpr = ADDri %fixed-stack.0, 0, 14 /* CC::al */, $noreg, $noreg938 ; CHECK: [[LDRi12_:%[0-9]+]]:gpr = LDRi12 [[ADDri]], 0, 14 /* CC::al */, $noreg :: (load (s32))939 ; CHECK: $r0 = COPY [[LDRi12_]]940 ; CHECK: [[ADDri1:%[0-9]+]]:gpr = ADDri %fixed-stack.2, 0, 14 /* CC::al */, $noreg, $noreg941 ; CHECK: [[LDRBi12_:%[0-9]+]]:gprnopc = LDRBi12 [[ADDri1]], 0, 14 /* CC::al */, $noreg :: (load (s8))942 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY [[LDRBi12_]]943 ; CHECK: $r0 = COPY [[COPY]]944 ; CHECK: BX_RET 14 /* CC::al */, $noreg945 %0(p0) = G_FRAME_INDEX %fixed-stack.2946 947 %1(s32) = G_LOAD %0(p0) :: (load (s32))948 949 $r0 = COPY %1950 951 %2(p0) = G_FRAME_INDEX %fixed-stack.0952 953 %3(s8) = G_LOAD %2(p0) :: (load (s8))954 955 %4(s32) = G_ANYEXT %3(s8)956 957 $r0 = COPY %4958 959 BX_RET 14, $noreg960...961---962name: test_stores963legalized: true964regBankSelected: true965selected: false966registers:967 - { id: 0, class: gprb }968 - { id: 1, class: gprb }969 - { id: 2, class: gprb }970 - { id: 3, class: gprb }971 - { id: 4, class: gprb }972body: |973 bb.0:974 liveins: $r0, $r1975 976 ; CHECK-LABEL: name: test_stores977 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0978 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1979 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]]980 ; CHECK: STRBi12 [[COPY2]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8))981 ; CHECK: STRH [[COPY1]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16))982 ; CHECK: STRi12 [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))983 ; CHECK: BX_RET 14 /* CC::al */, $noreg984 %0(p0) = COPY $r0985 986 %3(s32) = COPY $r1987 988 %1(s8) = G_TRUNC %3(s32)989 990 %2(s16) = G_TRUNC %3(s32)991 992 G_STORE %1(s8), %0(p0) :: (store (s8))993 994 G_STORE %2(s16), %0(p0) :: (store (s16))995 996 G_STORE %3(s32), %0(p0) :: (store (s32))997 998 BX_RET 14, $noreg999...1000---1001name: test_gep1002legalized: true1003regBankSelected: true1004selected: false1005registers:1006 - { id: 0, class: gprb }1007 - { id: 1, class: gprb }1008 - { id: 2, class: gprb }1009body: |1010 bb.0:1011 liveins: $r0, $r11012 1013 ; CHECK-LABEL: name: test_gep1014 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01015 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r11016 ; CHECK: [[ADDrr:%[0-9]+]]:gpr = ADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg1017 ; CHECK: $r0 = COPY [[ADDrr]]1018 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01019 %0(p0) = COPY $r01020 1021 %1(s32) = COPY $r11022 1023 %2(p0) = G_PTR_ADD %0, %1(s32)1024 1025 $r0 = COPY %2(p0)1026 BX_RET 14, $noreg, implicit $r01027...1028---1029name: test_MOVi32imm1030legalized: true1031regBankSelected: true1032selected: false1033registers:1034 - { id: 0, class: gprb }1035body: |1036 bb.0:1037 ; CHECK-LABEL: name: test_MOVi32imm1038 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr = MOVi32imm 655371039 ; CHECK: $r0 = COPY [[MOVi32imm]]1040 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01041 %0(s32) = G_CONSTANT i32 655371042 1043 $r0 = COPY %0(s32)1044 BX_RET 14, $noreg, implicit $r01045...1046---1047name: test_constant_imm1048legalized: true1049regBankSelected: true1050selected: false1051registers:1052 - { id: 0, class: gprb }1053body: |1054 bb.0:1055 ; CHECK-LABEL: name: test_constant_imm1056 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 42, 14 /* CC::al */, $noreg, $noreg1057 ; CHECK: $r0 = COPY [[MOVi]]1058 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01059 %0(s32) = G_CONSTANT i32 421060 1061 $r0 = COPY %0(s32)1062 BX_RET 14, $noreg, implicit $r01063...1064---1065name: test_constant_cimm1066legalized: true1067regBankSelected: true1068selected: false1069registers:1070 - { id: 0, class: gprb }1071body: |1072 bb.0:1073 ; Adding a type on G_CONSTANT changes its operand from an Imm into a CImm.1074 ; We still want to see the same thing in the output though.1075 ; CHECK-LABEL: name: test_constant_cimm1076 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 42, 14 /* CC::al */, $noreg, $noreg1077 ; CHECK: $r0 = COPY [[MOVi]]1078 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01079 %0(s32) = G_CONSTANT i32 421080 1081 $r0 = COPY %0(s32)1082 BX_RET 14, $noreg, implicit $r01083...1084---1085name: test_pointer_constant_unconstrained1086legalized: true1087regBankSelected: true1088selected: false1089registers:1090 - { id: 0, class: gprb }1091body: |1092 bb.0:1093 ; CHECK-LABEL: name: test_pointer_constant_unconstrained1094 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg1095 ; CHECK: $r0 = COPY [[MOVi]]1096 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01097 %0(p0) = G_CONSTANT i32 01098 1099 ; This leaves %0 unconstrained before the G_CONSTANT is selected.1100 $r0 = COPY %0(p0)1101 BX_RET 14, $noreg, implicit $r01102...1103---1104name: test_pointer_constant_constrained1105legalized: true1106regBankSelected: true1107selected: false1108registers:1109 - { id: 0, class: gprb }1110body: |1111 bb.0:1112 ; CHECK-LABEL: name: test_pointer_constant_constrained1113 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg1114 ; CHECK: STRi12 [[MOVi]], [[MOVi]], 0, 14 /* CC::al */, $noreg :: (store (p0))1115 %0(p0) = G_CONSTANT i32 01116 1117 ; This constrains %0 before the G_CONSTANT is selected.1118 G_STORE %0(p0), %0(p0) :: (store (p0))1119...1120---1121name: test_inttoptr_s321122legalized: true1123regBankSelected: true1124selected: false1125registers:1126 - { id: 0, class: gprb }1127 - { id: 1, class: gprb }1128body: |1129 bb.0:1130 liveins: $r01131 1132 ; CHECK-LABEL: name: test_inttoptr_s321133 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01134 ; CHECK: $r0 = COPY [[COPY]]1135 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01136 %0(s32) = COPY $r01137 %1(p0) = G_INTTOPTR %0(s32)1138 1139 $r0 = COPY %1(p0)1140 1141 BX_RET 14, $noreg, implicit $r01142...1143---1144name: test_ptrtoint_s321145legalized: true1146regBankSelected: true1147selected: false1148registers:1149 - { id: 0, class: gprb }1150 - { id: 1, class: gprb }1151body: |1152 bb.0:1153 liveins: $r01154 1155 ; CHECK-LABEL: name: test_ptrtoint_s321156 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01157 ; CHECK: $r0 = COPY [[COPY]]1158 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01159 %0(p0) = COPY $r01160 %1(s32) = G_PTRTOINT %0(p0)1161 1162 $r0 = COPY %1(s32)1163 1164 BX_RET 14, $noreg, implicit $r01165...1166---1167name: test_select_s321168legalized: true1169regBankSelected: true1170selected: false1171registers:1172 - { id: 0, class: gprb }1173 - { id: 1, class: gprb }1174 - { id: 2, class: gprb }1175 - { id: 3, class: gprb }1176body: |1177 bb.0:1178 liveins: $r0, $r11179 1180 ; CHECK-LABEL: name: test_select_s321181 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01182 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r11183 ; CHECK: TSTri [[COPY1]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr1184 ; CHECK: [[MOVCCr:%[0-9]+]]:gpr = MOVCCr [[COPY]], [[COPY1]], 0 /* CC::eq */, $cpsr1185 ; CHECK: $r0 = COPY [[MOVCCr]]1186 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01187 %0(s32) = COPY $r01188 1189 %1(s32) = COPY $r11190 1191 %2(s1) = G_TRUNC %1(s32)1192 1193 %3(s32) = G_SELECT %2(s1), %0, %11194 1195 $r0 = COPY %3(s32)1196 1197 BX_RET 14, $noreg, implicit $r01198...1199---1200name: test_select_ptr1201legalized: true1202regBankSelected: true1203selected: false1204registers:1205 - { id: 0, class: gprb }1206 - { id: 1, class: gprb }1207 - { id: 2, class: gprb }1208 - { id: 3, class: gprb }1209 - { id: 4, class: gprb }1210body: |1211 bb.0:1212 liveins: $r0, $r1, $r21213 1214 ; CHECK-LABEL: name: test_select_ptr1215 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01216 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r11217 ; CHECK: [[COPY2:%[0-9]+]]:gpr = COPY $r21218 ; CHECK: TSTri [[COPY2]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr1219 ; CHECK: [[MOVCCr:%[0-9]+]]:gpr = MOVCCr [[COPY]], [[COPY1]], 0 /* CC::eq */, $cpsr1220 ; CHECK: $r0 = COPY [[MOVCCr]]1221 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01222 %0(p0) = COPY $r01223 1224 %1(p0) = COPY $r11225 1226 %2(s32) = COPY $r21227 1228 %3(s1) = G_TRUNC %2(s32)1229 1230 %4(p0) = G_SELECT %3(s1), %0, %11231 1232 $r0 = COPY %4(p0)1233 1234 BX_RET 14, $noreg, implicit $r01235...1236---1237name: test_br1238legalized: true1239regBankSelected: true1240selected: false1241registers:1242 - { id: 0, class: gprb }1243 - { id: 1, class: gprb }1244body: |1245 ; CHECK-LABEL: name: test_br1246 ; CHECK: bb.0:1247 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)1248 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01249 ; CHECK: TSTri [[COPY]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr1250 ; CHECK: Bcc %bb.1, 1 /* CC::ne */, $cpsr1251 ; CHECK: B %bb.21252 ; CHECK: bb.1:1253 ; CHECK: successors: %bb.2(0x80000000)1254 ; CHECK: B %bb.21255 ; CHECK: bb.2:1256 ; CHECK: BX_RET 14 /* CC::al */, $noreg1257 bb.0:1258 successors: %bb.1(0x40000000), %bb.2(0x40000000)1259 liveins: $r01260 1261 %0(s32) = COPY $r01262 %1(s1) = G_TRUNC %0(s32)1263 1264 G_BRCOND %1(s1), %bb.11265 G_BR %bb.21266 1267 bb.1:1268 successors: %bb.2(0x80000000)1269 1270 G_BR %bb.21271 1272 bb.2:1273 1274 BX_RET 14, $noreg1275...1276---1277name: test_phi_s321278legalized: true1279regBankSelected: true1280selected: false1281tracksRegLiveness: true1282registers:1283 - { id: 0, class: gprb }1284 - { id: 1, class: gprb }1285 - { id: 2, class: gprb }1286 - { id: 3, class: gprb }1287 - { id: 4, class: gprb }1288body: |1289 ; CHECK-LABEL: name: test_phi_s321290 ; CHECK: bb.0:1291 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)1292 ; CHECK: liveins: $r0, $r1, $r21293 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r01294 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r11295 ; CHECK: [[COPY2:%[0-9]+]]:gpr = COPY $r21296 ; CHECK: TSTri [[COPY]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr1297 ; CHECK: Bcc %bb.1, 1 /* CC::ne */, $cpsr1298 ; CHECK: B %bb.21299 ; CHECK: bb.1:1300 ; CHECK: successors: %bb.2(0x80000000)1301 ; CHECK: B %bb.21302 ; CHECK: bb.2:1303 ; CHECK: [[PHI:%[0-9]+]]:gpr = PHI [[COPY1]], %bb.0, [[COPY2]], %bb.11304 ; CHECK: $r0 = COPY [[PHI]]1305 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r01306 bb.0:1307 successors: %bb.1(0x40000000), %bb.2(0x40000000)1308 liveins: $r0, $r1, $r21309 1310 %0(s32) = COPY $r01311 %1(s1) = G_TRUNC %0(s32)1312 1313 %2(s32) = COPY $r11314 %3(s32) = COPY $r21315 1316 G_BRCOND %1(s1), %bb.11317 G_BR %bb.21318 1319 bb.1:1320 successors: %bb.2(0x80000000)1321 1322 G_BR %bb.21323 1324 bb.2:1325 %4(s32) = G_PHI %2(s32), %bb.0, %3(s32), %bb.11326 1327 $r0 = COPY %4(s32)1328 BX_RET 14, $noreg, implicit $r01329...1330