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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 -global-isel=1 --verify-machineinstrs %s -o - | FileCheck %s3 4define i32 @func_get_fpenv() {5; CHECK-LABEL: func_get_fpenv:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: vmrs r0, fpscr8; CHECK-NEXT: mov pc, lr9entry:10 %fpenv = call i32 @llvm.get.fpenv.i32()11 ret i32 %fpenv12}13 14define i32 @func_get_fpenv_soft() #0 {15; CHECK-LABEL: func_get_fpenv_soft:16; CHECK: @ %bb.0: @ %entry17; CHECK-NEXT: .save {r4, lr}18; CHECK-NEXT: push {r4, lr}19; CHECK-NEXT: .pad #820; CHECK-NEXT: sub sp, sp, #821; CHECK-NEXT: add r4, sp, #422; CHECK-NEXT: mov r0, r423; CHECK-NEXT: bl fegetenv24; CHECK-NEXT: ldr r0, [r4]25; CHECK-NEXT: add sp, sp, #826; CHECK-NEXT: pop {r4, lr}27; CHECK-NEXT: mov pc, lr28entry:29 %fpenv = call i32 @llvm.get.fpenv.i32()30 ret i32 %fpenv31}32 33define void @func_set_fpenv(i32 %fpenv) {34; CHECK-LABEL: func_set_fpenv:35; CHECK: @ %bb.0: @ %entry36; CHECK-NEXT: vmsr fpscr, r037; CHECK-NEXT: mov pc, lr38entry:39 call void @llvm.set.fpenv.i32(i32 %fpenv)40 ret void41}42 43define void @func_set_fpenv_soft(i32 %fpenv) #0 {44; CHECK-LABEL: func_set_fpenv_soft:45; CHECK: @ %bb.0: @ %entry46; CHECK-NEXT: .save {r11, lr}47; CHECK-NEXT: push {r11, lr}48; CHECK-NEXT: .pad #849; CHECK-NEXT: sub sp, sp, #850; CHECK-NEXT: add r1, sp, #451; CHECK-NEXT: str r0, [r1]52; CHECK-NEXT: mov r0, r153; CHECK-NEXT: bl fesetenv54; CHECK-NEXT: add sp, sp, #855; CHECK-NEXT: pop {r11, lr}56; CHECK-NEXT: mov pc, lr57entry:58 call void @llvm.set.fpenv.i32(i32 %fpenv)59 ret void60}61 62define void @func_reset() {63; CHECK-LABEL: func_reset:64; CHECK: @ %bb.0: @ %entry65; CHECK-NEXT: mov r0, #066; CHECK-NEXT: vmsr fpscr, r067; CHECK-NEXT: mov pc, lr68entry:69 call void @llvm.reset.fpenv()70 ret void71}72 73define void @func_reset_soft() #0 {74; CHECK-LABEL: func_reset_soft:75; CHECK: @ %bb.0: @ %entry76; CHECK-NEXT: .save {r11, lr}77; CHECK-NEXT: push {r11, lr}78; CHECK-NEXT: mvn r0, #079; CHECK-NEXT: bl fesetenv80; CHECK-NEXT: pop {r11, lr}81; CHECK-NEXT: mov pc, lr82entry:83 call void @llvm.reset.fpenv()84 ret void85}86 87 88define i32 @get_fpmode_soft() #0 {89; CHECK-LABEL: get_fpmode_soft:90; CHECK: @ %bb.0: @ %entry91; CHECK-NEXT: .save {r4, lr}92; CHECK-NEXT: push {r4, lr}93; CHECK-NEXT: .pad #894; CHECK-NEXT: sub sp, sp, #895; CHECK-NEXT: add r4, sp, #496; CHECK-NEXT: mov r0, r497; CHECK-NEXT: bl fegetmode98; CHECK-NEXT: ldr r0, [r4]99; CHECK-NEXT: add sp, sp, #8100; CHECK-NEXT: pop {r4, lr}101; CHECK-NEXT: mov pc, lr102entry:103 %fpenv = call i32 @llvm.get.fpmode.i32()104 ret i32 %fpenv105}106 107define i32 @get_fpmode() nounwind {108; CHECK-LABEL: get_fpmode:109; CHECK: @ %bb.0: @ %entry110; CHECK-NEXT: vmrs r0, fpscr111; CHECK-NEXT: mov pc, lr112entry:113 %fpenv = call i32 @llvm.get.fpmode.i32()114 ret i32 %fpenv115}116 117define void @set_fpmode_soft(i32 %fpmode) #0 {118; CHECK-LABEL: set_fpmode_soft:119; CHECK: @ %bb.0: @ %entry120; CHECK-NEXT: .save {r11, lr}121; CHECK-NEXT: push {r11, lr}122; CHECK-NEXT: .pad #8123; CHECK-NEXT: sub sp, sp, #8124; CHECK-NEXT: add r1, sp, #4125; CHECK-NEXT: str r0, [r1]126; CHECK-NEXT: mov r0, r1127; CHECK-NEXT: bl fesetmode128; CHECK-NEXT: add sp, sp, #8129; CHECK-NEXT: pop {r11, lr}130; CHECK-NEXT: mov pc, lr131entry:132 call void @llvm.set.fpmode.i32(i32 %fpmode)133 ret void134}135 136define void @set_fpmode(i32 %fpmode) nounwind {137; CHECK-LABEL: set_fpmode:138; CHECK: @ %bb.0: @ %entry139; CHECK-NEXT: vmrs r1, fpscr140; CHECK-NEXT: mov r2, #159141; CHECK-NEXT: orr r2, r2, #-134217728142; CHECK-NEXT: and r1, r1, r2143; CHECK-NEXT: mvn r2, #159144; CHECK-NEXT: sub r2, r2, #-134217728145; CHECK-NEXT: and r0, r0, r2146; CHECK-NEXT: orr r0, r1, r0147; CHECK-NEXT: vmsr fpscr, r0148; CHECK-NEXT: mov pc, lr149entry:150 call void @llvm.set.fpmode.i32(i32 %fpmode)151 ret void152}153 154define void @reset_fpmode_soft() #0 {155; CHECK-LABEL: reset_fpmode_soft:156; CHECK: @ %bb.0: @ %entry157; CHECK-NEXT: .save {r11, lr}158; CHECK-NEXT: push {r11, lr}159; CHECK-NEXT: mvn r0, #0160; CHECK-NEXT: bl fesetmode161; CHECK-NEXT: pop {r11, lr}162; CHECK-NEXT: mov pc, lr163entry:164 call void @llvm.reset.fpmode()165 ret void166}167 168define void @reset_fpmode() nounwind {169; CHECK-LABEL: reset_fpmode:170; CHECK: @ %bb.0: @ %entry171; CHECK-NEXT: vmrs r0, fpscr172; CHECK-NEXT: ldr r1, .LCPI11_0173; CHECK-NEXT: and r0, r0, r1174; CHECK-NEXT: vmsr fpscr, r0175; CHECK-NEXT: mov pc, lr176; CHECK-NEXT: .p2align 2177; CHECK-NEXT: @ %bb.1:178; CHECK-NEXT: .LCPI11_0:179; CHECK-NEXT: .long 4160774399 @ 0xf80060ff180entry:181 call void @llvm.reset.fpmode()182 ret void183}184 185attributes #0 = { nounwind "use-soft-float"="true" }186 187